HAL ETH constants ¶

HAL_ETH_PMT_CTRL_TRIG_MAGIC_PKT ETH_MACPCSR_MGKPKTEN ¶

Enable Magic Packet detection in power down mode.

When this control is set, the Ethernet controller will detect Magic Packets and trigger a wake-up event while in power down mode.

See also

HAL_ETH_PMT_CTRL_TRIG_RWKUP_PKT ETH_MACPCSR_RWKPKTEN ¶

Enable Wake Up Packet detection in power down mode.

When this control is set, the Ethernet controller will detect remote wake-up packets and trigger a wake-up event while in power down mode.

See also

HAL_ETH_PMT_CTRL_TRIG_GLBL_UCAST ETH_MACPCSR_GLBLUCAST ¶

Enable Global Unicast packet detection in power down mode.

When this control is set, the Ethernet controller will detect global unicast packets and trigger a wake-up event while in power down mode.

See also

HAL_ETH_PMT_CTRL_TRIG_ALL (ETH_MACPCSR_RWKPFE | ETH_MACPCSR_MGKPKTEN | \ ETH_MACPCSR_RWKPKTEN | ETH_MACPCSR_GLBLUCAST) ¶

Enable detection of Magic, Remote, and Global Unicast wake-up packets in power down mode.

This control enables simultaneous detection of Magic Packets, remote wake-up packets, and global unicast packets for wake-up events while in power down mode.

See also

ETH LPI controls ¶

Note

This section is not available for STM32C562xx.

group ETH_LPI_Controls

Constants for configuring Low Power Idle (LPI) controls for Ethernet.

Defines

HAL_ETH_LPI_CTRL_TX_CLK_STOP_ENABLE ETH_MACLCSR_LPITCSE ¶

Enable Tx Clock Stop in LPI mode.

When this control is set, the Tx clock can be stopped after entering Tx LPI (Low Power Idle) mode. If the RGMII interface is selected, the Tx clock is still required for transmitting the LPI pattern.

See also

HAL_ETH_EnterLPIMode

HAL_ETH_LPI_CTRL_TX_AUTOMATE_ENABLE ETH_MACLCSR_LPITXA ¶

Enable Tx LPI Automate.

When this control is set, the MAC will enter LPI mode only after all outstanding packets (in the core) and pending packets (in the application interface) have been transmitted.

See also

HAL_ETH_EnterLPIMode

ETH MDIO command attributes ¶

Note

This section is not available for STM32C562xx.

group ETH_MDIO_Command_Attributes

Constants for configuring MDIO (Management Data Input/Output) command attributes for Ethernet.

Defines

HAL_ETH_MDIO_FEAT_PSE ETH_MACMDIOAR_PSE ¶

Enable MDIO preamble suppression feature.

Selects the preamble length for the MDIO frame.

Feature disabled: 32-bit preamble (standard, recommended for compatibility)
Feature enabled : 1-bit preamble (suppressed, for PHYs that support preamble suppression)

See also

HAL_ETH_MDIO_FEAT_BTB ETH_MACMDIOAR_BTB ¶

Enable MDIO back-to-back operation mode.

Controls whether MDIO operations are performed in back-to-back mode.

Feature disabled: Normal operation (default)
Feature enabled : Back-to-back operation (for consecutive MDIO transactions)

See also

HAL_ETH_MDIO_NTC_1_CYCLE (1UL << ETH_MACMDIOAR_NTC_Pos) ¶

Trim MDIO clock by 1 cycle.

Sets the MDIO clock trimming to 1 cycle.

See also

HAL_ETH_MDIO_NTC_2_CYCLES (2UL << ETH_MACMDIOAR_NTC_Pos) ¶

Trim MDIO clock by 2 cycles.

Sets the MDIO clock trimming to 2 cycles.

See also

HAL_ETH_MDIO_NTC_3_CYCLES (3UL << ETH_MACMDIOAR_NTC_Pos) ¶

Trim MDIO clock by 3 cycles.

Sets the MDIO clock trimming to 3 cycles.

See also

HAL_ETH_MDIO_NTC_4_CYCLES (4UL << ETH_MACMDIOAR_NTC_Pos) ¶

Trim MDIO clock by 4 cycles.

Sets the MDIO clock trimming to 4 cycles.

See also

HAL_ETH_MDIO_NTC_5_CYCLES (5UL << ETH_MACMDIOAR_NTC_Pos) ¶

Trim MDIO clock by 5 cycles.

Sets the MDIO clock trimming to 5 cycles.

See also

HAL_ETH_MDIO_NTC_6_CYCLES (6UL << ETH_MACMDIOAR_NTC_Pos) ¶

Trim MDIO clock by 6 cycles.

Sets the MDIO clock trimming to 6 cycles.

See also

HAL_ETH_MDIO_NTC_7_CYCLES (7UL << ETH_MACMDIOAR_NTC_Pos) ¶

Trim MDIO clock by 7 cycles.

Sets the MDIO clock trimming to 7 cycles.

See also

hal_eth_rwk_filter_block_t

ETH remote wake-up filter number ¶

Note

This section is not available for STM32C562xx.

group ETH_RWK_Packet_Filters_Number

Constants defining the number of remote wake-up (RWK) packet filters supported by the Ethernet hardware.

Defines

HAL_ETH_RWK_FILT_PER_BLOCK ETH_NB_OF_RWK_FILT_PER_BLOCK ¶

Number of remote wake-up (RWK) packet filters per filter block.

This constant specifies the maximum number of RWK packet filters that can be configured within a single filter block. Each filter can be programmed to match specific packet patterns for remote wake-up functionality.

See also

HAL_ETH_RWK_FILT_BLOCK_NUM ETH_NB_OF_RWK_FILT_BLOCKS ¶

Number of available RWK filter blocks.

This constant defines the total number of filter blocks supported by the hardware for remote wake-up packet filtering. The total number of RWK filters is the product of HAL_ETH_RWK_FILT_PER_BLOCK and this value.

See also

hal_eth_rwk_filter_lut_t

See also

ETH remote wake-up command list ¶

Note

This section is not available for STM32C562xx.

group ETH_RWK_Filter_Commands

Constants for configuring the 4-bit filter command for remote wakeup filters.

Defines

HAL_ETH_RWK_FLT_CMD_ENABLE (1UL << 0U) ¶

Enable filter i.

Bit 0: When set, enables filter i. If this bit is not set, filter i is disabled and will not participate in remote wakeup packet matching.

See also

hal_eth_rwk_pkt_filter_t

See also

HAL_ETH_RWK_FLT_CMD_AND_PREVIOUS (1UL << 1U) ¶

AND logic with previous filter.

Bit 1: When set, the result of the current filter is logically ANDed with the result of the previous filter. This allows for filter patterns longer than 32 bytes by splitting the mask among multiple filters. Multiple filters can be chained using this bit to create complex matching logic.

See also

hal_eth_rwk_pkt_filter_t

See also

HAL_ETH_RWK_FLT_CMD_INVERSE_MODE (1UL << 2U) ¶

Inverse mode for CRC16 hash function.

Bit 2: When set, reverses the logic of the CRC16 hash function signal, causing the filter to reject packets with a matching CRC16 value. This bit, in combination with HAL_ETH_RWK_FLT_CMD_AND_PREVIOUS, allows the creation of filter logic such as “Pattern 1 AND NOT Pattern 2” to reject a subset of remote wakeup packets.

See also

hal_eth_rwk_pkt_filter_t

See also