SPI Exported Types

SPI Exported Types

group SPI_Exported_Types

Typedefs

typedef struct hal_spi_handle_s hal_spi_handle_t

HAL SPI handler type

typedef void ( * hal_spi_cb_t ) ( hal_spi_handle_t * hspi )

HAL SPI Callback pointer

Enums

enum hal_spi_t

HAL SPI instances enumeration definition.

Values:

enumerator HAL_SPI1

SPI1 instance

enumerator HAL_SPI2

SPI2 instance

enumerator HAL_SPI3

SPI3 instance

enum hal_spi_direction_t

HAL SPI direction mode enumeration definition.

Values:

enumerator HAL_SPI_DIRECTION_FULL_DUPLEX

Full-duplex communication Full-duplex communication

enumerator HAL_SPI_DIRECTION_SIMPLEX_TX

Simplex communication mode: Transmit only Simplex communication mode: Transmit only

enumerator HAL_SPI_DIRECTION_SIMPLEX_RX

Simplex communication mode: Receive only Simplex communication mode: Receive only

enumerator HAL_SPI_DIRECTION_HALF_DUPLEX

Half-duplex communication Half-duplex communication

enum hal_spi_state_t

HAL SPI State enumeration definition.

Values:

enumerator HAL_SPI_STATE_RESET

0x00000000 : SPI is not yet initialized or de-initialized

enumerator HAL_SPI_STATE_INIT

0x02000000 : SPI is initialized but not yet configured

enumerator HAL_SPI_STATE_IDLE

0x04000000 : SPI is initialized and global config applied

enumerator HAL_SPI_STATE_TX_ACTIVE

0x08000000 : Data Transmission process is ongoing

enumerator HAL_SPI_STATE_RX_ACTIVE

0x10000000 : Data Reception process is ongoing

enumerator HAL_SPI_STATE_TX_RX_ACTIVE

0x20000000 : Data Transmission and Reception process is ongoing

enumerator HAL_SPI_STATE_ABORT

0x40000000 : SPI abort is ongoing

enumerator HAL_SPI_STATE_FAULT

0x80000000 : SPI encountered an unrecoverable error and a recovery sequence is needed

enum hal_spi_mode_t

HAL SPI mode enumeration definition.

Values:

enumerator HAL_SPI_MODE_SLAVE

Slave mode

enumerator HAL_SPI_MODE_MASTER

Master mode

enum hal_spi_data_width_t

HAL SPI data width enumeration definition.

Values:

enumerator HAL_SPI_DATA_WIDTH_4_BIT

4-bits

enumerator HAL_SPI_DATA_WIDTH_5_BIT

5-bits

enumerator HAL_SPI_DATA_WIDTH_6_BIT

6-bits

enumerator HAL_SPI_DATA_WIDTH_7_BIT

7-bits

enumerator HAL_SPI_DATA_WIDTH_8_BIT

8-bits

enumerator HAL_SPI_DATA_WIDTH_9_BIT

9-bits

enumerator HAL_SPI_DATA_WIDTH_10_BIT

10-bits

enumerator HAL_SPI_DATA_WIDTH_11_BIT

11-bits

enumerator HAL_SPI_DATA_WIDTH_12_BIT

12-bits

enumerator HAL_SPI_DATA_WIDTH_13_BIT

13-bits

enumerator HAL_SPI_DATA_WIDTH_14_BIT

14-bits

enumerator HAL_SPI_DATA_WIDTH_15_BIT

15-bits

enumerator HAL_SPI_DATA_WIDTH_16_BIT

16-bits

enumerator HAL_SPI_DATA_WIDTH_17_BIT

17-bits

enumerator HAL_SPI_DATA_WIDTH_18_BIT

18-bits

enumerator HAL_SPI_DATA_WIDTH_19_BIT

19-bits

enumerator HAL_SPI_DATA_WIDTH_20_BIT

20-bits

enumerator HAL_SPI_DATA_WIDTH_21_BIT

21-bits

enumerator HAL_SPI_DATA_WIDTH_22_BIT

22-bits

enumerator HAL_SPI_DATA_WIDTH_23_BIT

23-bits

enumerator HAL_SPI_DATA_WIDTH_24_BIT

24-bits

enumerator HAL_SPI_DATA_WIDTH_25_BIT

25-bits

enumerator HAL_SPI_DATA_WIDTH_26_BIT

26-bits

enumerator HAL_SPI_DATA_WIDTH_27_BIT

27-bits

enumerator HAL_SPI_DATA_WIDTH_28_BIT

28-bits

enumerator HAL_SPI_DATA_WIDTH_29_BIT

29-bits

enumerator HAL_SPI_DATA_WIDTH_30_BIT

30-bits

enumerator HAL_SPI_DATA_WIDTH_31_BIT

31-bits

enumerator HAL_SPI_DATA_WIDTH_32_BIT

32-bits

enum hal_spi_clock_polarity_t

HAL SPI clock polarity enumeration definition.

Values:

enumerator HAL_SPI_CLOCK_POLARITY_LOW

SCK signal is at 0 when idle SCK signal is at 0 when idle

enumerator HAL_SPI_CLOCK_POLARITY_HIGH

SCK signal is at 1 when idle SCK signal is at 1 when idle

enum hal_spi_clock_phase_t

HAL SPI clock phase enumeration definition.

Values:

enumerator HAL_SPI_CLOCK_PHASE_1_EDGE

The first clock transition is the first data capture edge The first clock transition is the first data capture edge

enumerator HAL_SPI_CLOCK_PHASE_2_EDGE

The second clock transition is the first data capture edge The second clock transition is the first data capture edge

enum hal_spi_baud_rate_prescaler_t

HAL SPI driver baudrate prescaler enumeration definition.

Values:

enumerator HAL_SPI_BAUD_RATE_PRESCALER_2

SPI master clock/2 SPI master clock/2

enumerator HAL_SPI_BAUD_RATE_PRESCALER_4

SPI master clock/4 SPI master clock/4

enumerator HAL_SPI_BAUD_RATE_PRESCALER_8

SPI master clock/8 SPI master clock/8

enumerator HAL_SPI_BAUD_RATE_PRESCALER_16

SPI master clock/16 SPI master clock/16

enumerator HAL_SPI_BAUD_RATE_PRESCALER_32

SPI master clock/32 SPI master clock/32

enumerator HAL_SPI_BAUD_RATE_PRESCALER_64

SPI master clock/64 SPI master clock/64

enumerator HAL_SPI_BAUD_RATE_PRESCALER_128

SPI master clock/128 SPI master clock/128

enumerator HAL_SPI_BAUD_RATE_PRESCALER_256

SPI master clock/256 SPI master clock/256

enumerator HAL_SPI_BAUD_RATE_PRESCALER_BYPASS

Bypass from RCC in Master mode Bypass from RCC in Master mode

enum hal_spi_first_bit_t

HAL SPI MSB LSB transmission enumeration definition.

Values:

enumerator HAL_SPI_MSB_FIRST

MSB transmitted first MSB transmitted first

enumerator HAL_SPI_LSB_FIRST

LSB transmitted first LSB transmitted first

enum hal_spi_nss_pin_management_t

HAL SPI slave select management enumeration definition.

Values:

enumerator HAL_SPI_NSS_PIN_MGMT_INTERNAL

In this configuration the Slave select is driven internally. The external slave select pin is free for other application uses.

enumerator HAL_SPI_NSS_PIN_MGMT_INPUT

In Slave mode, the slave select pin works as a standard chip select input and the slave is selected while the slave select line is at its active level. In Master mode, this configuration allows multi-master capability. If the slave select pin is pulled into an active level in this mode, the SPI enters Master mode fault state and the SPI device is automatically reconfigured in Slave mode (MASTER = 0)

enumerator HAL_SPI_NSS_PIN_MGMT_OUTPUT

This configuration is only used when the MCU is set as master (multi-master not allowed). The slave select pin active level is managed by the hardware. The functionality is tied to CSTART and EOT control.

enum hal_spi_crc_status_t

HAL SPI CRC feature status enumeration definition.

Values:

enumerator HAL_SPI_CRC_DISABLED

CRC feature disabled

enumerator HAL_SPI_CRC_ENABLED

CRC feature enabled

enum hal_spi_crc_length_t

HAL SPI CRC length enumeration definition.

Values:

enumerator HAL_SPI_CRC_LENGTH_DATASIZE

Datasize length CRC

enumerator HAL_SPI_CRC_LENGTH_4_BIT

4-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_5_BIT

5-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_6_BIT

6-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_7_BIT

7-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_8_BIT

8-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_9_BIT

9-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_10_BIT

10-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_11_BIT

11-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_12_BIT

12-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_13_BIT

13-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_14_BIT

14-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_15_BIT

15-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_16_BIT

16-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_17_BIT

17-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_18_BIT

18-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_19_BIT

19-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_20_BIT

20-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_21_BIT

21-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_22_BIT

22-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_23_BIT

23-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_24_BIT

24-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_25_BIT

25-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_26_BIT

26-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_27_BIT

27-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_28_BIT

28-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_29_BIT

29-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_30_BIT

30-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_31_BIT

31-bit length CRC

enumerator HAL_SPI_CRC_LENGTH_32_BIT

32-bit length CRC

enum hal_spi_crc_tx_init_pattern_t

HAL SPI TX CRC calculation initialization pattern enumeration definition.

Values:

enumerator HAL_SPI_CRC_TX_INIT_PATTERN_ALL_ZERO

CRC TX Initialization patterns configured to zero CRC TX Initialization patterns configured to zero

enumerator HAL_SPI_CRC_TX_INIT_PATTERN_ALL_ONE

CRC TX Initialization patterns configured to one CRC TX Initialization patterns configured to one

enum hal_spi_crc_rx_init_pattern_t

HAL SPI RX CRC calculation initialization pattern enumeration definition.

Values:

enumerator HAL_SPI_CRC_RX_INIT_PATTERN_ALL_ZERO

CRC RX Initialization patterns configured to zero CRC RX Initialization patterns configured to zero

enumerator HAL_SPI_CRC_RX_INIT_PATTERN_ALL_ONE

CRC RX Initialization patterns configured to one CRC RX Initialization patterns configured to one

enum hal_spi_nss_pulse_t

HAL SPI NSS pulse mode enumeration definition.

Values:

enumerator HAL_SPI_NSS_PULSE_DISABLE

Slave select IO pin is kept at active level till data transfer is completed, it becomes inactive with EOT flag Slave select IO pin is kept at active level till data transfer is completed, it becomes inactive with EOT flag

enumerator HAL_SPI_NSS_PULSE_ENABLE

SPI data frames are interleaved with slave select IO pin non active pulses when MIDI[3:0]>1 SPI data frames are interleaved with slave select IO pin non active pulses when MIDI[3:0]>1

enum hal_spi_nss_polarity_t

HAL SPI NSS polarity enumeration definition.

Values:

enumerator HAL_SPI_NSS_POLARITY_LOW

Low level is active for slave select signal Low level is active for slave select signal

enumerator HAL_SPI_NSS_POLARITY_HIGH

High level is active for slave select signal High level is active for slave select signal

enum hal_spi_nss_master_slave_signal_idleness_delay_t

HAL SPI Master slave select IO pin Idleness enumeration definition.

Values:

enumerator HAL_SPI_NSS_MSSI_DELAY_0_CYCLE

No extra delay No extra delay

enumerator HAL_SPI_NSS_MSSI_DELAY_1_CYCLE

1 clock cycle period delay added 1 clock cycle period delay added

enumerator HAL_SPI_NSS_MSSI_DELAY_2_CYCLE

2 clock cycle period delay added 2 clock cycles period delay added

enumerator HAL_SPI_NSS_MSSI_DELAY_3_CYCLE

3 clock cycle period delay added 3 clock cycles period delay added

enumerator HAL_SPI_NSS_MSSI_DELAY_4_CYCLE

4 clock cycle period delay added 4 clock cycles period delay added

enumerator HAL_SPI_NSS_MSSI_DELAY_5_CYCLE

5 clock cycle period delay added 5 clock cycles period delay added

enumerator HAL_SPI_NSS_MSSI_DELAY_6_CYCLE

6 clock cycle period delay added 6 clock cycles period delay added

enumerator HAL_SPI_NSS_MSSI_DELAY_7_CYCLE

7 clock cycle period delay added 7 clock cycles period delay added

enumerator HAL_SPI_NSS_MSSI_DELAY_8_CYCLE

8 clock cycle period delay added 8 clock cycles period delay added

enumerator HAL_SPI_NSS_MSSI_DELAY_9_CYCLE

9 clock cycle period delay added 9 clock cycles period delay added

enumerator HAL_SPI_NSS_MSSI_DELAY_10_CYCLE

10 clock cycle period delay added 10 clock cycles period delay added

enumerator HAL_SPI_NSS_MSSI_DELAY_11_CYCLE

11 clock cycle period delay added 11 clock cycles period delay added

enumerator HAL_SPI_NSS_MSSI_DELAY_12_CYCLE

12 clock cycle period delay added 12 clock cycles period delay added

enumerator HAL_SPI_NSS_MSSI_DELAY_13_CYCLE

13 clock cycle period delay added 13 clock cycles period delay added

enumerator HAL_SPI_NSS_MSSI_DELAY_14_CYCLE

14 clock cycle period delay added 14 clock cycles period delay added

enumerator HAL_SPI_NSS_MSSI_DELAY_15_CYCLE

15 clock cycle period delay added 15 clock cycles period delay added

enum hal_spi_master_inter_data_idleness_delay_t

HAL SPI Master Inter-Data Idleness enumeration definition.

Values:

enumerator HAL_SPI_MIDI_DELAY_0_CYCLE

No delay No delay

enumerator HAL_SPI_MIDI_DELAY_1_CYCLE

1 clock cycle period delay 1 clock cycle period delay

enumerator HAL_SPI_MIDI_DELAY_2_CYCLE

2 clock cycles period delay 2 clock cycles period delay

enumerator HAL_SPI_MIDI_DELAY_3_CYCLE

3 clock cycles period delay 3 clock cycles period delay

enumerator HAL_SPI_MIDI_DELAY_4_CYCLE

4 clock cycles period delay 4 clock cycles period delay

enumerator HAL_SPI_MIDI_DELAY_5_CYCLE

5 clock cycles period delay 5 clock cycles period delay

enumerator HAL_SPI_MIDI_DELAY_6_CYCLE

6 clock cycles period delay 6 clock cycles period delay

enumerator HAL_SPI_MIDI_DELAY_7_CYCLE

7 clock cycles period delay 7 clock cycles period delay

enumerator HAL_SPI_MIDI_DELAY_8_CYCLE

8 clock cycles period delay 8 clock cycles period delay

enumerator HAL_SPI_MIDI_DELAY_9_CYCLE

9 clock cycles period delay 9 clock cycles period delay

enumerator HAL_SPI_MIDI_DELAY_10_CYCLE

10 clock cycles period delay 10 clock cycles period delay

enumerator HAL_SPI_MIDI_DELAY_11_CYCLE

11 clock cycles period delay 11 clock cycles period delay

enumerator HAL_SPI_MIDI_DELAY_12_CYCLE

12 clock cycles period delay 12 clock cycles period delay

enumerator HAL_SPI_MIDI_DELAY_13_CYCLE

13 clock cycles period delay 13 clock cycles period delay

enumerator HAL_SPI_MIDI_DELAY_14_CYCLE

14 clock cycles period delay 14 clock cycles period delay

enumerator HAL_SPI_MIDI_DELAY_15_CYCLE

15 clock cycles period delay 15 clock cycles period delay

enum hal_spi_underrun_behavior_t

HAL SPI underrun behavior enumeration definition.

Values:

enumerator HAL_SPI_UNDERRUN_BEHAV_REGISTER_PATTERN

Slave sends a constant pattern defined by the user at the SPI_UDRDR register

enumerator HAL_SPI_UNDERRUN_BEHAV_LAST_RECEIVED

Slave repeats last received data from master Slave repeats last received data from master

enum hal_spi_ti_mode_status_t

HAL SPI TI mode feature status enumeration definition.

Values:

enumerator HAL_SPI_TI_MODE_DISABLED

TI mode feature disabled

enumerator HAL_SPI_TI_MODE_ENABLED

TI mode feature enabled

enum hal_spi_master_rx_auto_suspend_status_t

HAL SPI Master Receiver automatic suspension feature status enumeration definition.

Values:

enumerator HAL_SPI_MASTER_RX_AUTO_SUSPEND_DISABLED

Master receiver automatic suspension feature disabled

enumerator HAL_SPI_MASTER_RX_AUTO_SUSPEND_ENABLED

Master receiver automatic suspension feature enabled

enum hal_spi_master_keep_io_state_status_t

HAL SPI Master keep IO state feature status enumeration definition.

Values:

enumerator HAL_SPI_MASTER_KEEP_IO_STATE_DISABLED

Master keep IO state feature disabled

enumerator HAL_SPI_MASTER_KEEP_IO_STATE_ENABLED

Master keep IO state feature enabled

enum hal_spi_mosi_miso_swap_status_t

HAL SPI io swap feature status enumeration definition.

Values:

enumerator HAL_SPI_MOSI_MISO_SWAP_DISABLED

IO swap feature disabled

enumerator HAL_SPI_MOSI_MISO_SWAP_ENABLED

IO swap feature enabled

enum hal_spi_ready_pin_status_t

HAL SPI ready pin feature status enumeration definition.

Values:

enumerator HAL_SPI_READY_PIN_DISABLED

Ready pin feature disabled

enumerator HAL_SPI_READY_PIN_ENABLED

Ready pin feature enabled

enum hal_spi_ready_pin_polarity_t

HAL SPI ready pin input/output polarity enumeration definition.

Values:

enumerator HAL_SPI_READY_PIN_POLARITY_HIGH

High level of the signal means the slave is ready for communication

enumerator HAL_SPI_READY_PIN_POLARITY_LOW

Low level of the signal means the slave is ready for communication

enum hal_spi_drds_status_t

HAL SPI Delay Read Data Sampling feature status enumeration definition.

Values:

enumerator HAL_SPI_DRDS_DISABLED

Delay Read Data Sampling feature disabled

enumerator HAL_SPI_DRDS_ENABLED

Delay Read Data Sampling feature enabled

enum hal_spi_io_cfg_status_t

HAL SPI io configuration feature status enumeration definition.

Values:

enumerator HAL_SPI_IO_CFG_UNLOCKED

IO configuration feature unlocked

enumerator HAL_SPI_IO_CFG_LOCKED

IO configuration feature locked

enum hal_spi_fifo_threshold_t

HAL SPI FIFO threshold level enumeration definition.

Values:

enumerator HAL_SPI_FIFO_THRESHOLD_1_DATA

1-data

enumerator HAL_SPI_FIFO_THRESHOLD_2_DATA

2-data

enumerator HAL_SPI_FIFO_THRESHOLD_3_DATA

3-data

enumerator HAL_SPI_FIFO_THRESHOLD_4_DATA

4-data

enumerator HAL_SPI_FIFO_THRESHOLD_5_DATA

5-data

enumerator HAL_SPI_FIFO_THRESHOLD_6_DATA

6-data

enumerator HAL_SPI_FIFO_THRESHOLD_7_DATA

7-data

enumerator HAL_SPI_FIFO_THRESHOLD_8_DATA

8-data

enumerator HAL_SPI_FIFO_THRESHOLD_9_DATA

9-data

enumerator HAL_SPI_FIFO_THRESHOLD_10_DATA

10-data

enumerator HAL_SPI_FIFO_THRESHOLD_11_DATA

11-data

enumerator HAL_SPI_FIFO_THRESHOLD_12_DATA

12-data

enumerator HAL_SPI_FIFO_THRESHOLD_13_DATA

13-data

enumerator HAL_SPI_FIFO_THRESHOLD_14_DATA

14-data

enumerator HAL_SPI_FIFO_THRESHOLD_15_DATA

15-data

enumerator HAL_SPI_FIFO_THRESHOLD_16_DATA

16-data

struct hal_spi_handle_s
#include <stm32c5xx_hal_spi.h>

HAL SPI handle structure definition.

Public Members

hal_spi_t instance

SPI instance

hal_spi_direction_t direction

SPI direction

volatile hal_spi_state_t global_state

SPI state

volatile uint32_t last_error_codes

SPI Error code

hal_os_semaphore_t semaphore

SPI OS semaphore

const uint8_t * p_tx_buff

Pointer to SPI Tx transfer Buffer

uint16_t tx_xfer_size

SPI Tx Transfer size

volatile uint16_t tx_xfer_count

SPI Tx Transfer Counter

uint8_t * p_rx_buff

Pointer to SPI Rx transfer Buffer

uint16_t rx_xfer_size

SPI Rx Transfer size

volatile uint16_t rx_xfer_count

SPI Rx Transfer Counter

void ( * p_rx_isr ) ( struct hal_spi_handle_s * hspi )

Function pointer on Rx ISR

void ( * p_tx_isr ) ( struct hal_spi_handle_s * hspi )

Function pointer on Tx ISR

hal_dma_handle_t * hdma_tx

SPI Tx DMA Handle parameters

hal_dma_handle_t * hdma_rx

SPI Rx DMA Handle parameters

const void * p_user_data

User Data Pointer

void ( * p_tx_cplt_cb ) ( struct hal_spi_handle_s * hspi )

SPI Tx Completed callback

void ( * p_rx_cplt_cb ) ( struct hal_spi_handle_s * hspi )

SPI Rx Completed callback

void ( * p_tx_rx_cplt_cb ) ( struct hal_spi_handle_s * hspi )

SPI TxRx Completed callback

void ( * p_tx_half_cplt_cb ) ( struct hal_spi_handle_s * hspi )

SPI Tx Half Completed callback

void ( * p_rx_half_cplt_cb ) ( struct hal_spi_handle_s * hspi )

SPI Rx Half Completed callback

void ( * p_tx_rx_half_cplt_cb ) ( struct hal_spi_handle_s * hspi )

SPI TxRx Half Completed callback

void ( * p_error_cb ) ( struct hal_spi_handle_s * hspi )

SPI Error callback

void ( * p_abort_cplt_cb ) ( struct hal_spi_handle_s * hspi )

SPI Abort callback

void ( * p_suspend_cb ) ( struct hal_spi_handle_s * hspi )

SPI Suspend callback

struct hal_spi_config_t
#include <stm32c5xx_hal_spi.h>

HAL SPI configuration structure definition.

Public Members

hal_spi_mode_t mode

The SPI operating mode.

hal_spi_direction_t direction

The SPI bidirectional mode state.

hal_spi_data_width_t data_width

The SPI data width.

hal_spi_clock_polarity_t clock_polarity

The serial clock steady state.

hal_spi_clock_phase_t clock_phase

The clock active edge for the bit capture.

hal_spi_baud_rate_prescaler_t baud_rate_prescaler

The Baud Rate prescaler value which will be used to configure the transmit and receive SCK clock.

hal_spi_first_bit_t first_bit

Specifies whether data transfers start from MSB or LSB bit.

hal_spi_nss_pin_management_t nss_pin_management

SPI Slave Select Pin Management .

struct hal_spi_crc_config_t
#include <stm32c5xx_hal_spi.h>

HAL SPI CRC configuration structure definition.

Public Members

uint32_t crc_polynomial

The polynomial used for the CRC calculation. This parameter must be an odd number between Min_Data = 0 and Max_Data = 65535

hal_spi_crc_length_t crc_length

The CRC Length used for the CRC calculation.

hal_spi_crc_tx_init_pattern_t crc_tx_init_pattern

The transmitter CRC initialization Pattern used for the CRC calculation.

hal_spi_crc_rx_init_pattern_t crc_rx_init_pattern

The receiver CRC initialization Pattern used for the CRC calculation.

struct hal_spi_nss_config_t
#include <stm32c5xx_hal_spi.h>

HAL SPI NSS configuration structure definition.

Public Members

hal_spi_nss_pulse_t nss_pulse

Specifies whether the NSS signal is managed by hardware

hal_spi_nss_polarity_t nss_polarity

Specifies which level of slave select input/output external signal (present on SS pin) considered as active one.

hal_spi_nss_master_slave_signal_idleness_delay_t nss_mssi_delay

Specifies an extra delay, expressed in number of SPI clock cycle periods, inserted additionally between active edge of slave select opening a session and the beginning of the first data frame of the session in Master mode when SSOE is enabled. This feature is not supported in TI mode. To include the delay, the SPI must be disabled and re-enabled between sessions.

struct hal_spi_underrun_config_t
#include <stm32c5xx_hal_spi.h>

HAL SPI underrun detection configuration structure definition.

Public Members

hal_spi_underrun_behavior_t underrun_behavior

Behavior of slave transmitter at underrun condition