LL ADC Functions

ADC DMA management

group ADC_LL_EF_DMA_Management

Functions

uint32_t LL_ADC_DMA_GetRegAddr ( const ADC_TypeDef * p_adc , uint32_t register_sel )

Function to help to configure DMA transfer from ADC: retrieve the ADC register address from ADC instance and a list of ADC registers intended to be used (most commonly) with DMA transfer.

Reference Manual to LL API cross reference (Register Field Functions)

DR RDATA LL_ADC_DMA_GetRegAddr

CDR RDATA_MST LL_ADC_DMA_GetRegAddr

CDR RDATA_SLV LL_ADC_DMA_GetRegAddr

CDR2 RDATA_ALT LL_ADC_DMA_GetRegAddr

Note

These ADC registers are data registers: when ADC conversion data is available in ADC data registers, ADC generates a DMA transfer request.

Note

This macro is intended to be used with LL DMA driver, refer to function “LL_DMA_ConfigAddresses()”. Example: LL_DMA_ConfigAddresses(DMA1, LL_DMA_CHANNEL_1, LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA), (uint32_t)&< array or variable >, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);

Note

For devices with several ADC: in multimode, some devices use a different data register outside of ADC instance scope (common data register). This macro manages this register difference, only ADC instance has to be set as parameter.

Parameters :
Return values :

ADC – register address

Configuration of ADC hierarchical scope:

group ADC_LL_EF_Configuration_ADC_Common

common to several ADC instances

Functions

void LL_ADC_SetCommonPathInternalChAdd ( ADC_Common_TypeDef * p_adc_common , uint32_t path_internal )

Set parameter common to several ADC: measurement path to internal channels (VrefInt, temperature sensor, …). Add paths to the current configuration.

Reference Manual to LL API cross reference (Register Field Functions)

CCR VREFEN LL_ADC_SetCommonPathInternalChAdd

CCR TSEN LL_ADC_SetCommonPathInternalChAdd

Note

Stabilization time of measurement path to internal channel: After enabling internal paths, before starting ADC conversion, a delay is required for internal voltage reference and temperature sensor stabilization time. Refer to device datasheet. Refer to literal LL_ADC_DELAY_VREFINT_STAB_US. Refer to literals LL_ADC_DELAY_TEMPSENSOR_STAB_US,

Note

ADC internal channel sampling time constraint: For ADC conversion of internal channels, a sampling time minimum value is required. Refer to device datasheet.

Note

On this STM32 series, setting of this feature is conditioned to ADC state: All ADC instances of the ADC common group must be disabled.

Parameters :

  • p_adc_common – Pointer to ADC common instance (can be set directly from CMSIS definition ADCxy_COMMON or using macro ADC_COMMON_INSTANCE())

  • path_internal – This parameter can be one of the following values:

    • LL_ADC_CHANNEL_VREFINT (1)

    • LL_ADC_CHANNEL_TEMPSENSOR (1)

    • LL_ADC_CHANNEL_VDDCORE (1)

    • LL_ADC_CHANNEL_OPAMP1_OUT (1)

    • LL_ADC_CHANNEL_OPAMP2_OUT (1)

    • LL_ADC_CHANNEL_OPAMP3_OUT (1)

    • LL_ADC_CHANNEL_VREFINT_ALT (2)

    • LL_ADC_CHANNEL_VDDCORE_ALT (2)

    • LL_ADC_CHANNEL_OPAMP1_OUT_ALT (2)

    • LL_ADC_CHANNEL_OPAMP2_OUT_ALT (2)

    • LL_ADC_CHANNEL_VREFINT_ALT2 (3)

    • LL_ADC_CHANNEL_VDDCORE_ALT2 (3)

    • LL_ADC_CHANNEL_OPAMP3_OUT_ALT (3)

    (1) On this STM32 series, parameter available only on ADC instance: ADC1.

    (2) On this STM32 series, parameter available only on ADC instance: ADC2.

    (3) On this STM32 series, parameter available only on ADC instance: ADC3.

void LL_ADC_SetCommonPathInternalChRem ( ADC_Common_TypeDef * p_adc_common , uint32_t path_internal )

Set parameter common to several ADC: measurement path to internal channels (VrefInt, temperature sensor, …). Remove paths to the current configuration.

Reference Manual to LL API cross reference (Register Field Functions)

CCR VREFEN LL_ADC_SetCommonPathInternalChRem

CCR TSEN LL_ADC_SetCommonPathInternalChRem

Note

On this STM32 series, setting of this feature is conditioned to ADC state: All ADC instances of the ADC common group must be disabled.

Parameters :

  • p_adc_common – Pointer to ADC common instance (can be set directly from CMSIS definition ADCxy_COMMON or using macro ADC_COMMON_INSTANCE())

  • path_internal – This parameter can be one of the following values:

    • LL_ADC_CHANNEL_VREFINT (1)

    • LL_ADC_CHANNEL_TEMPSENSOR (1)

    • LL_ADC_CHANNEL_VDDCORE (1)

    • LL_ADC_CHANNEL_OPAMP1_OUT (1)

    • LL_ADC_CHANNEL_OPAMP2_OUT (1)

    • LL_ADC_CHANNEL_OPAMP3_OUT (1)

    • LL_ADC_CHANNEL_VREFINT_ALT (2)

    • LL_ADC_CHANNEL_VDDCORE_ALT (2)

    • LL_ADC_CHANNEL_OPAMP1_OUT_ALT (2)

    • LL_ADC_CHANNEL_OPAMP2_OUT_ALT (2)

    • LL_ADC_CHANNEL_VREFINT_ALT2 (3)

    • LL_ADC_CHANNEL_VDDCORE_ALT2 (3)

    • LL_ADC_CHANNEL_OPAMP3_OUT_ALT (3)

    (1) On this STM32 series, parameter available only on ADC instance: ADC1.

    (2) On this STM32 series, parameter available only on ADC instance: ADC2.

    (3) On this STM32 series, parameter available only on ADC instance: ADC3.

void LL_ADC_SetCommonPathInternalCh ( ADC_Common_TypeDef * p_adc_common , uint32_t path_internal )

Set parameter common to several ADC: measurement path to internal channels (VrefInt, temperature sensor, …).

Reference Manual to LL API cross reference (Register Field Functions)

CCR VREFEN LL_ADC_SetCommonPathInternalCh

CCR TSEN LL_ADC_SetCommonPathInternalCh

Note

Stabilization time of measurement path to internal channel: After enabling internal paths, before starting ADC conversion, a delay is required for internal voltage reference and temperature sensor stabilization time. Refer to device datasheet. Refer to literal LL_ADC_DELAY_VREFINT_STAB_US. Refer to literal LL_ADC_DELAY_TEMPSENSOR_STAB_US.

Note

ADC internal channel sampling time constraint: For ADC conversion of internal channels, a sampling time minimum value is required. Refer to device datasheet.

Note

On this STM32 series, setting of this feature is conditioned to ADC state: All ADC instances of the ADC common group must be disabled.

Parameters :

  • p_adc_common – Pointer to ADC common instance (can be set directly from CMSIS definition ADCxy_COMMON or using macro ADC_COMMON_INSTANCE())

  • path_internal – This parameter can be one of literal LL_ADC_PATH_INTERNAL_x or one of the following values:

    • LL_ADC_CHANNEL_VREFINT (1)

    • LL_ADC_CHANNEL_TEMPSENSOR (1)

    • LL_ADC_CHANNEL_VDDCORE (1)

    • LL_ADC_CHANNEL_OPAMP1_OUT (1)

    • LL_ADC_CHANNEL_OPAMP2_OUT (1)

    • LL_ADC_CHANNEL_OPAMP3_OUT (1)

    • LL_ADC_CHANNEL_VREFINT_ALT (2)

    • LL_ADC_CHANNEL_VDDCORE_ALT (2)

    • LL_ADC_CHANNEL_OPAMP1_OUT_ALT (2)

    • LL_ADC_CHANNEL_OPAMP2_OUT_ALT (2)

    • LL_ADC_CHANNEL_VREFINT_ALT2 (3)

    • LL_ADC_CHANNEL_VDDCORE_ALT2 (3)

    • LL_ADC_CHANNEL_OPAMP3_OUT_ALT (3)

    (1) On this STM32 series, parameter available only on ADC instance: ADC1.

    (2) On this STM32 series, parameter available only on ADC instance: ADC2.

    (3) On this STM32 series, parameter available only on ADC instance: ADC3.

uint32_t LL_ADC_GetCommonPathInternalCh ( const ADC_Common_TypeDef * p_adc_common )

Get parameter common to several ADC: measurement path to internal channels (VrefInt, temperature sensor, …).

Reference Manual to LL API cross reference (Register Field Functions)

CCR VREFEN LL_ADC_GetCommonPathInternalCh

CCR TSEN LL_ADC_GetCommonPathInternalCh

Note

One or several values can be selected. Example: (LL_ADC_PATH_INTERNAL_VREFINT | LL_ADC_PATH_INTERNAL_TEMPSENSOR)

Parameters :

p_adc_common – Pointer to ADC common instance (can be set directly from CMSIS definition ADCxy_COMMON or using macro ADC_COMMON_INSTANCE())

Return values :

Returned – value can be a combination of literals LL_ADC_PATH_INTERNAL_x.

Configuration of ADC hierarchical scope: ADC instance

group ADC_LL_EF_Configuration_ADC_Instance

Functions

void LL_ADC_SetCalibrationFactor ( ADC_TypeDef * p_adc , uint32_t input_mode , uint32_t calibration_factor )

Set ADC calibration factor in the mode single-ended or differential (for devices with differential mode available).

Reference Manual to LL API cross reference (Register Field Functions)

CALFACT CALFACT_S LL_ADC_SetCalibrationFactor

CALFACT CALFACT_D LL_ADC_SetCalibrationFactor

Note

This function is intended to set calibration parameters without having to perform a new calibration using LL_ADC_StartCalibration().

Note

On this STM32 series, setting of this feature is conditioned to ADC state: ADC must be enabled, without calibration ongoing, without conversion ongoing on group regular.

Parameters :

  • p_adc – Pointer to ADC instance

  • input_mode – This parameter can be one of the following values:

  • calibration_factor – Value between Min_Data=0x00 and Max_Data=0x7F

uint32_t LL_ADC_GetCalibrationFactor ( const ADC_TypeDef * p_adc , uint32_t input_mode )

Get ADC calibration factor in mode single-ended or differential (for devices with differential mode available).

Reference Manual to LL API cross reference (Register Field Functions)

CALFACT CALFACT_S LL_ADC_GetCalibrationFactor

CALFACT CALFACT_D LL_ADC_GetCalibrationFactor

Note

Calibration factors are set by hardware after performing a calibration run using function LL_ADC_StartCalibration().

Parameters :

  • p_adc – Pointer to ADC instance

  • input_mode – This parameter can be one of the following values:

Return values :

Value – between Min_Data=0x00 and Max_Data=0x1FF

void LL_ADC_SetResolution ( ADC_TypeDef * p_adc , uint32_t resolution )

Set ADC resolution. Refer to reference manual for alignments formats dependencies to ADC resolutions.

Reference Manual to LL API cross reference (Register Field Functions)

CFGR1 RES LL_ADC_SetResolution

Note

On this STM32 series, setting of this feature is conditioned to ADC state: ADC must be disabled or enabled without conversion ongoing on either groups regular or injected.

Parameters :
uint32_t LL_ADC_GetResolution ( const ADC_TypeDef * p_adc )

Get ADC resolution. Refer to reference manual for alignments formats dependencies to ADC resolutions.

Reference Manual to LL API cross reference (Register Field Functions)

CFGR1 RES LL_ADC_GetResolution

Parameters :

p_adc – Pointer to ADC instance

Return values :

Returned – value can be one of the following values:

void LL_ADC_SetLeftBitShift ( ADC_TypeDef * p_adc , uint32_t left_bit_shift )

Set ADC conversion data left bit shift for ADC groups regular and injected conversions.

Reference Manual to LL API cross reference (Register Field Functions)

CFGR2 LSHIFT LL_ADC_SetLeftBitShift

Note

On this STM32 series, setting of this feature is conditioned to ADC state: ADC must be disabled or enabled without conversion ongoing on group regular.

Parameters :
uint32_t LL_ADC_GetLeftBitShift ( const ADC_TypeDef * p_adc )

Get ADC conversion data left bit shift for ADC groups regular and injected conversions.

Reference Manual to LL API cross reference (Register Field Functions)

CFGR2 LSHIFT LL_ADC_GetLeftBitShift

Parameters :

p_adc – Pointer to ADC instance

Return values :

Returned – value can be one of the following values:

void LL_ADC_SetLowPowerMode ( ADC_TypeDef * p_adc , uint32_t low_power_mode )

Set ADC low power mode.

Reference Manual to LL API cross reference (Register Field Functions)

CFGR1 AUTDLY LL_ADC_SetLowPowerMode

Note

Description of ADC low power modes:

  • ADC low power mode “auto wait”: Dynamic low power mode, ADC conversions occurrences are limited to the minimum necessary in order to reduce power consumption. New ADC conversion starts only when the previous unitary conversion data (for ADC group regular) or previous sequence conversions data (for ADC group injected) has been retrieved by user software. In the meantime, ADC remains idle: does not performs any other conversion. This mode allows to automatically adapt the ADC conversions triggers to the speed of the software that reads the data. Moreover, this avoids risk of overrun for low frequency applications. How to use this low power mode:

    • It is not recommended to use with interruption or DMA since these modes have to clear immediately the EOC flag (by CPU to free the IRQ pending event or by DMA). Auto wait will work but fort a very short time, discarding its intended benefit (except specific case of high load of CPU or DMA transfers which can justify usage of auto wait).

    • Do use with polling: 1. Start conversion,

      1. Later on, when conversion data is needed: poll for end of conversion to ensure that conversion is completed and retrieve ADC conversion data. This will trig another ADC conversion start.

  • ADC low power mode “auto power-off” (feature available on this device if parameter LL_ADC_LP_AUTOPOWEROFF is available): the ADC automatically powers-off after a conversion and automatically wakes up when a new conversion is triggered (with startup time between trigger and start of sampling). This feature can be combined with low power mode “auto wait”.

Note

With ADC low power mode “auto wait”, the ADC conversion data read is corresponding to previous ADC conversion start, independently of delay during which ADC was idle. Therefore, the ADC conversion data can be outdated: does not correspond to the current voltage level on the selected ADC channel.

Note

On this STM32 series, setting of this feature is conditioned to ADC state: ADC must be disabled or enabled without conversion ongoing on either groups regular or injected.

Parameters :
uint32_t LL_ADC_GetLowPowerMode ( const ADC_TypeDef * p_adc )

Get ADC low power mode.

Reference Manual to LL API cross reference (Register Field Functions)

CFGR1 AUTDLY LL_ADC_GetLowPowerMode

Note

Description of ADC low power modes:

  • ADC low power mode “auto wait”: Dynamic low power mode, ADC conversions occurrences are limited to the minimum necessary in order to reduce power consumption. New ADC conversion starts only when the previous unitary conversion data (for ADC group regular) or previous sequence conversions data (for ADC group injected) has been retrieved by user software. In the meantime, ADC remains idle: does not performs any other conversion. This mode allows to automatically adapt the ADC conversions triggers to the speed of the software that reads the data. Moreover, this avoids risk of overrun for low frequency applications. How to use this low power mode:

    • It is not recommended to use with interruption or DMA since these modes have to clear immediately the EOC flag (by CPU to free the IRQ pending event or by DMA). Auto wait will work but fort a very short time, discarding its intended benefit (except specific case of high load of CPU or DMA transfers which can justify usage of auto wait).

    • Do use with polling: 1. Start conversion,

      1. Later on, when conversion data is needed: poll for end of conversion to ensure that conversion is completed and retrieve ADC conversion data. This will trig another ADC conversion start.

  • ADC low power mode “auto power-off” (feature available on this device if parameter LL_ADC_LP_AUTOPOWEROFF is available): the ADC automatically powers-off after a conversion and automatically wakes up when a new conversion is triggered (with startup time between trigger and start of sampling). This feature can be combined with low power mode “auto wait”.

Note

With ADC low power mode “auto wait”, the ADC conversion data read is corresponding to previous ADC conversion start, independently of delay during which ADC was idle. Therefore, the ADC conversion data can be outdated: does not correspond to the current voltage level on the selected ADC channel.

Parameters :

p_adc – Pointer to ADC instance

Return values :

Returned – value can be one of the following values:

void LL_ADC_SetGainCompensation ( ADC_TypeDef * p_adc , uint32_t gain_compensation )

Set ADC gain compensation applied to raw converted data.

Reference Manual to LL API cross reference (Register Field Functions)

GCOMP GCOMPCOEFF LL_ADC_SetGainCompensation

CFGR2 GCOMP LL_ADC_SetGainCompensation

Note

ADC conversion raw data is computed with gain value using the formula: DATA = DATA(raw) * (gain compensation coef) / 4096 Therefore, value 4096 corresponds to unitary gain gain (gain compensation disabled)

Note

Gain compensation is applied to all ADC conversions (independently of groups or channels).

Note

On this STM32 series, setting of this feature is conditioned to ADC state: ADC must be disabled or enabled without conversion ongoing on either groups regular or injected.

Parameters :

  • p_adc – Pointer to ADC instance

  • gain_compensation – Gain compensation enable state and value. Value between Min_Data=0 and Max_Data=16393

uint32_t LL_ADC_GetGainCompensation ( const ADC_TypeDef * p_adc )

Get the ADC gain compensation value.

Reference Manual to LL API cross reference (Register Field Functions)

GCOMP GCOMPCOEFF LL_ADC_GetGainCompensation

CFGR2 GCOMP LL_ADC_GetGainCompensation

Parameters :

p_adc – Pointer to ADC instance

Return values :

Returned – value between Min_Data=0 and Max_Data=16393

Configuration of ADC hierarchical scope: group regular

group ADC_LL_EF_Configuration_ADC_Group_Regular

Functions

void LL_ADC_REG_SetTriggerSource ( ADC_TypeDef * p_adc , uint32_t trigger_source )

Set ADC group regular conversion trigger source: internal (SW start) or from external peripheral (timer event, EXTI line).

Reference Manual to LL API cross reference (Register Field Functions)

CFGR1 EXTSEL LL_ADC_REG_SetTriggerSource

CFGR1 EXTEN LL_ADC_REG_SetTriggerSource

Note

On this STM32 series, setting trigger source to external trigger also set trigger polarity to rising edge (default setting for compatibility with some ADC on other STM32 series having this setting set by HW default value). In case of need to modify trigger edge, use function LL_ADC_REG_SetTriggerEdge().

Note

Availability of parameters of trigger sources from timer depends on timers availability on the selected device.

Note

On this STM32 series, setting of this feature is conditioned to ADC state: ADC must be disabled or enabled without conversion ongoing on group regular.

Parameters :
uint32_t LL_ADC_REG_GetTriggerSource ( const ADC_TypeDef * p_adc )

Get ADC group regular conversion trigger source: internal (SW start) or from external peripheral (timer event, EXTI line).

Reference Manual to LL API cross reference (Register Field Functions)

CFGR1 EXTSEL LL_ADC_REG_GetTriggerSource

CFGR1 EXTEN LL_ADC_REG_GetTriggerSource

Note

To determine whether group regular trigger source is internal (SW start) or external, without detail of which peripheral is selected as external trigger, (equivalent to “if(LL_ADC_REG_GetTriggerSource(ADC1) == LL_ADC_REG_TRIG_SOFTWARE)”) use function LL_ADC_REG_IsTriggerSourceSWStart.

Note

Availability of parameters of trigger sources from timer depends on timers availability on the selected device.

Parameters :

p_adc – Pointer to ADC instance

Return values :

Returned – value can be one of the following values:

uint32_t LL_ADC_REG_IsTriggerSourceSWStart ( const ADC_TypeDef * p_adc )

Get ADC group regular conversion trigger source internal (SW start) or external.

Reference Manual to LL API cross reference (Register Field Functions)

CFGR1 EXTEN LL_ADC_REG_IsTriggerSourceSWStart

Note

In case of group regular trigger source set to external trigger, to determine which peripheral is selected as external trigger, use function LL_ADC_REG_GetTriggerSource().

Parameters :

p_adc – Pointer to ADC instance

Return values :

Value – “0” if trigger source external trigger Value “1” if trigger source SW start.

void LL_ADC_REG_SetTriggerEdge ( ADC_TypeDef * p_adc , uint32_t external_trigger_edge )

Set ADC group regular conversion trigger polarity.

Reference Manual to LL API cross reference (Register Field Functions)

CFGR1 EXTEN LL_ADC_REG_SetTriggerEdge

Note

Applicable only for trigger source set to external trigger.

Note

On this STM32 series, setting of this feature is conditioned to ADC state: ADC must be disabled or enabled without conversion ongoing on group regular.

Parameters :
uint32_t LL_ADC_REG_GetTriggerEdge ( const ADC_TypeDef * p_adc )

Get ADC group regular conversion trigger polarity.

Reference Manual to LL API cross reference (Register Field Functions)

CFGR1 EXTEN LL_ADC_REG_GetTriggerEdge

Note

Applicable only for trigger source set to external trigger.

Parameters :

p_adc – Pointer to ADC instance

Return values :

Returned – value can be one of the following values:

void LL_ADC_SetSamplingMode ( ADC_TypeDef * p_adc , uint32_t sampling_mode )

Set ADC sampling mode. ADC state: ADC must be disabled or enabled without conversion ongoing on group regular.

Reference Manual to LL API cross reference (Register Field Functions)

CFGR2 BULB LL_ADC_SetSamplingMode

CFGR2 SMPTRIG LL_ADC_SetSamplingMode

Note

On this STM32 series, setting of this feature is conditioned to ADC state: ADC must be disabled or enabled without conversion ongoing on group regular.

Parameters :
uint32_t LL_ADC_GetSamplingMode ( const ADC_TypeDef * p_adc )

Get the ADC sampling mode.

Reference Manual to LL API cross reference (Register Field Functions)

CFGR2 BULB LL_ADC_GetSamplingMode

CFGR2 SMPTRIG LL_ADC_GetSamplingMode

Parameters :

p_adc – Pointer to ADC instance

Return values :

Returned – value can be one of the following values:

void LL_ADC_REG_StartSamplingPhase ( ADC_TypeDef * p_adc )

Start ADC sampling phase for sampling time trigger mode.

Reference Manual to LL API cross reference (Register Field Functions)

CFGR2 SWTRIG LL_ADC_REG_StartSamplingPhase

Note

This function is relevant only when

Note

On this STM32 series, setting of this feature is conditioned to ADC state: ADC must be enabled without conversion ongoing on group regular, without conversion stop command ongoing on group regular, without ADC disable command ongoing.

Parameters :

p_adc – Pointer to ADC instance

void LL_ADC_REG_StopSamplingPhase ( ADC_TypeDef * p_adc )

Stop ADC sampling phase for sampling time trigger mode and start conversion.

Reference Manual to LL API cross reference (Register Field Functions)

CFGR2 SWTRIG LL_ADC_REG_StopSamplingPhase

Note

This function is relevant only when

Note

On this STM32 series, setting of this feature is conditioned to ADC state: ADC must be enabled without conversion ongoing on group regular, without conversion stop command ongoing on group regular, without ADC disable command ongoing.

Parameters :

p_adc – Pointer to ADC instance

void LL_ADC_REG_SetSequencerLength ( ADC_TypeDef * p_adc , uint32_t sequencer_nb_ranks )

Set ADC group regular sequencer length and scan direction.

Reference Manual to LL API cross reference (Register Field Functions)

SQR1 LEN LL_ADC_REG_SetSequencerLength

Note

Description of ADC group regular sequencer features:

  • For devices with sequencer fully configurable (function “LL_ADC_REG_SetSequencerRanks()” available): sequencer length and each rank affectation to a channel are configurable. This function performs configuration of:

    • Sequence length: Number of ranks in the scan sequence. Sequencer ranks are selected using function “LL_ADC_REG_SetSequencerRanks()”.

  • For devices with sequencer not fully configurable (function “LL_ADC_REG_SetSequencerChannels()” available): sequencer length and each rank affectation to a channel are defined by channel number. This function performs configuration of:

    • Sequence length: Number of ranks in the scan sequence is defined by number of channels set in the sequence, rank of each channel is fixed by channel HW number. (channel 0 fixed on rank 0, channel 1 fixed on rank1, …).

Note

Sequencer disabled is equivalent to sequencer of 1 rank: ADC conversion on only 1 channel.

Note

On this STM32 series, setting of this feature is conditioned to ADC state: ADC must be disabled or enabled without conversion ongoing on group regular.

Parameters :
uint32_t LL_ADC_REG_GetSequencerLength ( const ADC_TypeDef * p_adc )

Get ADC group regular sequencer length and scan direction.

Reference Manual to LL API cross reference (Register Field Functions)

SQR1 LEN LL_ADC_REG_GetSequencerLength

Note

Description of ADC group regular sequencer features:

  • For devices with sequencer fully configurable (function “LL_ADC_REG_SetSequencerRanks()” available): sequencer length and each rank affectation to a channel are configurable. This function retrieves:

    • Sequence length: Number of ranks in the scan sequence. Sequencer ranks are selected using function “LL_ADC_REG_SetSequencerRanks()”.

  • For devices with sequencer not fully configurable (function “LL_ADC_REG_SetSequencerChannels()” available): sequencer length and each rank affectation to a channel are defined by channel number. This function retrieves:

    • Sequence length: Number of ranks in the scan sequence is defined by number of channels set in the sequence, rank of each channel is fixed by channel HW number. (channel 0 fixed on rank 0, channel 1 fixed on rank1, …). Sequencer ranks are selected using function “LL_ADC_REG_SetSequencerChannels()”.

Note

Sequencer disabled is equivalent to sequencer of 1 rank: ADC conversion on only 1 channel.

Parameters :

p_adc – Pointer to ADC instance

Return values :

Returned – value can be one of the following values:

void LL_ADC_REG_SetSequencerDiscont ( ADC_TypeDef * p_adc , uint32_t seq_discont )

Set ADC group regular sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.

Reference Manual to LL API cross reference (Register Field Functions)

CFGR1 DISCEN LL_ADC_REG_SetSequencerDiscont

CFGR1 DISCNUM LL_ADC_REG_SetSequencerDiscont

Note

It is not possible to enable both ADC group regular continuous mode and sequencer discontinuous mode.

Note

It is not possible to enable both ADC auto-injected mode and ADC group regular sequencer discontinuous mode.

Note

On this STM32 series, setting of this feature is conditioned to ADC state: ADC must be disabled or enabled without conversion ongoing on group regular.

Parameters :
uint32_t LL_ADC_REG_GetSequencerDiscont ( const ADC_TypeDef * p_adc )

Get ADC group regular sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.

Reference Manual to LL API cross reference (Register Field Functions)

CFGR1 DISCEN LL_ADC_REG_GetSequencerDiscont

CFGR1 DISCNUM LL_ADC_REG_GetSequencerDiscont

Parameters :

p_adc – Pointer to ADC instance

Return values :

Returned – value can be one of the following values:

void LL_ADC_REG_SetSequencerRanks ( ADC_TypeDef * p_adc , uint32_t rank , uint32_t channel )

Set ADC group regular sequence: channel on the selected scan sequence rank.

Reference Manual to LL API cross reference (Register Field Functions)

SQR1 SQ1 LL_ADC_REG_SetSequencerRanks

SQR1 SQ2 LL_ADC_REG_SetSequencerRanks

SQR1 SQ3 LL_ADC_REG_SetSequencerRanks

SQR1 SQ4 LL_ADC_REG_SetSequencerRanks

SQR2 SQ5 LL_ADC_REG_SetSequencerRanks

SQR2 SQ6 LL_ADC_REG_SetSequencerRanks

SQR2 SQ7 LL_ADC_REG_SetSequencerRanks

SQR2 SQ8 LL_ADC_REG_SetSequencerRanks

SQR2 SQ9 LL_ADC_REG_SetSequencerRanks

SQR3 SQ10 LL_ADC_REG_SetSequencerRanks

SQR3 SQ11 LL_ADC_REG_SetSequencerRanks

SQR3 SQ12 LL_ADC_REG_SetSequencerRanks

SQR3 SQ13 LL_ADC_REG_SetSequencerRanks

SQR3 SQ14 LL_ADC_REG_SetSequencerRanks

SQR4 SQ15 LL_ADC_REG_SetSequencerRanks

SQR4 SQ16 LL_ADC_REG_SetSequencerRanks

Note

This function performs configuration of:

  • Channels ordering into each rank of scan sequence: whatever channel can be placed into whatever rank.

Note

On this STM32 series, ADC group regular sequencer is fully configurable: sequencer length and each rank affectation to a channel are configurable. Refer to description of function LL_ADC_REG_SetSequencerLength().

Note

Depending on devices and packages, some channels can be not available. Refer to device datasheet for channels availability.

Note

On this STM32 series, to measure internal channels (VrefInt, TempSensor, …), measurement paths to internal channels must be enabled separately. This can be done using function LL_ADC_SetCommonPathInternalCh().

Note

On this STM32 series, setting of this feature is conditioned to ADC state: ADC must be disabled or enabled without conversion ongoing on group regular.

Parameters :