LL TIM Constants

Get Flags Defines

group TIM_LL_EC_GET_FLAG

Flags defines which can be used with LL_TIM_READ_REG function.

Defines

LL_TIM_SR_UIF TIM_SR_UIF

Update interrupt flag

LL_TIM_SR_CC1IF TIM_SR_CC1IF

Capture/compare 1 interrupt flag

LL_TIM_SR_CC2IF TIM_SR_CC2IF

Capture/compare 2 interrupt flag

LL_TIM_SR_CC3IF TIM_SR_CC3IF

Capture/compare 3 interrupt flag

LL_TIM_SR_CC4IF TIM_SR_CC4IF

Capture/compare 4 interrupt flag

LL_TIM_SR_CC5IF TIM_SR_CC5IF

Capture/compare 5 interrupt flag

LL_TIM_SR_CC6IF TIM_SR_CC6IF

Capture/compare 6 interrupt flag

LL_TIM_SR_CC7IF TIM_SR_CC7IF

Capture/compare 7 interrupt flag

LL_TIM_SR_COMIF TIM_SR_COMIF

COM interrupt flag

LL_TIM_SR_TIF TIM_SR_TIF

Trigger interrupt flag

LL_TIM_SR_BIF TIM_SR_BIF

Break interrupt flag

LL_TIM_SR_B2IF TIM_SR_B2IF

Second break interrupt flag

LL_TIM_SR_SBIF TIM_SR_SBIF

System Break interrupt flag

LL_TIM_SR_BGF TIM_SR_BGF

Break Generation flag

LL_TIM_SR_B2GF TIM_SR_B2GF

Break2 Generation flag

LL_TIM_SR_CC1OF TIM_SR_CC1OF

Capture/Compare 1 overcapture flag

LL_TIM_SR_CC2OF TIM_SR_CC2OF

Capture/Compare 2 overcapture flag

LL_TIM_SR_CC3OF TIM_SR_CC3OF

Capture/Compare 3 overcapture flag

LL_TIM_SR_CC4OF TIM_SR_CC4OF

Capture/Compare 4 overcapture flag

LL_TIM_SR_IDXF TIM_SR_IDXF

Index interrupt flag

LL_TIM_SR_DIRF TIM_SR_DIRF

Direction Change interrupt flag

LL_TIM_SR_IERRF TIM_SR_IERRF

Index Error flag

LL_TIM_SR_TERRF TIM_SR_TERRF

Transition Error flag

LL_TIM_SR_UIOVRF TIM_SR_UIOVRF

Update interrupt overrun flag

LL_TIM_SR_ODS TIM_SR_ODS

Output disable status

LL_TIM_SR_TI1FS TIM_SR_TI1FS

Capture 1 signal status

LL_TIM_SR_TI2FS TIM_SR_TI2FS

Capture 2 signal status

LL_TIM_SR_TI3FS TIM_SR_TI3FS

Capture 3 signal status

LL_TIM_SR_TI4FS TIM_SR_TI4FS

Capture 4 signal status

Break Enable

group TIM_LL_EC_BREAK_ENABLE

Defines

LL_TIM_BREAK_DISABLE 0x00000000U

Break function disabled

LL_TIM_BREAK_ENABLE TIM_BDTR_BKE

Break function enabled

Break2 Enable

group TIM_LL_EC_BREAK2_ENABLE

Defines

LL_TIM_BREAK2_DISABLE 0x00000000U

Break2 function disabled

LL_TIM_BREAK2_ENABLE TIM_BDTR_BK2E

Break2 function enabled

Automatic output enable

group TIM_LL_EC_AUTOMATICOUTPUT_ENABLE

Defines

LL_TIM_AUTOMATICOUTPUT_DISABLE 0x00000000U

MOE can be set only by software

LL_TIM_AUTOMATICOUTPUT_ENABLE TIM_BDTR_AOE

MOE can be set by software or automatically at the next update event

IT Defines

group TIM_LL_EC_IT

IT defines which can be used with LL_TIM_READ_REG and LL_TIM_WRITE_REG functions.

Defines

LL_TIM_DIER_UIE TIM_DIER_UIE

Update interrupt enable

LL_TIM_DIER_CC1IE TIM_DIER_CC1IE

Capture/compare 1 interrupt enable

LL_TIM_DIER_CC2IE TIM_DIER_CC2IE

Capture/compare 2 interrupt enable

LL_TIM_DIER_CC3IE TIM_DIER_CC3IE

Capture/compare 3 interrupt enable

LL_TIM_DIER_CC4IE TIM_DIER_CC4IE

Capture/compare 4 interrupt enable

LL_TIM_DIER_COMIE TIM_DIER_COMIE

COM interrupt enable

LL_TIM_DIER_TIE TIM_DIER_TIE

Trigger interrupt enable

LL_TIM_DIER_BIE TIM_DIER_BIE

Break interrupt enable

LL_TIM_DIER_IDXIE TIM_DIER_IDXIE

Index interrupt enable

LL_TIM_DIER_DIRIE TIM_DIER_DIRIE

Direction Change interrupt enable

LL_TIM_DIER_IERRIE TIM_DIER_IERRIE

Index Error interrupt enable

LL_TIM_DIER_TERRIE TIM_DIER_TERRIE

Transition Error interrupt enable

DMA request Defines

group TIM_LL_EC_DMA

DMA request defines which can be used with LL_TIM_READ_REG and LL_TIM_WRITE_REG functions.

Defines

LL_TIM_DIER_UDE TIM_DIER_UDE

Update DMA request enable

LL_TIM_DIER_CC1DE TIM_DIER_CC1DE

Capture/compare 1 DMA request enable

LL_TIM_DIER_CC2DE TIM_DIER_CC2DE

Capture/compare 2 DMA request enable

LL_TIM_DIER_CC3DE TIM_DIER_CC3DE

Capture/compare 3 DMA request enable

LL_TIM_DIER_CC4DE TIM_DIER_CC4DE

Capture/compare 4 DMA request enable

LL_TIM_DIER_COMDE TIM_DIER_COMDE

COM DMA request enable

LL_TIM_DIER_TDE TIM_DIER_TDE

Trigger DMA request enable

Update Source

group TIM_LL_EC_UPDATESOURCE

Defines

LL_TIM_UPDATESOURCE_REGULAR 0x00000000U

Counter overflow/underflow, Setting the UG bit or Update generation through the slave mode controller generates an update request

LL_TIM_UPDATESOURCE_COUNTER TIM_CR1_URS

Only counter overflow/underflow generates an update request

Counter Mode

group TIM_LL_EC_COUNTERMODE

Defines

LL_TIM_COUNTERMODE_UP 0x00000000U

Counter used as upcounter

LL_TIM_COUNTERMODE_DOWN TIM_CR1_DIR

Counter used as downcounter

LL_TIM_COUNTERMODE_CENTER_DOWN TIM_CR1_CMS_0

The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting down.

LL_TIM_COUNTERMODE_CENTER_UP TIM_CR1_CMS_1

The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting up

LL_TIM_COUNTERMODE_CENTER_UP_DOWN TIM_CR1_CMS

The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting up or down.

Clock Division

group TIM_LL_EC_CLOCKDIVISION_DIV

Defines

LL_TIM_CLOCKDIVISION_DIV1 0x00000000U

tDTS=tTIM_KER_CK

LL_TIM_CLOCKDIVISION_DIV2 TIM_CR1_CKD_0

tDTS=2*tTIM_KER_CK

LL_TIM_CLOCKDIVISION_DIV4 TIM_CR1_CKD_1

tDTS=4*tTIM_KER_CK

LL_TIM_CLOCKDIVISION_DIV8 (TIM_CR1_CKD_1 | TIM_CR1_CKD_0)

tDTS=8*tTIM_KER_CK

Clock Division 2

group TIM_LL_EC_CLOCKDIVISION2_DIV

Defines

LL_TIM_CLOCKDIVISION2_DIV1 0x00000000U

tDTS2=tDTS

LL_TIM_CLOCKDIVISION2_DIV4 TIM_CR1_CKD2_0

tDTS2=4*tDTS

LL_TIM_CLOCKDIVISION2_DIV16 TIM_CR1_CKD2_1

tDTS2=16*tDTS

LL_TIM_CLOCKDIVISION2_DIV64 (TIM_CR1_CKD2_1 | TIM_CR1_CKD2_0)

tDTS2=64*tDTS

LL_TIM_CLOCKDIVISION2_DIV256 TIM_CR1_CKD2_2

tDTS2=256*tDTS

LL_TIM_CLOCKDIVISION2_DIV1024 (TIM_CR1_CKD2_2 | TIM_CR1_CKD2_0)

tDTS2=1024*tDTS

LL_TIM_CLOCKDIVISION2_DIV4096 (TIM_CR1_CKD2_2 | TIM_CR1_CKD2_1)

tDTS2=4096*tDTS

LL_TIM_CLOCKDIVISION2_DIV16384 (TIM_CR1_CKD2_2 |TIM_CR1_CKD2_1 | TIM_CR1_CKD2_0)

tDTS2=16384*tDTS

LL_TIM_CLOCKDIVISION2_DIV65536 TIM_CR1_CKD2_3

tDTS2=65536*tDTS

LL_TIM_CLOCKDIVISION2_DIV262144 (TIM_CR1_CKD2_3 | TIM_CR1_CKD2_0)

tDTS2=262144*tDTS

Counter Direction

group TIM_LL_EC_COUNTERDIRECTION

Defines

LL_TIM_COUNTERDIRECTION_UP 0x00000000U

Timer counter counts up

LL_TIM_COUNTERDIRECTION_DOWN TIM_CR1_DIR

Timer counter counts down

Capture Compare Update Source

group TIM_LL_EC_CCUPDATESOURCE

Defines

LL_TIM_CCUPDATESOURCE_SOFTWARE 0x00000000U

Capture/compare control bits are updated by setting the COMG bit only

LL_TIM_CCUPDATESOURCE_SOFTWARE_AND_TRIGGER TIM_CR2_CCUS

Capture/compare control bits are updated by setting the COMG bit or when a rising edge occurs on trigger input (TRGI)

Capture Compare DMA Request

group TIM_LL_EC_CCDMAREQUEST

Defines

LL_TIM_CCDMAREQUEST_CC 0x00000000U

CCx DMA request sent when CCx event occurs

LL_TIM_CCDMAREQUEST_UPD TIM_CR2_CCDS

CCx DMA requests sent when update event occurs

Lock Level

group TIM_LL_EC_LOCKLEVEL

Defines

LL_TIM_LOCKLEVEL_OFF 0x00000000U

LOCK OFF - No bit is write protected

LL_TIM_LOCKLEVEL_1 TIM_BDTR_LOCK_0

LOCK Level 1

LL_TIM_LOCKLEVEL_2 TIM_BDTR_LOCK_1

LOCK Level 2

LL_TIM_LOCKLEVEL_3 TIM_BDTR_LOCK

LOCK Level 3

Channel

group TIM_LL_EC_CHANNEL

Defines

LL_LPTIM_CHANNEL_CH1 0x00000000U

LPTIM input/output channel 1

LL_LPTIM_CHANNEL_CH2 0x00000001U

LPTIM input/output channel 2

LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E

Timer input/output channel 1

LL_TIM_CHANNEL_CH1N TIM_CCER_CC1NE

Timer complementary output channel 1

LL_TIM_CHANNEL_CH2 TIM_CCER_CC2E

Timer input/output channel 2

LL_TIM_CHANNEL_CH2N TIM_CCER_CC2NE

Timer complementary output channel 2

LL_TIM_CHANNEL_CH3 TIM_CCER_CC3E

Timer input/output channel 3

LL_TIM_CHANNEL_CH3N TIM_CCER_CC3NE

Timer complementary output channel 3

LL_TIM_CHANNEL_CH4 TIM_CCER_CC4E

Timer input/output channel 4

LL_TIM_CHANNEL_CH4N TIM_CCER_CC4NE

Timer complementary output channel 4

LL_TIM_CHANNEL_CH5 TIM_CCER_CC5E

Timer output channel 5

LL_TIM_CHANNEL_CH6 TIM_CCER_CC6E

Timer output channel 6

LL_TIM_CHANNEL_CH7 TIM_CCER_CC7E

Timer output channel 7

Output Configuration State

group TIM_LL_EC_OCSTATE

Defines

LL_TIM_OCSTATE_DISABLE 0x00000000U

OCx is not active

LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E

OCx signal is output on the corresponding output pin

Output Configuration Mode

group TIM_LL_EC_OCMODE

Defines

LL_TIM_OCMODE_FROZEN 0x00000000U

The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the output channel level

LL_TIM_OCMODE_ACTIVE_ON_MATCH TIM_CCMR1_OC1M_0

OCyREF is forced high on compare match

LL_TIM_OCMODE_INACTIVE_ON_MATCH TIM_CCMR1_OC1M_1

OCyREF is forced low on compare match

LL_TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)

OCyREF toggles on compare match

LL_TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2

OCyREF is forced low

LL_TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)

OCyREF is forced high

LL_TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)

In upcounting, channel y is active as long as TIMx_CNT<TIMx_CCRy else inactive.In downcounting, channel y is inactive as long as TIMx_CNT>TIMx_CCRy else active

LL_TIM_OCMODE_PWM2

(TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 \

| TIM_CCMR1_OC1M_0)


In upcounting, channel y is inactive as long as TIMx_CNT<TIMx_CCRy else active. In downcounting, channel y is active as long as TIMx_CNT>TIMx_CCRy else inactive

LL_TIM_OCMODE_RETRIGERRABLE_OPM1 TIM_CCMR1_OC1M_3

Retrigerrable OPM mode 1

LL_TIM_OCMODE_RETRIGERRABLE_OPM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0)

Retrigerrable OPM mode 2

LL_TIM_OCMODE_COMBINED_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2)

Combined PWM mode 1

LL_TIM_OCMODE_COMBINED_PWM2

(TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2 \

| TIM_CCMR1_OC1M_0)


Combined PWM mode 2

LL_TIM_OCMODE_COMBINED_PWM3 TIM_CCMR1_OC1M_4

Combined PWM mode 3

LL_TIM_OCMODE_COMBINED_PWM4 (TIM_CCMR1_OC1M_4 | TIM_CCMR1_OC1M_0)

Combined PWM mode 4

LL_TIM_OCMODE_ASYMMETRIC_PWM1

(TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2 \

| TIM_CCMR1_OC1M_1)


Asymmetric PWM mode 1

LL_TIM_OCMODE_ASYMMETRIC_PWM2

(TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2 \

| TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)


Asymmetric PWM mode 2

LL_TIM_OCMODE_ASYMMETRIC_PWM3 (TIM_CCMR1_OC1M_4 | TIM_CCMR1_OC1M_1)

Asymmetric PWM mode 3

LL_TIM_OCMODE_ASYMMETRIC_PWM4

(TIM_CCMR1_OC1M_4 | TIM_CCMR1_OC1M_1 \

| TIM_CCMR1_OC1M_0)


Asymmetric PWM mode 4

LL_TIM_OCMODE_ASYMMETRIC_PWM5 (TIM_CCMR1_OC1M_4 | TIM_CCMR1_OC1M_2)

Asymmetric PWM mode 5

LL_TIM_OCMODE_ASYMMETRIC_PWM6

(TIM_CCMR1_OC1M_4 | TIM_CCMR1_OC1M_2 \

| TIM_CCMR1_OC1M_0)


Asymmetric PWM mode 6

LL_TIM_OCMODE_ASYMMETRIC_PWM7

(TIM_CCMR1_OC1M_4 | TIM_CCMR1_OC1M_2 \

| TIM_CCMR1_OC1M_1)


Asymmetric PWM mode 7

LL_TIM_OCMODE_ASYMMETRIC_PWM8

(TIM_CCMR1_OC1M_4 | TIM_CCMR1_OC1M_2 \

| TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)


Asymmetric PWM mode 8

LL_TIM_OCMODE_ASYMMETRIC_PWM9 (TIM_CCMR1_OC1M_4 | TIM_CCMR1_OC1M_3)

Asymmetric PWM mode 9

LL_TIM_OCMODE_ASYMMETRIC_PWM10

(TIM_CCMR1_OC1M_4 | TIM_CCMR1_OC1M_3 \

| TIM_CCMR1_OC1M_0)


Asymmetric PWM mode 10

LL_TIM_OCMODE_PULSE_ON_COMPARE (TIM_CCMR2_OC3M_3 | TIM_CCMR2_OC3M_1)

Pulse on Compare mode

LL_TIM_OCMODE_DIRECTION_OUTPUT

(TIM_CCMR2_OC3M_3 | TIM_CCMR2_OC3M_1 \

| TIM_CCMR2_OC3M_0)


Direction output mode

Output Configuration Polarity

group TIM_LL_EC_OCPOLARITY

Defines

LL_TIM_OCPOLARITY_HIGH 0x00000000U

OCx active high

LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P

OCx active low

Output Configuration Idle State

group TIM_LL_EC_OCIDLESTATE

Defines

LL_TIM_OCIDLESTATE_RESET 0x00000000U

OCx/OCxN=0 (after a dead-time if OC is implemented) when MOE=0

LL_TIM_OCIDLESTATE_SET TIM_CR2_OIS1

OCx/OCxN=1 (after a dead-time if OC is implemented) when MOE=0

Output Configuration Idle State Override

group TIM_LL_EC_OCOVERRIDE

Defines

LL_TIM_OCOVERRIDE_RESET 0x00000000U

OCx/OCxN=0 when OOC=1

LL_TIM_OCOVERRIDE_SET TIM_OOR_OOS1

OCx/OCxN=1 when OOC=1

Output Configuration Break Mode

group TIM_LL_EC_OCBREAKMODE

Defines

LL_TIM_OCBREAKMODE_IMMEDIATE 0x00000000U

Immediate break

LL_TIM_OCBREAKMODE_DELAY1 TIM_MPR1_BK1M_0

Delayed 1 break

LL_TIM_OCBREAKMODE_DELAY2 TIM_MPR1_BK1M_1

Delayed 2 break

Compare Unit

group TIM_LL_EC_OC_COMPARE_UNIT

Defines

LL_TIM_OC_COMPARE_UNIT_1 0U

Timer compare unit 1

LL_TIM_OC_COMPARE_UNIT_2 1U

Timer compare unit 2

LL_TIM_OC_COMPARE_UNIT_3 2U

Timer compare unit 3

LL_TIM_OC_COMPARE_UNIT_4 3U

Timer compare unit 4

LL_TIM_OC_COMPARE_UNIT_5 4U

Timer compare unit 5

LL_TIM_OC_COMPARE_UNIT_6 5U

Timer compare unit 6

LL_TIM_OC_COMPARE_UNIT_7 6U

Timer compare unit 7

GROUPCH5

group TIM_LL_EC_GROUPCH5

Defines

LL_TIM_GROUPCH5_NONE 0x00000000U

No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC

LL_TIM_GROUPCH5_AND_OC1REFC TIM_CCR5_GC5C1

OC1REFC is the logical AND of OC1REFC and OC5REF

LL_TIM_GROUPCH5_AND_OC2REFC TIM_CCR5_GC5C2

OC2REFC is the logical AND of OC2REFC and OC5REF

LL_TIM_GROUPCH5_AND_OC3REFC TIM_CCR5_GC5C3

OC3REFC is the logical AND of OC3REFC and OC5REF

LL_TIM_GROUPCH5_AND_OC4REFC TIM_CCR5_GC5C4

OC4REFC is the logical AND of OC4REFC and OC5REF

LL_TIM_GROUPCH5_OR_OC1REFC TIM_CCR5_GC5C1O

OC1REFC is the logical OR of OC1REFC and OC5REF

LL_TIM_GROUPCH5_OR_OC2REFC TIM_CCR5_GC5C2O

OC2REFC is the logical OR of OC2REFC and OC5REF

LL_TIM_GROUPCH5_OR_OC3REFC TIM_CCR5_GC5C3O

OC3REFC is the logical OR of OC3REFC and OC5REF

LL_TIM_GROUPCH5_OR_OC4REFC TIM_CCR5_GC5C4O

OC4REFC is the logical OR of OC4REFC and OC5REF

Active Input Selection

group TIM_LL_EC_ACTIVEINPUT

Defines

LL_TIM_ACTIVEINPUT_DIRECT (TIM_CCMR1_CC1S_0 << LL_TIM_IC_CONFIG_POS )

ICx is mapped on TIx

LL_TIM_ACTIVEINPUT_INDIRECT (TIM_CCMR1_CC1S_1 << LL_TIM_IC_CONFIG_POS )

ICx is mapped on TIy

LL_TIM_ACTIVEINPUT_TRC (TIM_CCMR1_CC1S << LL_TIM_IC_CONFIG_POS )

ICx is mapped on TRC

Input Configuration Prescaler

group TIM_LL_EC_ICPSC

Defines

LL_TIM_ICPSC_DIV1 0x00000000U

No prescaler, capture is done each time an edge is detected on the capture input

LL_TIM_ICPSC_DIV2 (TIM_CCMR1_IC1PSC_0 << LL_TIM_IC_CONFIG_POS )

Capture is done once every 2 events

LL_TIM_ICPSC_DIV4 (TIM_CCMR1_IC1PSC_1 << LL_TIM_IC_CONFIG_POS )

Capture is done once every 4 events

LL_TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC << LL_TIM_IC_CONFIG_POS )

Capture is done once every 8 events

Input Configuration Filter

group TIM_LL_EC_IC_FILTER

Defines

LL_TIM_IC_FILTER_FDIV1 0x00000000U

No filter, sampling is done at fDTS

LL_TIM_IC_FILTER_FDIV1_N2 (TIM_CCMR1_IC1F_0 << LL_TIM_IC_CONFIG_POS )

fSAMPLING=fCK_INT, N=2

LL_TIM_IC_FILTER_FDIV1_N4 (TIM_CCMR1_IC1F_1 << LL_TIM_IC_CONFIG_POS )

fSAMPLING=fCK_INT, N=4

LL_TIM_IC_FILTER_FDIV1_N8

((TIM_CCMR1_IC1F_1 \

| TIM_CCMR1_IC1F_0) <<

LL_TIM_IC_CONFIG_POS )

fSAMPLING=fCK_INT, N=8

LL_TIM_IC_FILTER_FDIV2_N6 (TIM_CCMR1_IC1F_2 << LL_TIM_IC_CONFIG_POS )

fSAMPLING=fDTS/2, N=6

LL_TIM_IC_FILTER_FDIV2_N8

((TIM_CCMR1_IC1F_2 \

| TIM_CCMR1_IC1F_0) <<

LL_TIM_IC_CONFIG_POS )

fSAMPLING=fDTS/2, N=8

LL_TIM_IC_FILTER_FDIV4_N6

((TIM_CCMR1_IC1F_2 \

| TIM_CCMR1_IC1F_1) <<

LL_TIM_IC_CONFIG_POS )

fSAMPLING=fDTS/4, N=6

LL_TIM_IC_FILTER_FDIV4_N8

((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_1\

| TIM_CCMR1_IC1F_0) <<

LL_TIM_IC_CONFIG_POS )

fSAMPLING=fDTS/4, N=8

LL_TIM_IC_FILTER_FDIV8_N6 (TIM_CCMR1_IC1F_3 << LL_TIM_IC_CONFIG_POS )

fSAMPLING=fDTS/8, N=6

LL_TIM_IC_FILTER_FDIV8_N8

((TIM_CCMR1_IC1F_3 \

| TIM_CCMR1_IC1F_0) <<

LL_TIM_IC_CONFIG_POS )

fSAMPLING=fDTS/8, N=8

LL_TIM_IC_FILTER_FDIV16_N5

((TIM_CCMR1_IC1F_3 \

| TIM_CCMR1_IC1F_1) <<

LL_TIM_IC_CONFIG_POS )

fSAMPLING=fDTS/16, N=5

LL_TIM_IC_FILTER_FDIV16_N6

((TIM_CCMR1_IC1F_3| TIM_CCMR1_IC1F_1 \

| TIM_CCMR1_IC1F_0) <<

LL_TIM_IC_CONFIG_POS )

fSAMPLING=fDTS/16, N=6

LL_TIM_IC_FILTER_FDIV16_N8

((TIM_CCMR1_IC1F_3 \

| TIM_CCMR1_IC1F_2) <<

LL_TIM_IC_CONFIG_POS )

fSAMPLING=fDTS/16, N=8

LL_TIM_IC_FILTER_FDIV32_N5

((TIM_CCMR1_IC1F_3 | TIM_CCMR1_IC1F_2 \

| TIM_CCMR1_IC1F_0) <<

LL_TIM_IC_CONFIG_POS )

fSAMPLING=fDTS/32, N=5

LL_TIM_IC_FILTER_FDIV32_N6

((TIM_CCMR1_IC1F_3 | TIM_CCMR1_IC1F_2 \

| TIM_CCMR1_IC1F_1) <<

LL_TIM_IC_CONFIG_POS )

fSAMPLING=fDTS/32, N=6

LL_TIM_IC_FILTER_FDIV32_N8 (TIM_CCMR1_IC1F << LL_TIM_IC_CONFIG_POS )

fSAMPLING=fDTS/32, N=8

Input Configuration Polarity

group TIM_LL_EC_IC_POLARITY

Defines

LL_TIM_IC_POLARITY_RISING 0x00000000U

The circuit is sensitive to TIxFP1 rising edge, TIxFP1 is not inverted

LL_TIM_IC_POLARITY_FALLING TIM_CCER_CC1P

The circuit is sensitive to TIxFP1 falling edge, TIxFP1 is inverted

LL_TIM_IC_POLARITY_RISING_FALLING

(TIM_CCER_CC1P \

| TIM_CCER_CC1NP)


The circuit is sensitive to both TIxFP1 rising and falling edges, TIxFP1 is not inverted

XOR Gate Position Configuration

group TIM_LL_EC_IC_XOR_GATE_POS

Defines

LL_TIM_IC_XOR_GATE_POS_DIRECT 0x00000000U

XOR gate placed before TI1 filter

LL_TIM_IC_XOR_GATE_POS_FILTERED TIM_CR2_XORPS

XOR gate placed after TI1, TI2 and TI3 filters, edge detector placed on XOR output

Input Channel Signal Status

group TIM_LL_EC_IC_SIGNAL

Defines

LL_TIM_IC_SIGNAL_LOW 0x00000000U

ICx signal is low

LL_TIM_IC_SIGNAL_HIGH TIM_SR_TI1FS

ICx signal is high

Clock Sources

group TIM_LL_EC_CLK

Defines

LL_TIM_CLK_INTERNAL 0x00000000U

The timer is clocked by the internal clock provided from the RCC

LL_TIM_CLK_EXTERNAL_MODE1

(TIM_SMCR_SMS_2 \

| TIM_SMCR_SMS_1 \

| TIM_SMCR_SMS_0)


Counter counts at each rising or falling edge on a selected input

LL_TIM_CLK_EXTERNAL_MODE2 TIM_SMCR_ECE

Counter counts at each rising or falling edge on the external trigger input ETR

LL_TIM_CLK_ENCODER_X1_TI1

(TIM_SMCR_SMS_3 \

| TIM_SMCR_SMS_2 \

| TIM_SMCR_SMS_1)


Quadrature encoder mode: x1 mode, counting on TI1FP1 edges only, edge sensitivity is set by CC1P

LL_TIM_CLK_ENCODER_X1_TI2

(TIM_SMCR_SMS_3 \

| TIM_SMCR_SMS_2 \

| TIM_SMCR_SMS_1 \

| TIM_SMCR_SMS_0)


Quadrature encoder mode: x1 mode, counting on TI2FP2 edges only, edge sensitivity is set by CC1P

LL_TIM_CLK_ENCODER_X2_TI1 TIM_SMCR_SMS_0

Quadrature encoder mode 1: x2 mode, Counter counts up/down on TI1FP1 edge depending on TI2FP2 level

LL_TIM_CLK_ENCODER_X2_TI2 TIM_SMCR_SMS_1

Quadrature encoder mode 2: x2 mode, Counter counts up/down on TI2FP2 edge depending on TI1FP1 level

LL_TIM_CLK_ENCODER_X4_TI12

(TIM_SMCR_SMS_1 \

| TIM_SMCR_SMS_0)


Quadrature encoder mode 3: x4 mode, Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input

LL_TIM_CLK_ENCODER_DEBOUNCER_X2_TI1 TIM_SMCR_SMS_4

Quadrature encoder with built-in debouncer: x2 mode, Counter counts up/down on TI1FP1 edge depending on TI2FP2 level

LL_TIM_CLK_ENCODER_DEBOUNCER_X4_TI12

(TIM_SMCR_SMS_4 \

| TIM_SMCR_SMS_0)


Quadrature encoder with built-in debouncer:x4 mode, Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input

LL_TIM_CLK_ENCODER_CLK_PLUS_X2

(TIM_SMCR_SMS_3 \

| TIM_SMCR_SMS_1)


Encoder mode: Clock plus direction, x2 mode

LL_TIM_CLK_ENCODER_CLK_PLUS_X1

(TIM_SMCR_SMS_3 \

| TIM_SMCR_SMS_1 \

| TIM_SMCR_SMS_0)


Encoder mode:Clock plus direction, x1 mode, TI2FP2 edge sensitivity is set by CC2P

LL_TIM_CLK_ENCODER_DIR_CLK_X2

(TIM_SMCR_SMS_3 \

| TIM_SMCR_SMS_2)


Encoder mode: Directional Clock, x2 mode

LL_TIM_CLK_ENCODER_DIR_CLK_X1_TI12

(TIM_SMCR_SMS_3 | TIM_SMCR_SMS_2 \

| TIM_SMCR_SMS_0)


Encoder mode: Directional Clock, x1 mode, TI1FP1 and TI2FP2 edge sensitivity is set by CC1P and CC2P

Trigger Output

group TIM_LL_EC_TRGO

Defines

LL_TIM_TRGO_RESET 0x00000000U

UG bit from the TIMx_EGR register is used as trigger output

LL_TIM_TRGO_ENABLE TIM_CR2_MMS_0

Counter Enable signal (CNT_EN) is used as trigger output

LL_TIM_TRGO_UPDATE TIM_CR2_MMS_1

Update event is used as trigger output

LL_TIM_TRGO_CC1IF (TIM_CR2_MMS_1 | TIM_CR2_MMS_0)

CC1 capture or a compare match is used as trigger output

LL_TIM_TRGO_OC1 TIM_CR2_MMS_2

OC1REFC signal is used as trigger output

LL_TIM_TRGO_OC2 (TIM_CR2_MMS_2 | TIM_CR2_MMS_0)

OC2REFC signal is used as trigger output

LL_TIM_TRGO_OC3 (TIM_CR2_MMS_2 | TIM_CR2_MMS_1)

OC3REFC signal is used as trigger output

LL_TIM_TRGO_OC4

(TIM_CR2_MMS_2 | TIM_CR2_MMS_1 \

| TIM_CR2_MMS_0)


OC4REFC signal is used as trigger output

LL_TIM_TRGO_ENCODER_CLK TIM_CR2_MMS_3

Encoder clock signal is used as trigger output

Trigger Output 2

group TIM_LL_EC_TRGO2

Defines

LL_TIM_TRGO2_RESET 0x00000000U

UG bit from the TIMx_EGR register is used as trigger output 2

LL_TIM_TRGO2_ENABLE TIM_CR2_MMS2_0

Counter Enable signal (CNT_EN) is used as trigger output 2

LL_TIM_TRGO2_UPDATE TIM_CR2_MMS2_1

Update event is used as trigger output 2

LL_TIM_TRGO2_CC1F (TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)

CC1 capture or a compare match is used as trigger output 2

LL_TIM_TRGO2_OC1 TIM_CR2_MMS2_2

OC1REFC signal is used as trigger output 2

LL_TIM_TRGO2_OC2 (TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0)

OC2REFC signal is used as trigger output 2

LL_TIM_TRGO2_OC3 (TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1)

OC3REFC signal is used as trigger output 2

LL_TIM_TRGO2_OC4

(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 \

| TIM_CR2_MMS2_0)


OC4REFC signal is used as trigger output 2

LL_TIM_TRGO2_OC5 TIM_CR2_MMS2_3

OC5REFC signal is used as trigger output 2

LL_TIM_TRGO2_OC6 (TIM_CR2_MMS2_3 | TIM_CR2_MMS2_0)

OC6REFC signal is used as trigger output 2

LL_TIM_TRGO2_OC7 TIM_CR2_MMS2_4

OC7REFC signal is used as trigger output 2

LL_TIM_TRGO2_OC4_RISING_FALLING (TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1)

OC4REFC rising or falling edges are used as trigger output 2

LL_TIM_TRGO2_OC6_RISING_FALLING

(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1 \

| TIM_CR2_MMS2_0)


OC6REFC rising or falling edges are used as trigger output 2

LL_TIM_TRGO2_OC7_RISING_FALLING (TIM_CR2_MMS2_4 | TIM_CR2_MMS2_0)

OC7REFC rising or falling edges are used as trigger output 2

LL_TIM_TRGO2_OC4_RISING_OC6_RISING (TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2)

OC4REFC or OC6REFC rising edges are used as trigger output 2

LL_TIM_TRGO2_OC4_RISING_OC7_RISING (TIM_CR2_MMS2_4 | TIM_CR2_MMS2_1)

OC4REFC or OC7REFC rising edges are used as trigger output 2

LL_TIM_TRGO2_OC5_RISING_OC6_RISING

(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 \

| TIM_CR2_MMS2_1)


OC5REFC or OC6REFC rising edges are used as trigger output 2

LL_TIM_TRGO2_OC5_RISING_OC7_RISING (TIM_CR2_MMS2_4 | TIM_CR2_MMS2_2)

OC5REFC or OC7REFC rising edges are used as trigger output 2

LL_TIM_TRGO2_OC6_RISING_OC7_RISING

(TIM_CR2_MMS2_4 | TIM_CR2_MMS2_2 \

| TIM_CR2_MMS2_1)


OC6REFC or OC7REFC rising edges are used as trigger output 2

LL_TIM_TRGO2_OC4_RISING_OC6_FALLING

(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 \

| TIM_CR2_MMS2_0)


OC4REFC rising or OC6REFC falling edges are used as trigger output 2

LL_TIM_TRGO2_OC4_RISING_OC7_FALLING

(TIM_CR2_MMS2_4 | TIM_CR2_MMS2_1 \

| TIM_CR2_MMS2_0)


OC4REFC rising or OC7REFC falling edges are used as trigger output 2

LL_TIM_TRGO2_OC5_RISING_OC6_FALLING

(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 \

| TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)


OC5REFC rising or OC6REFC falling edges are used as trigger output 2

LL_TIM_TRGO2_OC5_RISING_OC7_FALLING

(TIM_CR2_MMS2_4 | TIM_CR2_MMS2_2 \

| TIM_CR2_MMS2_0)


OC5REFC rising or OC7REFC falling edges are used as trigger output 2

LL_TIM_TRGO2_OC6_RISING_OC7_FALLING

(TIM_CR2_MMS2_4 | TIM_CR2_MMS2_2 \

| TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)


OC6REFC rising or OC7REFC falling edges are used as trigger output 2

Slave Mode

group TIM_LL_EC_SLAVEMODE

Defines

LL_TIM_SLAVEMODE_DISABLED 0x00000000U

Slave mode disabled

LL_TIM_SLAVEMODE_RESET TIM_SMCR_SMS_2

Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter

LL_TIM_SLAVEMODE_GATED (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0)

Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high

LL_TIM_SLAVEMODE_TRIGGER (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1)

Trigger Mode - The counter starts at a rising edge of the trigger TRGI

LL_TIM_SLAVEMODE_COMBINED_RESET_TRIGGER TIM_SMCR_SMS_3

Combined reset + trigger mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter, generates an update of the registers and starts the counter

LL_TIM_SLAVEMODE_COMBINED_GATED_RESET (TIM_SMCR_SMS_3 | TIM_SMCR_SMS_0)

Combined gated + reset mode

  • The counter clock is enabled when the trigger input (TRGI) is high. The counter stops and is reset) as soon as the trigger becomes low.Both startand stop of the counter are controlled.

SMS Preload Source

group TIM_LL_EC_SMS_PRELOAD_SOURCE

Defines

LL_TIM_SLAVE_MODE_PRELOAD_UPDATE 0x00000000U

The SMS preload transfer is triggered by the Timer’s Update event

LL_TIM_SLAVE_MODE_PRELOAD_INDEX TIM_SMCR_SMSPS

The SMS preload transfer is triggered by the Index event

Trigger Selection

group TIM_LL_EC_TS

Defines

LL_TIM_TS_ITR0 0x00000000U

Internal Trigger 0 (ITR0) is used as trigger input

LL_TIM_TS_ITR1 TIM_SMCR_TS_0

Internal Trigger 1 (ITR1) is used as trigger input

LL_TIM_TS_ITR2 TIM_SMCR_TS_1

Internal Trigger 2 (ITR2) is used as trigger input

LL_TIM_TS_ITR5 (TIM_SMCR_TS_0 | TIM_SMCR_TS_3)

Internal Trigger 5 (ITR5) is used as trigger input

LL_TIM_TS_ITR6 (TIM_SMCR_TS_1 | TIM_SMCR_TS_3)

Internal Trigger 6 (ITR6) is used as trigger input

LL_TIM_TS_ITR7

(TIM_SMCR_TS_0 | TIM_SMCR_TS_1 \

| TIM_SMCR_TS_3)


Internal Trigger 7 (ITR7) is used as trigger input

LL_TIM_TS_ITR8 (TIM_SMCR_TS_2 | TIM_SMCR_TS_3)

Internal Trigger 8 (ITR8) is used as trigger input

LL_TIM_TS_ITR9

(TIM_SMCR_TS_0 | TIM_SMCR_TS_2 \

| TIM_SMCR_TS_3)


Internal Trigger 9 (ITR9) is used as trigger input

LL_TIM_TS_ITR10

(TIM_SMCR_TS_1 | TIM_SMCR_TS_2 \

| TIM_SMCR_TS_3)


Internal Trigger 10 (ITR10) is used as trigger input

LL_TIM_TS_ITR11

(TIM_SMCR_TS_0 | TIM_SMCR_TS_1 \

| TIM_SMCR_TS_2 | TIM_SMCR_TS_3)


Internal Trigger 11 (ITR11) is used as trigger input

LL_TIM_TS_TI1F_ED TIM_SMCR_TS_2

TI1 Edge Detector (TI1F_ED) is used as trigger input

LL_TIM_TS_TI1FP1 (TIM_SMCR_TS_2 | TIM_SMCR_TS_0)

Filtered Timer Input 1 (TI1FP1) is used as trigger input

LL_TIM_TS_TI2FP2 (TIM_SMCR_TS_2 | TIM_SMCR_TS_1)

Filtered Timer Input 2 (TI12P2) is used as trigger input

LL_TIM_TS_ETRF

(TIM_SMCR_TS_2 | TIM_SMCR_TS_1 \

| TIM_SMCR_TS_0)


Filtered external Trigger (ETRF) is used as trigger input

External Trigger Polarity

group TIM_LL_EC_ETR_POLARITY

Defines

LL_TIM_ETR_POLARITY_NONINVERTED 0x00000000U

ETR is non-inverted, active at high level or rising edge

LL_TIM_ETR_POLARITY_INVERTED TIM_SMCR_ETP

ETR is inverted, active at low level or falling edge

External Trigger Prescaler

group TIM_LL_EC_ETR_PRESCALER

Defines

LL_TIM_ETR_PRESCALER_DIV1 0x00000000U

ETR prescaler OFF

LL_TIM_ETR_PRESCALER_DIV2 TIM_SMCR_ETPS_0

ETR frequency is divided by 2

LL_TIM_ETR_PRESCALER_DIV4 TIM_SMCR_ETPS_1

ETR frequency is divided by 4

LL_TIM_ETR_PRESCALER_DIV8 TIM_SMCR_ETPS

ETR frequency is divided by 8

External Trigger Synchronous Prescaler

group TIM_LL_EC_ETR_SYNCPRESCALER

Defines

LL_TIM_ETR_SYNC_PRESCALER_DIV1 0x00000000U

ETR synchronous prescaler OFF

LL_TIM_ETR_SYNC_PRESCALER_DIV2 TIM_SMCR_SETPS_0

ETR frequency is divided by 2

LL_TIM_ETR_SYNC_PRESCALER_DIV3 TIM_SMCR_SETPS_1

ETR frequency is divided by 3

LL_TIM_ETR_SYNC_PRESCALER_DIV4 (TIM_SMCR_SETPS_1 | TIM_SMCR_SETPS_0)

ETR frequency is divided by 4

LL_TIM_ETR_SYNC_PRESCALER_DIV5 TIM_SMCR_SETPS_2

ETR frequency is divided by 5

LL_TIM_ETR_SYNC_PRESCALER_DIV6 (TIM_SMCR_SETPS_2 | TIM_SMCR_SETPS_0)

ETR frequency is divided by 6

LL_TIM_ETR_SYNC_PRESCALER_DIV7 (TIM_SMCR_SETPS_2 | TIM_SMCR_SETPS_1)

ETR frequency is divided by 7

LL_TIM_ETR_SYNC_PRESCALER_DIV8

(TIM_SMCR_SETPS_2 | TIM_SMCR_SETPS_1 \

| TIM_SMCR_SETPS_0)


ETR frequency is divided by 8

LL_TIM_ETR_SYNC_PRESCALER_DIV9 TIM_SMCR_SETPS_3

ETR frequency is divided by 9

LL_TIM_ETR_SYNC_PRESCALER_DIV10 (TIM_SMCR_SETPS_3 | TIM_SMCR_SETPS_0)

ETR frequency is divided by 10

LL_TIM_ETR_SYNC_PRESCALER_DIV11 (TIM_SMCR_SETPS_3 | TIM_SMCR_SETPS_1)

ETR frequency is divided by 11

LL_TIM_ETR_SYNC_PRESCALER_DIV12

(TIM_SMCR_SETPS_3 | TIM_SMCR_SETPS_1 \

| TIM_SMCR_SETPS_0)


ETR frequency is divided by 12

LL_TIM_ETR_SYNC_PRESCALER_DIV13 (TIM_SMCR_SETPS_3 | TIM_SMCR_SETPS_2)

ETR frequency is divided by 13

LL_TIM_ETR_SYNC_PRESCALER_DIV14

(TIM_SMCR_SETPS_3 | TIM_SMCR_SETPS_2 \

| TIM_SMCR_SETPS_0)


ETR frequency is divided by 14

LL_TIM_ETR_SYNC_PRESCALER_DIV15

(TIM_SMCR_SETPS_3 | TIM_SMCR_SETPS_2 \

| TIM_SMCR_SETPS_1)


ETR frequency is divided by 15

LL_TIM_ETR_SYNC_PRESCALER_DIV16 TIM_SMCR_SETPS

ETR frequency is divided by 16

External Trigger Filter

group TIM_LL_EC_ETR_FILTER

Defines

LL_TIM_ETR_FILTER_FDIV1 0x00000000U

No filter, sampling is done at fDTS

LL_TIM_ETR_FILTER_FDIV1_N2 TIM_SMCR_ETF_0

fSAMPLING=fCK_INT, N=2

LL_TIM_ETR_FILTER_FDIV1_N4 TIM_SMCR_ETF_1

fSAMPLING=fCK_INT, N=4

LL_TIM_ETR_FILTER_FDIV1_N8 (TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0)

fSAMPLING=fCK_INT, N=8

LL_TIM_ETR_FILTER_FDIV2_N6 TIM_SMCR_ETF_2

fSAMPLING=fDTS/2, N=6

LL_TIM_ETR_FILTER_FDIV2_N8 (TIM_SMCR_ETF_2 | TIM_SMCR_ETF_0)

fSAMPLING=fDTS/2, N=8

LL_TIM_ETR_FILTER_FDIV4_N6 (TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1)

fSAMPLING=fDTS/4, N=6

LL_TIM_ETR_FILTER_FDIV4_N8

(TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1 \

| TIM_SMCR_ETF_0)


fSAMPLING=fDTS/4, N=8

LL_TIM_ETR_FILTER_FDIV8_N6 TIM_SMCR_ETF_3

fSAMPLING=fDTS/8, N=6

LL_TIM_ETR_FILTER_FDIV8_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_0)

fSAMPLING=fDTS/16, N=8

LL_TIM_ETR_FILTER_FDIV16_N5 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1)

fSAMPLING=fDTS/16, N=5

LL_TIM_ETR_FILTER_FDIV16_N6

(TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1 \

| TIM_SMCR_ETF_0)


fSAMPLING=fDTS/16, N=6

LL_TIM_ETR_FILTER_FDIV16_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2)

fSAMPLING=fDTS/16, N=8

LL_TIM_ETR_FILTER_FDIV32_N5

(TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2 \

| TIM_SMCR_ETF_0)


fSAMPLING=fDTS/32, N=5

LL_TIM_ETR_FILTER_FDIV32_N6

(TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2 \

| TIM_SMCR_ETF_1)


fSAMPLING=fDTS/32, N=6

LL_TIM_ETR_FILTER_FDIV32_N8 TIM_SMCR_ETF

fSAMPLING=fDTS/32, N=8

TIM1 External Trigger Input

group TIM_LL_EC_TIM1_ETR_IN

Defines

LL_TIM_TIM1_ETR_IN_GPIO 0x00000000U

tim1_etr_in is connected to TIM1_ETR

LL_TIM_TIM1_ETR_IN_COMP1_OUT TIM_AF1_ETRSEL_0

tim1_etr_in is connected to comp1_out

LL_TIM_TIM1_ETR_IN_ADC1_AWD1 (TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)

tim1_etr_in is connected to adc1_awd1

LL_TIM_TIM1_ETR_IN_ADC1_AWD2 TIM_AF1_ETRSEL_2

tim1_etr_in is connected to adc1_awd2

LL_TIM_TIM1_ETR_IN_ADC1_AWD3 (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_0)

tim1_etr_in is connected to adc1_awd3

TIM2 External Trigger Input

group TIM_LL_EC_TIM2_ETR_IN

Defines

LL_TIM_TIM2_ETR_IN_GPIO 0x00000000U

tim2_etr_in is connected to TIM2_ETR

LL_TIM_TIM2_ETR_IN_COMP1_OUT TIM_AF1_ETRSEL_0

tim2_etr_in is connected to comp1_out

LL_TIM_TIM2_ETR_IN_ADC1_AWD1 (TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)

tim2_etr_in is connected to adc1_awd1

LL_TIM_TIM2_ETR_IN_ADC1_AWD2 TIM_AF1_ETRSEL_2

tim2_etr_in is connected to adc1_awd2

LL_TIM_TIM2_ETR_IN_ADC1_AWD3 (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_0)

tim2_etr_in is connected to adc1_awd3

LL_TIM_TIM2_ETR_IN_LSE (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1)

tim2_etr_in is connected to LSE

LL_TIM_TIM2_ETR_IN_MCO1 (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)

tim2_etr_in is connected to MCO1

LL_TIM_TIM2_ETR_IN_TIM5_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)

tim2_etr_in is connected to TIM5_ETR

TIM5 External Trigger Input

group TIM_LL_EC_TIM5_ETR_IN

Defines

LL_TIM_TIM5_ETR_IN_GPIO 0x00000000U

tim5_etr_in is connected to TIM5_ETR

LL_TIM_TIM5_ETR_IN_COMP1_OUT TIM_AF1_ETRSEL_0

tim5_etr_in is connected to comp1_out

LL_TIM_TIM5_ETR_IN_TIM2_ETR TIM_AF1_ETRSEL_3

tim5_etr_in is connected to TIM2_ETR

TIM8 External Trigger Input

group TIM_LL_EC_TIM8_ETR_IN

Defines

LL_TIM_TIM8_ETR_IN_GPIO 0x00000000U

tim8_etr_in is connected to TIM8_ETR

LL_TIM_TIM8_ETR_IN_COMP1_OUT TIM_AF1_ETRSEL_0

tim8_etr_in is connected to comp1_out

LL_TIM_TIM8_ETR_IN_ADC2_AWD1 (TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)

tim8_etr_in is connected to adc2_awd1

LL_TIM_TIM8_ETR_IN_ADC2_AWD2 TIM_AF1_ETRSEL_2

tim8_etr_in is connected to adc2_awd2

LL_TIM_TIM8_ETR_IN_ADC2_AWD3 (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_0)

tim8_etr_in is connected to adc2_awd3

break polarity

group TIM_LL_EC_BREAK_POLARITY

Defines

LL_TIM_BREAK_POLARITY_LOW 0x00000000U

Break input BRK is active low

LL_TIM_BREAK_POLARITY_HIGH TIM_BDTR_BKP

Break input BRK is active high

break filter

group TIM_LL_EC_BREAK_FILTER

Defines

LL_TIM_BREAK_FILTER_FDIV1 0x00000000U

No filter, BRK acts asynchronously

LL_TIM_BREAK_FILTER_FDIV1_N2 0x00010000U

fSAMPLING=fCK_INT, N=2

LL_TIM_BREAK_FILTER_FDIV1_N4 0x00020000U

fSAMPLING=fCK_INT, N=4

LL_TIM_BREAK_FILTER_FDIV1_N8 0x00030000U

fSAMPLING=fCK_INT, N=8

LL_TIM_BREAK_FILTER_FDIV2_N6 0x00040000U

fSAMPLING=fDTS/2, N=6

LL_TIM_BREAK_FILTER_FDIV2_N8 0x00050000U

fSAMPLING=fDTS/2, N=8

LL_TIM_BREAK_FILTER_FDIV4_N6 0x00060000U

fSAMPLING=fDTS/4, N=6

LL_TIM_BREAK_FILTER_FDIV4_N8 0x00070000U

fSAMPLING=fDTS/4, N=8

LL_TIM_BREAK_FILTER_FDIV8_N6 0x00080000U

fSAMPLING=fDTS/8, N=6

LL_TIM_BREAK_FILTER_FDIV8_N8 0x00090000U

fSAMPLING=fDTS/8, N=8

LL_TIM_BREAK_FILTER_FDIV16_N5 0x000A0000U

fSAMPLING=fDTS/16, N=5

LL_TIM_BREAK_FILTER_FDIV16_N6 0x000B0000U

fSAMPLING=fDTS/16, N=6

LL_TIM_BREAK_FILTER_FDIV16_N8 0x000C0000U

fSAMPLING=fDTS/16, N=8

LL_TIM_BREAK_FILTER_FDIV32_N5 0x000D0000U

fSAMPLING=fDTS/32, N=5

LL_TIM_BREAK_FILTER_FDIV32_N6 0x000E0000U

fSAMPLING=fDTS/32, N=6

LL_TIM_BREAK_FILTER_FDIV32_N8 0x000F0000U

fSAMPLING=fDTS/32, N=8

BREAK2 POLARITY

group TIM_LL_EC_BREAK2_POLARITY

Defines

LL_TIM_BREAK2_POLARITY_LOW 0x00000000U

Break input BRK2 is active low

LL_TIM_BREAK2_POLARITY_HIGH TIM_BDTR_BK2P

Break input BRK2 is active high

BREAK2 FILTER

group TIM_LL_EC_BREAK2_FILTER

Defines

LL_TIM_BREAK2_FILTER_FDIV1 0x00000000U

No filter, BRK acts asynchronously

LL_TIM_BREAK2_FILTER_FDIV1_N2 0x00100000U

fSAMPLING=fCK_INT, N=2

LL_TIM_BREAK2_FILTER_FDIV1_N4 0x00200000U

fSAMPLING=fCK_INT, N=4

LL_TIM_BREAK2_FILTER_FDIV1_N8 0x00300000U

fSAMPLING=fCK_INT, N=8

LL_TIM_BREAK2_FILTER_FDIV2_N6 0x00400000U

fSAMPLING=fDTS/2, N=6

LL_TIM_BREAK2_FILTER_FDIV2_N8 0x00500000U

fSAMPLING=fDTS/2, N=8

LL_TIM_BREAK2_FILTER_FDIV4_N6 0x00600000U

fSAMPLING=fDTS/4, N=6

LL_TIM_BREAK2_FILTER_FDIV4_N8 0x00700000U

fSAMPLING=fDTS/4, N=8

LL_TIM_BREAK2_FILTER_FDIV8_N6 0x00800000U

fSAMPLING=fDTS/8, N=6

LL_TIM_BREAK2_FILTER_FDIV8_N8 0x00900000U

fSAMPLING=fDTS/8, N=8

LL_TIM_BREAK2_FILTER_FDIV16_N5 0x00A00000U

fSAMPLING=fDTS/16, N=5

LL_TIM_BREAK2_FILTER_FDIV16_N6 0x00B00000U

fSAMPLING=fDTS/16, N=6

LL_TIM_BREAK2_FILTER_FDIV16_N8 0x00C00000U

fSAMPLING=fDTS/16, N=8

LL_TIM_BREAK2_FILTER_FDIV32_N5 0x00D00000U

fSAMPLING=fDTS/32, N=5

LL_TIM_BREAK2_FILTER_FDIV32_N6 0x00E00000U

fSAMPLING=fDTS/32, N=6

LL_TIM_BREAK2_FILTER_FDIV32_N8 0x00F00000U

fSAMPLING=fDTS/32, N=8

OSSI

group TIM_LL_EC_OSSI

Defines

LL_TIM_OSSI_DISABLE 0x00000000U

When inactive, OCx/OCxN outputs are disabled

LL_TIM_OSSI_ENABLE TIM_BDTR_OSSI

When inactive, OxC/OCxN outputs are first forced with their inactive level then forced to their idle level after the deadtime

OSSR

group TIM_LL_EC_OSSR

Defines

LL_TIM_OSSR_DISABLE 0x00000000U

When inactive, OCx/OCxN outputs are disabled

LL_TIM_OSSR_ENABLE TIM_BDTR_OSSR

When inactive, OCx/OCxN outputs are enabled with their inactive level as soon as CCxE=1 or CCxNE=1

OUTPUT DISABLE STATUS

group TIM_LL_EC_OUTPUT

Defines

LL_TIM_OUTPUT_IDLE_STATE 0x00000000U

Break was triggered (or MOE was written to 0) and OIS states are forced on tim_ocx and tim_ocxn outputs

LL_TIM_OUTPUT_DISABLED_STATE TIM_SR_ODS

Break2 was triggered, tim_ocx and tim_ocxn outputs are inactive

BREAK INPUT

group TIM_LL_EC_BREAK_INPUT

Defines

LL_TIM_BREAK_INPUT_1 0x00000000U

TIMx_BKIN input

LL_TIM_BREAK_INPUT_2 0x00000001U

TIMx_BKIN2 input

BKIN SOURCE

group TIM_LL_EC_BKIN_SOURCE

Defines

LL_TIM_TIM1_BRK_GPIO TIM_AF1_BKINE

tim1_brk is connected to TIM1_BKIN

LL_TIM_TIM1_BRK_COMP1_OUT TIM_AF1_BKCMP1E

tim1_brk isconnected to comp1_out

LL_TIM_TIM1_BRK_TIM8_BKIN TIM_AF1_BKCMP6E

tim1_brk is connected to TIM8_BKIN

LL_TIM_TIM1_BRK_TIM15_BKIN TIM_AF1_BKCMP8E

tim1_brk is connected to TIM15_BKIN

LL_TIM_TIM1_BRK_TIM16_BKIN TIM_AF1_BKCMP9E

tim1_brk is connected to TIM16_BKIN

LL_TIM_TIM1_BRK_TIM17_BKIN TIM_AF1_BKCMP10E

tim1_brk is connected to TIM17_BKIN

Defines

LL_TIM_TIM8_BRK_GPIO TIM_AF1_BKINE

tim8_brk is connected to TIM8_BKIN

LL_TIM_TIM8_BRK_COMP1_OUT TIM_AF1_BKCMP1E

tim8_brk isconnected to comp1_out

LL_TIM_TIM8_BRK_TIM1_BKIN TIM_AF1_BKCMP5E

tim8_brk is connected to TIM1_BKIN

LL_TIM_TIM8_BRK_TIM15_BKIN TIM_AF1_BKCMP8E

tim8_brk is connected to TIM15_BKIN

LL_TIM_TIM8_BRK_TIM16_BKIN TIM_AF1_BKCMP9E

tim8_brk is connected to TIM16_BKIN

LL_TIM_TIM8_BRK_TIM17_BKIN TIM_AF1_BKCMP10E

tim8_brk is connected to TIM17_BKIN

Defines

LL_TIM_TIM15_BRK_GPIO TIM_AF1_BKINE

tim15_brk is connected to TIM1_BKIN

LL_TIM_TIM15_BRK_COMP1_OUT TIM_AF1_BKCMP1E

tim15_brk isconnected to comp1_out

LL_TIM_TIM15_BRK_TIM1_BKIN TIM_AF1_BKCMP5E

tim15_brk is connected to TIM1_BKIN

LL_TIM_TIM15_BRK_TIM8_BKIN TIM_AF1_BKCMP6E

tim15_brk is connected to TIM8_BKIN

LL_TIM_TIM15_BRK_TIM16_BKIN TIM_AF1_BKCMP9E

tim15_brk is connected to TIM16_BKIN

LL_TIM_TIM15_BRK_TIM17_BKIN TIM_AF1_BKCMP10E

tim15_brk is connected to TIM17_BKIN

Defines

LL_TIM_TIM16_BRK_GPIO TIM_AF1_BKINE

tim16_brk is connected to TIM1_BKIN

LL_TIM_TIM16_BRK_COMP1_OUT TIM_AF1_BKCMP1E

tim16_brk isconnected to comp1_out

LL_TIM_TIM16_BRK_TIM1_BKIN TIM_AF1_BKCMP5E

tim16_brk is connected to TIM1_BKIN

LL_TIM_TIM16_BRK_TIM8_BKIN TIM_AF1_BKCMP6E

tim16_brk is connected to TIM8_BKIN

LL_TIM_TIM16_BRK_TIM15_BKIN TIM_AF1_BKCMP8E

tim16_brk is connected to TIM15_BKIN

LL_TIM_TIM16_BRK_TIM17_BKIN TIM_AF1_BKCMP10E

tim16_brk is connected to TIM17_BKIN

Defines

LL_TIM_TIM17_BRK_GPIO TIM_AF1_BKINE

tim17_brk is connected to TIM1_BKIN

LL_TIM_TIM17_BRK_COMP1_OUT TIM_AF1_BKCMP1E

tim17_brk isconnected to comp1_out

LL_TIM_TIM17_BRK_TIM1_BKIN TIM_AF1_BKCMP5E

tim17_brk is connected to TIM1_BKIN

LL_TIM_TIM17_BRK_TIM8_BKIN TIM_AF1_BKCMP6E

tim17_brk is connected to TIM8_BKIN

LL_TIM_TIM17_BRK_TIM15_BKIN TIM_AF1_BKCMP8E

tim17_brk is connected to TIM15_BKIN

LL_TIM_TIM17_BRK_TIM16_BKIN TIM_AF1_BKCMP9E

tim17_brk is connected to TIM16_BKIN

Defines

LL_TIM_TIM1_BRK2_GPIO TIM_AF2_BK2INE

tim1_brk2 is connected to TIM1_BKIN2

LL_TIM_TIM1_BRK2_COMP1_OUT TIM_AF2_BK2CMP1E

tim1_brk2 isconnected to comp1_out

LL_TIM_TIM1_BRK2_TIM8_BKIN2 TIM_AF2_BK2CMP6E

tim1_brk2 is connected to TIM8_BKIN2

Defines

LL_TIM_TIM8_BRK2_GPIO TIM_AF2_BK2INE

tim8_brk2 is connected to TIM8_BKIN2

LL_TIM_TIM8_BRK2_COMP1_OUT TIM_AF2_BK2CMP1E

tim8_brk2 isconnected to comp1_out

LL_TIM_TIM8_BRK2_TIM1_BKIN2 TIM_AF2_BK2CMP5E

tim8_brk2 is connected to TIM1_BKIN2

BKIN POLARITY

group TIM_LL_EC_BKIN_POLARITY

Defines

LL_TIM_BREAK_INPUT_SRC_NONINVERTED 0x00000000U

BRK BKIN input is active high

LL_TIM_BREAK_INPUT_SRC_INVERTED TIM_AF1_BKINP

BRK BKIN input is active low

BREAK AF MODE

group TIM_LL_EC_BREAK_AFMODE

Defines

LL_TIM_BREAK_AFMODE_INPUT 0x00000000U

Break input BRK in input mode

LL_TIM_BREAK_AFMODE_BIDIRECTIONAL TIM_BDTR_BKBID

Break input BRK in bidirectional mode

BREAK2 AF MODE

group TIM_LL_EC_BREAK2_AFMODE

Defines

LL_TIM_BREAK2_AFMODE_INPUT 0x00000000U

Break2 input BRK2 in input mode

LL_TIM_BREAK2_AFMODE_BIDIRECTIONAL TIM_BDTR_BK2BID

Break2 input BRK2 in bidirectional mode

BREAK DELAY

group TIM_LL_EC_BREAK_DELAY

Defines

LL_TIM_BREAK_DELAY1 0x00000000U

Delayed 1 break

LL_TIM_BREAK_DELAY2 0x00000001U

Delayed 2 break

DMA Burst Base Address

group TIM_LL_EC_DMABURST_BASEADDR

Defines

LL_TIM_DMABURST_BASEADDR_CR1 0x00000000U

TIMx_CR1 register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_CR2 TIM_DCR_DBA_0

TIMx_CR2 register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_SMCR TIM_DCR_DBA_1

TIMx_SMCR register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_DIER (TIM_DCR_DBA_1 | TIM_DCR_DBA_0)

TIMx_DIER register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_SR TIM_DCR_DBA_2

TIMx_SR register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_EGR (TIM_DCR_DBA_2 | TIM_DCR_DBA_0)

TIMx_EGR register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_CCMR1 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1)

TIMx_CCMR1 register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_CCMR2

(TIM_DCR_DBA_2 | TIM_DCR_DBA_1 \

| TIM_DCR_DBA_0)


TIMx_CCMR2 register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3

TIMx_CCER register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 | TIM_DCR_DBA_0)

TIMx_CNT register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 | TIM_DCR_DBA_1)

TIMx_PSC register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_ARR

(TIM_DCR_DBA_3 | TIM_DCR_DBA_1 \

| TIM_DCR_DBA_0)


TIMx_ARR register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 | TIM_DCR_DBA_2)

TIMx_RCR register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_CCR1

(TIM_DCR_DBA_3 | TIM_DCR_DBA_2 \

| TIM_DCR_DBA_0)


TIMx_CCR1 register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_CCR2

(TIM_DCR_DBA_3 | TIM_DCR_DBA_2 \

| TIM_DCR_DBA_1)


TIMx_CCR2 register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_CCR3

(TIM_DCR_DBA_3 | TIM_DCR_DBA_2 \

| TIM_DCR_DBA_1 | TIM_DCR_DBA_0)


TIMx_CCR3 register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_CCR4 TIM_DCR_DBA_4

TIMx_CCR4 register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_BDTR (TIM_DCR_DBA_4 | TIM_DCR_DBA_0)

TIMx_BDTR register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_CCR5 (TIM_DCR_DBA_4 | TIM_DCR_DBA_1)

TIMx_CCR5 register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_CCR6

(TIM_DCR_DBA_4 | TIM_DCR_DBA_1 \

| TIM_DCR_DBA_0)


TIMx_CCR6 register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_CCMR3 (TIM_DCR_DBA_4 | TIM_DCR_DBA_2)

TIMx_CCMR3 register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_DTR2

(TIM_DCR_DBA_4 | TIM_DCR_DBA_2 \

| TIM_DCR_DBA_0)


TIMx_DTR2 register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_ECR

(TIM_DCR_DBA_4 | TIM_DCR_DBA_2 \

| TIM_DCR_DBA_1)


TIMx_ECR register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_TISEL

(TIM_DCR_DBA_4 | TIM_DCR_DBA_2 \

| TIM_DCR_DBA_1 | TIM_DCR_DBA_0)


TIMx_TISEL register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 | TIM_DCR_DBA_3)

TIMx_AF1 register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_AF2

(TIM_DCR_DBA_4 | TIM_DCR_DBA_3 \

| TIM_DCR_DBA_0)


TIMx_AF2 register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_CCR7

(TIM_DCR_DBA_4 | TIM_DCR_DBA_3 \

| TIM_DCR_DBA_2)


TIMx_CCR7 register is the DMA base address for DMA burst

LL_TIM_DMABURST_BASEADDR_CCMR4

(TIM_DCR_DBA_4 | TIM_DCR_DBA_3 \

| TIM_DCR_DBA_2 | TIM_DCR_DBA_1)


TIMx_CCMR4 register is the DMA base address for DMA burst

DMA Burst Length

group TIM_LL_EC_DMABURST_LENGTH

Defines

LL_TIM_DMABURST_LENGTH_1TRANSFER 0x00000000U

Transfer is done to 1 register starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_2TRANSFERS TIM_DCR_DBL_0

Transfer is done to 2 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_3TRANSFERS TIM_DCR_DBL_1

Transfer is done to 3 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_4TRANSFERS (TIM_DCR_DBL_1 | TIM_DCR_DBL_0)

Transfer is done to 4 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_5TRANSFERS TIM_DCR_DBL_2

Transfer is done to 5 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_6TRANSFERS (TIM_DCR_DBL_2 | TIM_DCR_DBL_0)

Transfer is done to 6 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_7TRANSFERS (TIM_DCR_DBL_2 | TIM_DCR_DBL_1)

Transfer is done to 7 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_8TRANSFERS

(TIM_DCR_DBL_2 | TIM_DCR_DBL_1 \

| TIM_DCR_DBL_0)


Transfer is done to 1 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_9TRANSFERS TIM_DCR_DBL_3

Transfer is done to 9 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_10TRANSFERS (TIM_DCR_DBL_3 | TIM_DCR_DBL_0)

Transfer is done to 10 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_11TRANSFERS (TIM_DCR_DBL_3 | TIM_DCR_DBL_1)

Transfer is done to 11 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_12TRANSFERS

(TIM_DCR_DBL_3 | TIM_DCR_DBL_1 \

| TIM_DCR_DBL_0)


Transfer is done to 12 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_13TRANSFERS (TIM_DCR_DBL_3 | TIM_DCR_DBL_2)

Transfer is done to 13 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_14TRANSFERS

(TIM_DCR_DBL_3 | TIM_DCR_DBL_2 \

| TIM_DCR_DBL_0)


Transfer is done to 14 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_15TRANSFERS

(TIM_DCR_DBL_3 | TIM_DCR_DBL_2 \

| TIM_DCR_DBL_1)


Transfer is done to 15 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_16TRANSFERS

(TIM_DCR_DBL_3 | TIM_DCR_DBL_2 \

| TIM_DCR_DBL_1 | TIM_DCR_DBL_0)


Transfer is done to 16 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_17TRANSFERS TIM_DCR_DBL_4

Transfer is done to 17 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_18TRANSFERS (TIM_DCR_DBL_4 | TIM_DCR_DBL_0)

Transfer is done to 18 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_19TRANSFERS (TIM_DCR_DBL_4 | TIM_DCR_DBL_1)

Transfer is done to 19 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_20TRANSFERS

(TIM_DCR_DBL_4 | TIM_DCR_DBL_1 \

| TIM_DCR_DBL_0)


Transfer is done to 20 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_21TRANSFERS (TIM_DCR_DBL_4 | TIM_DCR_DBL_2)

Transfer is done to 21 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_22TRANSFERS

(TIM_DCR_DBL_4 | TIM_DCR_DBL_2 \

| TIM_DCR_DBL_0)


Transfer is done to 22 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_23TRANSFERS

(TIM_DCR_DBL_4 | TIM_DCR_DBL_2 \

| TIM_DCR_DBL_1)


Transfer is done to 23 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_24TRANSFERS

(TIM_DCR_DBL_4 | TIM_DCR_DBL_2 \

| TIM_DCR_DBL_1 | TIM_DCR_DBL_0)


Transfer is done to 24 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_25TRANSFERS (TIM_DCR_DBL_4 | TIM_DCR_DBL_3)

Transfer is done to 25 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_26TRANSFERS

(TIM_DCR_DBL_4 | TIM_DCR_DBL_3 \

| TIM_DCR_DBL_0)


Transfer is done to 26 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_27TRANSFERS

(TIM_DCR_DBL_4 | TIM_DCR_DBL_3 \

| TIM_DCR_DBL_1)


Transfer is done to 27 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_28TRANSFERS

(TIM_DCR_DBL_4 | TIM_DCR_DBL_3 \

| TIM_DCR_DBL_1 | TIM_DCR_DBL_0)


Transfer is done to 28 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_29TRANSFERS

(TIM_DCR_DBL_4 | TIM_DCR_DBL_3 \

| TIM_DCR_DBL_2)


Transfer is done to 29 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_30TRANSFERS

(TIM_DCR_DBL_4 | TIM_DCR_DBL_3 \

| TIM_DCR_DBL_2 | TIM_DCR_DBL_0)


Transfer is done to 30 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_31TRANSFERS

(TIM_DCR_DBL_4 | TIM_DCR_DBL_3 \

| TIM_DCR_DBL_2 | TIM_DCR_DBL_1)


Transfer is done to 31 registers starting from the DMA burst base address

LL_TIM_DMABURST_LENGTH_32TRANSFERS TIM_DCR_DBL

Transfer is done to 32 registers starting from the DMA burst base address

DMA Burst Source

group TIM_LL_EC_DMABURST_SOURCE

Defines

LL_TIM_DMABURST_UPD TIM_DCR_DBSS_0

Transfer source is update event

LL_TIM_DMABURST_CC1 TIM_DCR_DBSS_1

Transfer source is CC1 event

LL_TIM_DMABURST_CC2 (TIM_DCR_DBSS_1 | TIM_DCR_DBSS_0)

Transfer source is CC2 event

LL_TIM_DMABURST_CC3 TIM_DCR_DBSS_2

Transfer source is CC3 event

LL_TIM_DMABURST_CC4 (TIM_DCR_DBSS_2 | TIM_DCR_DBSS_0)

Transfer source is CC4 event

LL_TIM_DMABURST_COM (TIM_DCR_DBSS_2 | TIM_DCR_DBSS_1)

Transfer source is COM event

LL_TIM_DMABURST_TRGI

(TIM_DCR_DBSS_2 | TIM_DCR_DBSS_1 \

| TIM_DCR_DBSS_0)


Transfer source is trigger event

TIM1 Input Ch1

group TIM_LL_EC_TIM1_TI1

Defines

LL_TIM_TIM1_TI1_GPIO 0x00000000U

tim1_ti1 is connected to TIM1_CH1

LL_TIM_TIM1_TI1_COMP1_OUT TIM_TISEL_TI1SEL_0

tim1_ti1 is connected to comp1_out

TIM1 Input Ch2

group TIM_LL_EC_TIM1_TI2

Defines

LL_TIM_TIM1_TI2_GPIO 0x00000000U

tim1_ti2 is connected to TIM1_CH2

TIM1 Input Ch3

group TIM_LL_EC_TIM1_TI3

Defines

LL_TIM_TIM1_TI3_GPIO 0x00000000U

tim1_ti3 is connected to TIM1_CH3

TIM1 Input Ch4

group TIM_LL_EC_TIM1_TI4

Defines

LL_TIM_TIM1_TI4_GPIO 0x00000000U

tim1_ti4 is connected to TIM1_CH4

TIM2 Input Ch1

group TIM_LL_EC_TIM2_TI1

Defines

LL_TIM_TIM2_TI1_GPIO 0x00000000U

tim2_ti1 is connected to TIM2_CH1

LL_TIM_TIM2_TI1_COMP1_OUT TIM_TISEL_TI1SEL_0

tim2_ti1 is connected to comp1_out

LL_TIM_TIM2_TI1_LSI (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0)

tim2_ti1 is connected to LSI

LL_TIM_TIM2_TI1_LSE TIM_TISEL_TI1SEL_2

tim2_ti1 is connected to LSE

LL_TIM_TIM2_TI1_RTC_WUT_TRG (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0)

tim2_ti1 is connected to rtc_wut_trg

LL_TIM_TIM2_TI1_TIM5_CH1 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1)

tim2_ti1 is connected to TIM5_CH1

LL_TIM_TIM2_TI1_FDCAN1_RXEOF_EVT (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0)

tim2_ti1 is connected to fdcan1_rxeof_evt

TIM2 Input Ch2

group TIM_LL_EC_TIM2_TI2

Defines

LL_TIM_TIM2_TI2_GPIO 0x00000000U

tim2_ti2 is connected to TIM2_CH2

LL_TIM_TIM2_TI2_HSE_RTC (TIM_TISEL_TI2SEL_1 | TIM_TISEL_TI2SEL_0)

tim2_ti2 is connected to hse_1M_ck

LL_TIM_TIM2_TI2_MCO1 TIM_TISEL_TI2SEL_2

tim2_ti2 is connected to MCO1

LL_TIM_TIM2_TI2_MCO2 (TIM_TISEL_TI2SEL_2 | TIM_TISEL_TI2SEL_0)

tim2_ti2 is connected to MCO2

LL_TIM_TIM2_TI2_FDCAN1_TXEOF_EVT (TIM_TISEL_TI2SEL_2 | TIM_TISEL_TI2SEL_1 | TIM_TISEL_TI2SEL_0)

tim2_ti2 is connected to fdcan1_txeof_evt

TIM2 Input Ch3

group TIM_LL_EC_TIM2_TI3

Defines

LL_TIM_TIM2_TI3_GPIO 0x00000000U

tim2_ti3 is connected to TIM2_CH3

TIM2 Input Ch4

group TIM_LL_EC_TIM2_TI4

Defines

LL_TIM_TIM2_TI4_GPIO 0x00000000U

tim2_ti4 is connected to TIM2_CH4

LL_TIM_TIM2_TI4_COMP1_OUT TIM_TISEL_TI4SEL_0

tim2_ti4 is connected to comp1_out

TIM5 Input Ch1

group TIM_LL_EC_TIM5_TI1

Defines

LL_TIM_TIM5_TI1_GPIO 0x00000000U

tim5_ti1 is connected to TIM5_CH1

LL_TIM_TIM5_TI1_COMP1_OUT TIM_TISEL_TI1SEL_0

tim5_ti1 is connected to comp1_out

TIM5 Input Ch2

group TIM_LL_EC_TIM5_TI2

Defines

LL_TIM_TIM5_TI2_GPIO 0x00000000U

tim5_ti2 is connected to TIM5_CH2

TIM5 Input Ch3

group TIM_LL_EC_TIM5_TI3

Defines

LL_TIM_TIM5_TI3_GPIO 0x00000000U

tim5_ti3 is connected to TIM5_CH3

TIM5 Input Ch4

group TIM_LL_EC_TIM5_TI4

Defines

LL_TIM_TIM5_TI4_GPIO 0x00000000U

tim5_ti4 is connected to TIM5_CH4

TIM8 Input Ch1

group TIM_LL_EC_TIM8_TI1

Defines

LL_TIM_TIM8_TI1_GPIO 0x00000000U

tim8_ti1 is connected to TIM8_CH1

LL_TIM_TIM8_TI1_COMP1_OUT TIM_TISEL_TI1SEL_0

tim8_ti1 is connected to comp1_out

TIM8 Input Ch2

group TIM_LL_EC_TIM8_TI2

Defines

LL_TIM_TIM8_TI2_GPIO 0x00000000U

tim8_ti2 is connected to TIM8_CH2

TIM8 Input Ch3

group TIM_LL_EC_TIM8_TI3

Defines

LL_TIM_TIM8_TI3_GPIO 0x00000000U

tim8_ti3 is connected to TIM8_CH3

TIM8 Input Ch4

group TIM_LL_EC_TIM8_TI4

Defines

LL_TIM_TIM8_TI4_GPIO 0x00000000U

tim8_ti4 is connected to TIM8_CH4

TIM12 Input Ch1

group TIM_LL_EC_TIM12_TI1

Defines

LL_TIM_TIM12_TI1_GPIO 0x00000000U

tim12_ti1 is connected to TIM12_CH1

LL_TIM_TIM12_TI1_COMP1_OUT TIM_TISEL_TI1SEL_0

tim12_ti1 is connected to comp1_out

LL_TIM_TIM12_TI1_MCO1 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0)

tim12_ti1 is connected to MCO1

LL_TIM_TIM12_TI1_MCO2 TIM_TISEL_TI1SEL_2

tim12_ti1 is connected to MCO2

LL_TIM_TIM12_TI1_HSE_RTC (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0)

tim12_ti1 is connected to hse_1M_ck

LL_TIM_TIM12_TI1_I3C1_IBI_ACK (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0)

tim12_ti1 is connected to i3c1_ibi_ack

TIM12 Input Ch2

group TIM_LL_EC_TIM12_TI2

Defines

LL_TIM_TIM12_TI2_GPIO 0x00000000U

tim12_ti2 is connected to TIM12_CH2

TIM15 Input Ch1

group TIM_LL_EC_TIM15_TI1

Defines

LL_TIM_TIM15_TI1_GPIO 0x00000000U

tim15_ti1 is connected to TIM15_CH1

LL_TIM_TIM15_TI1_COMP1_OUT TIM_TISEL_TI1SEL_0

tim15_ti1 is connected to comp1_out

LL_TIM_TIM15_TI1_LSE (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0)

tim15_ti1 is connected to LSE

TIM15 Input Ch2

group TIM_LL_EC_TIM15_TI2

Defines

LL_TIM_TIM15_TI2_GPIO 0x00000000U

tim15_ti2 is connected to TIM15_CH2

TIM16 Input Ch1

group TIM_LL_EC_TIM16_TI1

Defines

LL_TIM_TIM16_TI1_GPIO 0x00000000U

tim16_ti1 is connected to TIM16_CH1

LL_TIM_TIM16_TI1_COMP1_OUT TIM_TISEL_TI1SEL_0

tim16_ti1 is connected to comp1_out

LL_TIM_TIM16_TI1_LSI (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0)

tim16_ti1 is connected to LSI

LL_TIM_TIM16_TI1_LSE TIM_TISEL_TI1SEL_2

tim16_ti1 is connected to LSE

LL_TIM_TIM16_TI1_RTC_WUT_TRG (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0)

tim16_ti1 is connected to rtc_wut_trg

LL_TIM_TIM16_TI1_MCO1 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1)

tim16_ti1 is connected to MCO1

LL_TIM_TIM16_TI1_MCO2 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0)

tim16_ti1 is connected to MCO2

TIM17 Input Ch1

group TIM_LL_EC_TIM17_TI1

Defines

LL_TIM_TIM17_TI1_GPIO 0x00000000U

tim17_ti1 is connected to TIM17_CH1

LL_TIM_TIM17_TI1_COMP1_OUT TIM_TISEL_TI1SEL_0

tim17_ti1 is connected to comp1_out

LL_TIM_TIM17_TI1_HSE_RTC TIM_TISEL_TI1SEL_2

tim17_ti1 is connected to hse_rtc_ck

LL_TIM_TIM17_TI1_MCO1 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0)

tim17_ti1 is connected to MCO1

LL_TIM_TIM17_TI1_MCO2 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1)

tim17_ti1 is connected to MCO2

LL_TIM_TIM17_TI1_I3C1_IBI_ACK (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0)

tim17_ti1 is connected to i3c1_ibi_ack

OCREF clear input selection

group TIM_LL_EC_OCREF_CLR_INT

Defines

LL_TIM_TIM1_OCREF_CLR_INT_ETR TIM_SMCR_OCCS

tim1_ocref_clr is connected to tim_etrf

LL_TIM_TIM1_OCREF_CLR_INT_COMP1_OUT 0x00000000U

tim1_ocref_clr is connected to comp1_out

Defines

LL_TIM_TIM2_OCREF_CLR_INT_ETR TIM_SMCR_OCCS

tim2_ocref_clr is connected to tim_etrf

LL_TIM_TIM2_OCREF_CLR_INT_COMP1_OUT 0x00000000U

tim2_ocref_clr is connected to comp1_out

Defines

LL_TIM_TIM5_OCREF_CLR_INT_ETR TIM_SMCR_OCCS

tim5_ocref_clr is connected to tim_etrf

LL_TIM_TIM5_OCREF_CLR_INT_COMP1_OUT 0x00000000U

tim5_ocref_clr is connected to comp1_out

Defines

LL_TIM_TIM8_OCREF_CLR_INT_ETR TIM_SMCR_OCCS

tim8_ocref_clr is connected to tim_etrf

LL_TIM_TIM8_OCREF_CLR_INT_COMP1_OUT 0x00000000U

tim8_ocref_clr is connected to comp1_out

Defines

LL_TIM_TIM15_OCREF_CLR_INT_COMP1_OUT 0x00000000U

tim15_ocref_clr is connected to comp1_out

Defines

LL_TIM_TIM16_OCREF_CLR_INT_COMP1_OUT 0x00000000U

tim16_ocref_clr is connected to comp1_out

Defines

LL_TIM_TIM17_OCREF_CLR_INT_COMP1_OUT 0x00000000U

tim17_ocref_clr is connected to comp1_out

index direction selection

group TIM_LL_EC_INDEX_DIR

Defines

LL_TIM_INDEX_UP_DOWN 0x00000000U

Index resets the counter whatever the direction

LL_TIM_INDEX_UP TIM_ECR_IDIR_0

Index resets the counter when up-counting only

LL_TIM_INDEX_DOWN TIM_ECR_IDIR_1

Index resets the counter when down-counting only

index blanking selection

group TIM_LL_EC_INDEX_BLANK

Defines

LL_TIM_INDEX_BLANK_ALWAYS 0x00000000U

Index always active

LL_TIM_INDEX_BLANK_TI3 TIM_ECR_IBLK_0

Index disabled when TI3 input is active, as per CC3P bitfield

LL_TIM_INDEX_BLANK_TI4 TIM_ECR_IBLK_1

Index disabled when TI4 input is active, as per CC4P bitfield

index positioning selection

group TIM_LL_EC_INDEX_POSITION

Defines

LL_TIM_INDEX_POSITION_DOWN_DOWN 0x00000000U

Index resets the counter when AB = 00

LL_TIM_INDEX_POSITION_DOWN_UP TIM_ECR_IPOS_0

Index resets the counter when AB = 01

LL_TIM_INDEX_POSITION_UP_DOWN TIM_ECR_IPOS_1

Index resets the counter when AB = 10

LL_TIM_INDEX_POSITION_UP_UP

(TIM_ECR_IPOS_1 \

| TIM_ECR_IPOS_0)


Index resets the counter when AB = 11

LL_TIM_INDEX_POSITION_DOWN 0x00000000U

Index resets the counter when clock is 0

LL_TIM_INDEX_POSITION_UP TIM_ECR_IPOS_0

Index resets the counter when clock is 1

first index selection

group TIM_LL_EC_FIRST_INDEX

Defines

LL_TIM_INDEX_ALL 0x00000000U

Index is always active

LL_TIM_INDEX_FIRST_ONLY TIM_ECR_FIDX

The first Index only resets the counter

Pulse on compare pulse width prescaler

group TIM_LL_EC_PWPRSC

Defines

LL_TIM_PWPRSC_DIV1 0x00000000U

Pulse on compare pulse width prescaler 1

LL_TIM_PWPRSC_DIV2 TIM_ECR_PWPRSC_0

Pulse on compare pulse width prescaler 2

LL_TIM_PWPRSC_DIV4 TIM_ECR_PWPRSC_1

Pulse on compare pulse width prescaler 4

LL_TIM_PWPRSC_DIV8 (TIM_ECR_PWPRSC_1 | TIM_ECR_PWPRSC_0)

Pulse on compare pulse width prescaler 8

LL_TIM_PWPRSC_DIV16 TIM_ECR_PWPRSC_2

Pulse on compare pulse width prescaler 16

LL_TIM_PWPRSC_DIV32 (TIM_ECR_PWPRSC_2 | TIM_ECR_PWPRSC_0)

Pulse on compare pulse width prescaler 32

LL_TIM_PWPRSC_DIV64 (TIM_ECR_PWPRSC_2 | TIM_ECR_PWPRSC_1)

Pulse on compare pulse width prescaler 64

LL_TIM_PWPRSC_DIV128

(TIM_ECR_PWPRSC_2 | TIM_ECR_PWPRSC_1 \

| TIM_ECR_PWPRSC_0)


Pulse on compare pulse width prescaler 128

Software Event

group TIM_LL_EC_SW_EVENT

Defines

LL_TIM_SW_EVENT_UPD TIM_EGR_UG

Update generation

LL_TIM_SW_EVENT_CC1 TIM_EGR_CC1G

Capture/Compare 1 generation

LL_TIM_SW_EVENT_CC2 TIM_EGR_CC2G

Capture/Compare 2 generation

LL_TIM_SW_EVENT_CC3 TIM_EGR_CC3G

Capture/Compare 3 generation

LL_TIM_SW_EVENT_CC4 TIM_EGR_CC4G

Capture/Compare 4 generation

LL_TIM_SW_EVENT_COM TIM_EGR_COMG

Commutation generation

LL_TIM_SW_EVENT_TRGI TIM_EGR_TG

Trigger generation

LL_TIM_SW_EVENT_BRK TIM_EGR_BG

Break generation

LL_TIM_SW_EVENT_BRK2 TIM_EGR_B2G

Break 2 generation

LL TIM Macros

group TIM_LL_Exported_Macros

Defines

LL_TIM_GETFLAG_UIFCPY ( cnt ) (STM32_READ_BIT((cnt), TIM_CNT_UIFCPY) >> TIM_CNT_UIFCPY_Pos)

HELPER macro that retrieves the UIFCPY flag from the counter value.

Note

e.g., LL_TIM_GETFLAG_UIFCPY( LL_TIM_GetCounter()).

Note

Relevant only if UIF flag remapping has been enabled (UIF status bit is copied to TIMx_CNT register bit 31).

Parameters :

  • cnt – Counter value

Return values :

UIF – status bit

LL_TIM_CALC_DEADTIME ( tim_clk , clk_div , dt ) ( (((uint64_t)((dt)*1000U)) < (( LL_TIM_DT_DELAY_1 +1U) * LL_TIM_CALC_DTS

((tim_clk), (clk_div)))) ? \

(uint8_t)(((uint64_t)((dt)*1000U) /

LL_TIM_CALC_DTS ((tim_clk), (clk_div))) & LL_TIM_DT_DELAY_1

) : \

(((uint64_t)((dt)*1000U)) < ((64U + (

LL_TIM_DT_DELAY_2 +1U)) * 2U * LL_TIM_CALC_DTS

((tim_clk), (clk_div)))) ? \

(uint8_t)(

LL_TIM_DT_RANGE_2 | ((uint8_t)((uint8_t)((((uint64_t)((dt)*1000U))/ LL_TIM_CALC_DTS

((tim_clk), \

(clk_div))) >> 1U) - (uint8_t) 64) &

LL_TIM_DT_DELAY_2

)) :\

(((uint64_t)((dt)*1000U)) < ((32U + (

LL_TIM_DT_DELAY_3 +1U)) * 8U * LL_TIM_CALC_DTS

((tim_clk), (clk_div)))) ? \

(uint8_t)(

LL_TIM_DT_RANGE_3 | ((uint8_t)((uint8_t)(((((uint64_t)(dt)*1000U))/ LL_TIM_CALC_DTS

((tim_clk), \

(clk_div))) >> 3U) - (uint8_t) 32) &

LL_TIM_DT_DELAY_3

)) :\

(((uint64_t)((dt)*1000U)) < ((32U + (

LL_TIM_DT_DELAY_4 +1U)) * 16U * LL_TIM_CALC_DTS

((tim_clk), (clk_div)))) ? \

(uint8_t)(

LL_TIM_DT_RANGE_4 | ((uint8_t)((uint8_t)(((((uint64_t)(dt)*1000U))/ LL_TIM_CALC_DTS

((tim_clk), \

(clk_div))) >> 4U) - (uint8_t) 32) &

LL_TIM_DT_DELAY_4

)) :\

0U)


HELPER macro calculating DTG[0:7] in the TIMx_BDTR register to achieve the requested dead time duration.

Note

e.g., LL_TIM_CALC_DEADTIME(80000000, LL_TIM_GetClockDivision(), 120).

Parameters :
Return values :

DTG[0:7] –

LL_TIM_CALC_PSC ( tim_clk , cnt_clk ) (((tim_clk) >= (cnt_clk)) ? (uint32_t)((((tim_clk) + (cnt_clk)/2U)/(cnt_clk)) - 1U) : 0U)

HELPER macro calculating the prescaler value to achieve the required counter clock frequency.

Note

e.g., LL_TIM_CALC_PSC(80000000, 1000000).

Parameters :

  • tim_clk – timer input clock frequency (in Hz)

  • cnt_clk – counter clock frequency (in Hz)

Return values :

Prescaler – value (between Min_Data=0 and Max_Data=65535)

LL_TIM_CALC_ARR ( tim_clk , psc , freq ) ((((tim_clk)/((psc) + 1U)) >= (freq)) ? (((tim_clk)/((freq) * ((psc) + 1U))) - 1U) : 0U)

HELPER macro calculating the auto-reload value to achieve the required output signal frequency.

Note

e.g., LL_TIM_CALC_ARR(1000000, LL_TIM_GetPrescaler(), 10000).

Parameters :

  • tim_clk – timer input clock frequency (in Hz)

  • psc – prescaler

  • freq – output signal frequency (in Hz)

Return values :

Auto-reload – value (between Min_Data=0 and Max_Data=65535)

LL_TIM_CALC_ARR_DITHER ( tim_clk , psc , freq )

((((tim_clk)/((psc) + 1U)) >= (freq)) ? \

(uint32_t)((((uint64_t)(tim_clk) * 16U/((freq) * ((psc) + 1U))) - 16U)) : 0U)


HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required output signal frequency.

Note

e.g., LL_TIM_CALC_ARR_DITHER(1000000, LL_TIM_GetPrescaler(), 10000).

Parameters :

  • tim_clk – timer input clock frequency (in Hz)

  • psc – prescaler

  • freq – output signal frequency (in Hz)

Return values :

Auto-reload – value (between Min_Data=0 and Max_Data=65535)

LL_TIM_CALC_DELAY ( tim_clk , psc , delay )

((uint32_t)(((uint64_t)(tim_clk) * (uint64_t)(delay)) \

/ ((uint64_t)1000000U * (uint64_t)((psc) + 1U))))


HELPER macro calculating the compare value required to achieve the required timer output compare active/inactive delay.

Note

e.g., LL_TIM_CALC_DELAY(1000000, LL_TIM_GetPrescaler(), 10).

Parameters :

  • tim_clk – timer input clock frequency (in Hz)

  • psc – prescaler

  • delay – timer output compare active/inactive delay (in us)

Return values :

Compare – value (between Min_Data=0 and Max_Data=65535)

LL_TIM_CALC_DELAY_DITHER ( tim_clk , psc , delay )

((uint32_t)(((uint64_t)(tim_clk) * (uint64_t)(delay) * 16U) \

/ ((uint64_t)1000000U * (uint64_t)((psc) + 1U))))


HELPER macro calculating the compare value, with dithering feature enabled, to achieve the required timer output compare active/inactive delay.

Note

e.g., LL_TIM_CALC_DELAY_DITHER(1000000, LL_TIM_GetPrescaler(), 10).

Parameters :

  • tim_clk – timer input clock frequency (in Hz)

  • psc – prescaler

  • delay – timer output compare active/inactive delay (in us)

Return values :

Compare – value (between Min_Data=0 and Max_Data=65535)

LL_TIM_CALC_PULSE ( tim_clk , psc , delay , pulse ) ((uint32_t)( LL_TIM_CALC_DELAY

((tim_clk), (psc), (pulse)) \

+

LL_TIM_CALC_DELAY ((tim_clk), (psc), (delay))))

HELPER macro calculating the auto-reload value to achieve the required pulse duration (when the timer operates in one pulse mode).

Note

e.g., LL_TIM_CALC_PULSE(1000000, LL_TIM_GetPrescaler(), 10, 20).

Parameters :

  • tim_clk – timer input clock frequency (in Hz)

  • psc – prescaler

  • delay – timer output compare active/inactive delay (in us)

  • pulse – pulse duration (in us)

Return values :

Auto-reload – value (between Min_Data=0 and Max_Data=65535)

LL_TIM_CALC_PULSE_DITHER ( tim_clk , psc , delay , pulse ) ((uint32_t)( LL_TIM_CALC_DELAY_DITHER

((tim_clk), (psc), (pulse)) \

+

LL_TIM_CALC_DELAY_DITHER ((tim_clk), (psc), (delay))))

HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required pulse duration (when the timer operates in one pulse mode).

Note

e.g., LL_TIM_CALC_PULSE_DITHER(1000000, LL_TIM_GetPrescaler(), 10, 20).

Parameters :

  • tim_clk – timer input clock frequency (in Hz)

  • psc – prescaler

  • delay – timer output compare active/inactive delay (in us)

  • pulse – pulse duration (in us)

Return values :

Auto-reload – value (between Min_Data=0 and Max_Data=65535)

LL_TIM_GET_ICPSC_RATIO ( ic_psc ) ((uint32_t)(0x01U << (((ic_psc) >> 16U) >> TIM_CCMR1_IC1PSC_Pos)))

HELPER macro retrieving the ratio of the input capture prescaler.

Note

e.g., LL_TIM_GET_ICPSC_RATIO( LL_TIM_IC_GetPrescaler()).

Parameters :
Return values :

Input – capture prescaler ratio (1, 2, 4, or 8).

Defines

LL_TIM_WRITE_REG ( instance , reg , value ) STM32_WRITE_REG((instance)->reg, (value))

Write a value in TIM register.

Parameters :

  • instance – TIM Instance

  • reg – Register to be written

  • value – Value to be written in the register

LL_TIM_READ_REG ( instance , reg ) STM32_READ_REG((instance)->reg)

Read a value in TIM register.

Parameters :

  • instance – TIM Instance

  • reg – Register to be read

Return values :

Register – value

LL TIM Functions

group TIM_LL_Exported_Functions

Functions

void LL_TIM_EnableCounter ( TIM_TypeDef * timx )

Enable timer counter.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 CEN LL_TIM_EnableCounter

Parameters :

timx – Timer instance

void LL_TIM_DisableCounter ( TIM_TypeDef * timx )

Disable timer counter.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 CEN LL_TIM_DisableCounter

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledCounter ( const TIM_TypeDef * timx )

Indicates whether the timer counter is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 CEN LL_TIM_IsEnabledCounter

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableUpdateEvent ( TIM_TypeDef * timx )

Enable update event generation.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 UDIS LL_TIM_EnableUpdateEvent

Parameters :

timx – Timer instance

void LL_TIM_DisableUpdateEvent ( TIM_TypeDef * timx )

Disable update event generation.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 UDIS LL_TIM_DisableUpdateEvent

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledUpdateEvent ( const TIM_TypeDef * timx )

Indicates whether update event generation is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 UDIS LL_TIM_IsEnabledUpdateEvent

Parameters :

timx – Timer instance

Return values :

Inverted – state of bit (0 or 1).

void LL_TIM_SetUpdateSource ( TIM_TypeDef * timx , uint32_t update_source )

Set update event source.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 URS LL_TIM_SetUpdateSource

Note

Update event source set to LL_TIM_UPDATESOURCE_REGULAR: any of the following events generate an update interrupt or DMA request if enabled:

  • Counter overflow/underflow

  • Setting the UG bit

  • Update generation through the slave mode controller

Note

Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter overflow/underflow generates an update interrupt or DMA request if enabled.

Parameters :
uint32_t LL_TIM_GetUpdateSource ( const TIM_TypeDef * timx )

Get actual event update source.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 URS LL_TIM_GetUpdateSource

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_EnableOnePulseMode ( TIM_TypeDef * timx )

Enable one-pulse mode (OPM).

Reference Manual to LL API cross reference (Register Field Functions)

CR1 OPM LL_TIM_EnableOnePulseMode

Note

When OPM is set, the timer stops counting at the next update event (UEV).

Parameters :

timx – Timer instance

void LL_TIM_DisableOnePulseMode ( TIM_TypeDef * timx )

Disable one-pulse mode (OPM).

Reference Manual to LL API cross reference (Register Field Functions)

CR1 OPM LL_TIM_DisableOnePulseMode

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledOnePulseMode ( const TIM_TypeDef * timx )

Indicates whether one-pulse mode (OPM) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 OPM LL_TIM_IsEnabledOnePulseMode

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_SetCounterMode ( TIM_TypeDef * timx , uint32_t mode )

Set the timer counter counting mode.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 DIR LL_TIM_SetCounterMode

CR1 CMS LL_TIM_SetCounterMode

Note

Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(timx) can be used to check whether or not the counter mode selection feature is supported by a timer instance.

Note

Switching from Center Aligned counter mode to Edge counter mode (or reverse) requires a timer reset to avoid unexpected direction due to DIR bit readonly in center aligned mode.

Parameters :
uint32_t LL_TIM_GetCounterMode ( const TIM_TypeDef * timx )

Get actual counter mode.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 DIR LL_TIM_GetCounterMode

CR1 CMS LL_TIM_GetCounterMode

Note

Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(timx) can be used to check whether or not the counter mode selection feature is supported by a timer instance.

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_EnableARRPreload ( TIM_TypeDef * timx )

Enable auto-reload (ARR) preload.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 ARPE LL_TIM_EnableARRPreload

Parameters :

timx – Timer instance

void LL_TIM_DisableARRPreload ( TIM_TypeDef * timx )

Disable auto-reload (ARR) preload.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 ARPE LL_TIM_DisableARRPreload

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledARRPreload ( const TIM_TypeDef * timx )

Indicates whether auto-reload (ARR) preload is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 ARPE LL_TIM_IsEnabledARRPreload

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_SetClockDivision ( TIM_TypeDef * timx , uint32_t clock_division )

Set the division ratio between the timer kernel clock (tim_ker_ck) and the DTS sampling clock (DTS_ck) used by the dead-time generators (when supported) and the break/break2 filters.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 CKD LL_TIM_SetClockDivision

Note

Macro IS_TIM_CLOCK_DIVISION_INSTANCE(timx) can be used to check whether or not the clock division feature is supported by the timer instance.

Parameters :
uint32_t LL_TIM_GetClockDivision ( const TIM_TypeDef * timx )

Get the actual division ratio between the timer kernel clock (tim_ker_ck) and the DTS sampling clock (DTS_ck) used by the dead-time generators (when supported) and the break/break2 filters.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 CKD LL_TIM_GetClockDivision

Note

Macro IS_TIM_CLOCK_DIVISION_INSTANCE(timx) can be used to check whether or not the clock division feature is supported by the timer instance.

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_SetClockDivision2 ( TIM_TypeDef * timx , uint32_t clock_division2 )

Set the division ratio between the DTS sampling clock (DTS_ck) and the DTS2 sampling clock (DTS2_ck) used by the digital filters.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 CKD2 LL_TIM_SetClockDivision2

Note

Macro IS_TIM_CLOCK_DIVISION_INSTANCE(timx) can be used to check whether or not the clock division feature is supported by the timer instance.

Parameters :
uint32_t LL_TIM_GetClockDivision2 ( const TIM_TypeDef * timx )

Get the actual division ratio between the DTS sampling clock (DTS_ck) and the DTS2 sampling clock (DTS2_ck) used by the digital filters.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 CKD2 LL_TIM_GetClockDivision2

Note

Macro IS_TIM_CLOCK_DIVISION_INSTANCE(timx) can be used to check whether or not the clock division feature is supported by the timer instance.

Parameters :

timx – Timer instance

Return values :

Returned – value can be a combination of the following values:

void LL_TIM_SetCounter ( TIM_TypeDef * timx , uint32_t counter )

Set the counter value.

Reference Manual to LL API cross reference (Register Field Functions)

CNT CNT LL_TIM_SetCounter

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

If dithering is activated, pay attention to the Counter value interpretation

Parameters :

  • timx – Timer instance

  • counter – Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)

uint32_t LL_TIM_GetCounter ( const TIM_TypeDef * timx )

Get the counter value.

Reference Manual to LL API cross reference (Register Field Functions)

CNT CNT LL_TIM_GetCounter

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

If dithering is activated, pay attention to the Counter value interpretation

Parameters :

timx – Timer instance

Return values :

Counter – value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)

uint32_t LL_TIM_GetDirection ( const TIM_TypeDef * timx )

Get the current direction of the counter.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 DIR LL_TIM_GetDirection

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_SetPrescaler ( TIM_TypeDef * timx , uint32_t prescaler )

Set the prescaler value.

Reference Manual to LL API cross reference (Register Field Functions)

PSC PSC LL_TIM_SetPrescaler

Note

The counter clock frequency CK_CNT is equal to fCK_PSC / (PSC[15:0] + 1).

Note

The prescaler can be changed on the fly as this control register is buffered. The new prescaler ratio is taken into account at the next update event.

Note

Helper macro LL_TIM_CALC_PSC can be used to calculate the prescaler parameter

Parameters :

  • timx – Timer instance

  • prescaler – between Min_Data=0 and Max_Data=65535

uint32_t LL_TIM_GetPrescaler ( const TIM_TypeDef * timx )

Get the prescaler value.

Reference Manual to LL API cross reference (Register Field Functions)

PSC PSC LL_TIM_GetPrescaler

Parameters :

timx – Timer instance

Return values :

Prescaler – value between Min_Data=0 and Max_Data=65535

void LL_TIM_SetAutoReload ( TIM_TypeDef * timx , uint32_t auto_reload )

Set the auto-reload value.

Reference Manual to LL API cross reference (Register Field Functions)

ARR ARR LL_TIM_SetAutoReload

Note

The counter is blocked while the auto-reload value is null.

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

Helper macro LL_TIM_CALC_ARR can be used to calculate the auto_reload parameter In case dithering is activated,macro LL_TIM_CALC_ARR_DITHER can be used instead, to calculate the auto_reload parameter.

Parameters :

  • timx – Timer instance

  • auto_reload – between Min_Data=0 and Max_Data=65535

uint32_t LL_TIM_GetAutoReload ( const TIM_TypeDef * timx )

Get the auto-reload value.

Reference Manual to LL API cross reference (Register Field Functions)

ARR ARR LL_TIM_GetAutoReload

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

If dithering is activated, pay attention to the returned value interpretation

Parameters :

timx – Timer instance

Return values :

Auto-reload – value

void LL_TIM_SetRepetitionCounter ( TIM_TypeDef * timx , uint32_t repetition_counter )

Set the repetition counter value.

Reference Manual to LL API cross reference (Register Field Functions)

RCR REP LL_TIM_SetRepetitionCounter

Note

Macro IS_TIM_REPETITION_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a repetition counter.

Parameters :

  • timx – Timer instance

  • repetition_counter – between Min_Data=0 and Max_Data=255 or 65535 for advanced timer.

uint32_t LL_TIM_GetRepetitionCounter ( const TIM_TypeDef * timx )

Get the repetition counter value.

Reference Manual to LL API cross reference (Register Field Functions)

RCR REP LL_TIM_GetRepetitionCounter

Note

Macro IS_TIM_REPETITION_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a repetition counter.

Parameters :

timx – Timer instance

Return values :

Repetition – counter value

void LL_TIM_EnableUIFRemap ( TIM_TypeDef * timx )

Force a continuous copy of the update interrupt flag (UIF) into the timer counter register (bit 31).

Reference Manual to LL API cross reference (Register Field Functions)

CR1 UIFREMAP LL_TIM_EnableUIFRemap

Note

This allows both the counter value and a potential roll-over condition signalled by the UIFCPY flag to be read in an atomic way.

Parameters :

timx – Timer instance

void LL_TIM_DisableUIFRemap ( TIM_TypeDef * timx )

Disable update interrupt flag (UIF) remapping.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 UIFREMAP LL_TIM_DisableUIFRemap

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledUIFRemap ( const TIM_TypeDef * timx )

Indicates whether the update interrupt flag (UIF) remapping is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 UIFREMAP LL_TIM_IsEnabledUIFRemap

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

uint32_t LL_TIM_IsActiveUIFCPY ( uint32_t Counter )

Indicate whether update interrupt flag (UIF) copy is set.

Parameters :

Counter – Counter value

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableDithering ( TIM_TypeDef * timx )

Enable dithering.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 DITHEN LL_TIM_EnableDithering

Warning

Dithering can only be enabled when the counter is disabled.

Parameters :

timx – Timer instance

void LL_TIM_DisableDithering ( TIM_TypeDef * timx )

Disable dithering.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 DITHEN LL_TIM_DisableDithering

Warning

Dithering can only be disabled when the counter is disabled.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledDithering ( const TIM_TypeDef * timx )

Indicates whether dithering is activated.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 DITHEN LL_TIM_IsEnabledDithering

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

Functions

void LL_TIM_CC_EnablePreload ( TIM_TypeDef * timx )

Enable the capture/compare control bits (CCxE, CCxNE and OCxM) preload.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 CCPC LL_TIM_CC_EnablePreload

Note

CCxE, CCxNE and OCxM bits are preloaded, after having been written, they are updated only when a commutation event (COM) occurs.

Note

Only on channels that have a complementary output.

Note

Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(timx) can be used to check whether or not a timer instance is able to generate a commutation event.

Parameters :

timx – Timer instance

void LL_TIM_CC_DisablePreload ( TIM_TypeDef * timx )

Disable the capture/compare control bits (CCxE, CCxNE and OCxM) preload.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 CCPC LL_TIM_CC_DisablePreload

Note

Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(timx) can be used to check whether or not a timer instance is able to generate a commutation event.

Parameters :

timx – Timer instance

uint32_t LL_TIM_CC_IsEnabledPreload ( const TIM_TypeDef * timx )

Indicates whether the capture/compare control bits (CCxE, CCxNE and OCxM) preload is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 CCPC LL_TIM_CC_IsEnabledPreload

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_CC_SetUpdate ( TIM_TypeDef * timx , uint32_t cc_update_source )

Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM).

Reference Manual to LL API cross reference (Register Field Functions)

CR2 CCUS LL_TIM_CC_SetUpdate

Note

Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(timx) can be used to check whether or not a timer instance is able to generate a commutation event.

Parameters :
uint32_t LL_TIM_CC_GetUpdate ( const TIM_TypeDef * timx )

Get the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM).

Reference Manual to LL API cross reference (Register Field Functions)

CR2 CCUS LL_TIM_CC_GetUpdate

Note

Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(timx) can be used to check whether or not a timer instance is able to generate a commutation event.

Parameters :

timx – Timer instance

Return values :

The – returned value can be one of the following values:

void LL_TIM_CC_SetDMAReqTrigger ( TIM_TypeDef * timx , uint32_t dma_req_trigger )

Set the trigger of the capture/compare DMA request.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 CCDS LL_TIM_CC_SetDMAReqTrigger

Parameters :
uint32_t LL_TIM_CC_GetDMAReqTrigger ( const TIM_TypeDef * timx )

Get actual trigger of the capture/compare DMA request.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 CCDS LL_TIM_CC_GetDMAReqTrigger

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_CC_SetLockLevel ( TIM_TypeDef * timx , uint32_t lock_level )

Set the lock level to freeze the configuration of several capture/compare parameters.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR LOCK LL_TIM_CC_SetLockLevel

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not the lock mechanism is supported by a timer instance.

Parameters :
uint32_t LL_TIM_CC_GetLockLevel ( const TIM_TypeDef * timx )

Get the lock level that freezes the configuration of several capture/compare parameters.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR LOCK LL_TIM_CC_GetLockLevel

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not the lock mechanism is supported by a timer instance.

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_CC_EnableChannel ( TIM_TypeDef * timx , uint32_t channels )

Enable capture/compare channels.

Reference Manual to LL API cross reference (Register Field Functions)

CCER CC1E LL_TIM_CC_EnableChannel

CCER CC1NE LL_TIM_CC_EnableChannel

CCER CC2E LL_TIM_CC_EnableChannel

CCER CC2NE LL_TIM_CC_EnableChannel

CCER CC3E LL_TIM_CC_EnableChannel

CCER CC3NE LL_TIM_CC_EnableChannel

CCER CC4E LL_TIM_CC_EnableChannel

CCER CC4NE LL_TIM_CC_EnableChannel

CCER CC5E LL_TIM_CC_EnableChannel

CCER CC6E LL_TIM_CC_EnableChannel

CCER CC7E LL_TIM_CC_EnableChannel

Parameters :
void LL_TIM_CC_DisableChannel ( TIM_TypeDef * timx , uint32_t channels )

Disable capture/compare channels.

Reference Manual to LL API cross reference (Register Field Functions)

CCER CC1E LL_TIM_CC_DisableChannel

CCER CC1NE LL_TIM_CC_DisableChannel

CCER CC2E LL_TIM_CC_DisableChannel

CCER CC2NE LL_TIM_CC_DisableChannel

CCER CC3E LL_TIM_CC_DisableChannel

CCER CC3NE LL_TIM_CC_DisableChannel

CCER CC4E LL_TIM_CC_DisableChannel

CCER CC4NE LL_TIM_CC_DisableChannel

CCER CC5E LL_TIM_CC_DisableChannel

CCER CC6E LL_TIM_CC_DisableChannel

CCER CC7E LL_TIM_CC_DisableChannel

Parameters :
uint32_t LL_TIM_CC_IsEnabledChannel ( const TIM_TypeDef * timx , uint32_t channels )

Indicate whether channel(s) is(are) enabled.

Reference Manual to LL API cross reference (Register Field Functions)

CCER CC1E LL_TIM_CC_IsEnabledChannel

CCER CC1NE LL_TIM_CC_IsEnabledChannel

CCER CC2E LL_TIM_CC_IsEnabledChannel

CCER CC2NE LL_TIM_CC_IsEnabledChannel

CCER CC3E LL_TIM_CC_IsEnabledChannel

CCER CC3NE LL_TIM_CC_IsEnabledChannel

CCER CC4E LL_TIM_CC_IsEnabledChannel

CCER CC4NE LL_TIM_CC_IsEnabledChannel

CCER CC5E LL_TIM_CC_IsEnabledChannel

CCER CC6E LL_TIM_CC_IsEnabledChannel

CCER CC7E LL_TIM_CC_IsEnabledChannel

Parameters :
Return values :

State – of bit (1 or 0).

Functions

void LL_TIM_OC_ConfigOutput ( TIM_TypeDef * timx , uint32_t channel , uint32_t configuration )

Configure an output channel.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 CC1S LL_TIM_OC_ConfigOutput

CCMR1 CC2S LL_TIM_OC_ConfigOutput

CCMR2 CC3S LL_TIM_OC_ConfigOutput

CCMR2 CC4S LL_TIM_OC_ConfigOutput

CCER CC1P LL_TIM_OC_ConfigOutput

CCER CC2P LL_TIM_OC_ConfigOutput

CCER CC3P LL_TIM_OC_ConfigOutput

CCER CC4P LL_TIM_OC_ConfigOutput

CCER CC5P LL_TIM_OC_ConfigOutput

CCER CC6P LL_TIM_OC_ConfigOutput

CCER CC7P LL_TIM_OC_ConfigOutput

CR2 OIS1 LL_TIM_OC_ConfigOutput

CR2 OIS2 LL_TIM_OC_ConfigOutput

CR2 OIS3 LL_TIM_OC_ConfigOutput

CR2 OIS4 LL_TIM_OC_ConfigOutput

CR2 OIS5 LL_TIM_OC_ConfigOutput

CR2 OIS6 LL_TIM_OC_ConfigOutput

CR2 OIS7 LL_TIM_OC_ConfigOutput

Parameters :
void LL_TIM_OC_SetMode ( TIM_TypeDef * timx , uint32_t channel , uint32_t mode )

Define the behavior of the output reference signal OCxREF from which OCx and OCxN (when relevant) are derived.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 OC1M LL_TIM_OC_SetMode

CCMR1 OC2M LL_TIM_OC_SetMode

CCMR2 OC3M LL_TIM_OC_SetMode

CCMR2 OC4M LL_TIM_OC_SetMode

CCMR3 OC5M LL_TIM_OC_SetMode

CCMR3 OC6M LL_TIM_OC_SetMode

CCMR4 OC7M LL_TIM_OC_SetMode

Parameters :
uint32_t LL_TIM_OC_GetMode ( const TIM_TypeDef * timx , uint32_t channel )

Get the output compare mode of an output channel.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 OC1M LL_TIM_OC_GetMode

CCMR1 OC2M LL_TIM_OC_GetMode

CCMR2 OC3M LL_TIM_OC_GetMode

CCMR2 OC4M LL_TIM_OC_GetMode

CCMR3 OC5M LL_TIM_OC_GetMode

CCMR3 OC6M LL_TIM_OC_GetMode

CCMR4 OC7M LL_TIM_OC_GetMode

Parameters :
Return values :

Returned – value can be one of the following values:

void LL_TIM_OC_SetPolarity ( TIM_TypeDef * timx , uint32_t channel , uint32_t polarity )

Set the polarity of an output channel.

Reference Manual to LL API cross reference (Register Field Functions)

CCER CC1P LL_TIM_OC_SetPolarity

CCER CC1NP LL_TIM_OC_SetPolarity

CCER CC2P LL_TIM_OC_SetPolarity

CCER CC2NP LL_TIM_OC_SetPolarity

CCER CC3P LL_TIM_OC_SetPolarity

CCER CC3NP LL_TIM_OC_SetPolarity

CCER CC4P LL_TIM_OC_SetPolarity

CCER CC4NP LL_TIM_OC_SetPolarity

CCER CC5P LL_TIM_OC_SetPolarity

CCER CC6P LL_TIM_OC_SetPolarity

CCER CC7P LL_TIM_OC_SetPolarity

Parameters :
uint32_t LL_TIM_OC_GetPolarity ( const TIM_TypeDef * timx , uint32_t channel )

Get the polarity of an output channel.

Reference Manual to LL API cross reference (Register Field Functions)

CCER CC1P LL_TIM_OC_GetPolarity

CCER CC1NP LL_TIM_OC_GetPolarity

CCER CC2P LL_TIM_OC_GetPolarity

CCER CC2NP LL_TIM_OC_GetPolarity

CCER CC3P LL_TIM_OC_GetPolarity

CCER CC3NP LL_TIM_OC_GetPolarity

CCER CC4P LL_TIM_OC_GetPolarity

CCER CC4NP LL_TIM_OC_GetPolarity

CCER CC5P LL_TIM_OC_GetPolarity

CCER CC6P LL_TIM_OC_GetPolarity

CCER CC7P LL_TIM_OC_GetPolarity

Parameters :
Return values :

Returned – value can be one of the following values:

void LL_TIM_OC_SetIdleState ( TIM_TypeDef * timx , uint32_t channel , uint32_t idle_state )

Set the idle state of an output channel.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 OIS1 LL_TIM_OC_SetIdleState

CR2 OIS2N LL_TIM_OC_SetIdleState

CR2 OIS2 LL_TIM_OC_SetIdleState

CR2 OIS2N LL_TIM_OC_SetIdleState

CR2 OIS3 LL_TIM_OC_SetIdleState

CR2 OIS3N LL_TIM_OC_SetIdleState

CR2 OIS4 LL_TIM_OC_SetIdleState

CR2 OIS4N LL_TIM_OC_SetIdleState

CR2 OIS5 LL_TIM_OC_SetIdleState

CR2 OIS6 LL_TIM_OC_SetIdleState

CR2 OIS7 LL_TIM_OC_SetIdleState

Note

This function is significant only for the timer instances supporting the break feature. Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides a break input.

Parameters :
uint32_t LL_TIM_OC_GetIdleState ( const TIM_TypeDef * timx , uint32_t channel )

Get the idle state of an output channel.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 OIS1 LL_TIM_OC_GetIdleState

CR2 OIS2N LL_TIM_OC_GetIdleState

CR2 OIS2 LL_TIM_OC_GetIdleState

CR2 OIS2N LL_TIM_OC_GetIdleState

CR2 OIS3 LL_TIM_OC_GetIdleState

CR2 OIS3N LL_TIM_OC_GetIdleState

CR2 OIS4 LL_TIM_OC_GetIdleState

CR2 OIS4N LL_TIM_OC_GetIdleState

CR2 OIS5 LL_TIM_OC_GetIdleState

CR2 OIS6 LL_TIM_OC_GetIdleState

CR2 OIS7 LL_TIM_OC_GetIdleState

Parameters :
Return values :

Returned – value can be one of the following values:

void LL_TIM_OC_SetOverrideState ( TIM_TypeDef * timx , uint32_t channel , uint32_t override_state )

Set the override state of a disabled output channel.

Reference Manual to LL API cross reference (Register Field Functions)

OOR OOS1 LL_TIM_OC_SetOverrideState

OOR OOS1N LL_TIM_OC_SetOverrideState

OOR OOS2 LL_TIM_OC_SetOverrideState

OOR OOS2N LL_TIM_OC_SetOverrideState

OOR OOS3 LL_TIM_OC_SetOverrideState

OOR OOS3N LL_TIM_OC_SetOverrideState

OOR OOS4 LL_TIM_OC_SetOverrideState

OOR OOS4N LL_TIM_OC_SetOverrideState

Note

Only applicable to external channels and their complementary (1, 2, 3 and 4).

Note

This bit-field can not be modified as long as LOCK level 1, 2 or 3 has been programmed (LOCK bits in TIMx_BDTR register).

Parameters :
uint32_t LL_TIM_OC_GetOverrideState ( const TIM_TypeDef * timx , uint32_t channel )

Get the override state of a disabled output channel.

Reference Manual to LL API cross reference (Register Field Functions)

OOR OOS1 LL_TIM_OC_GetOverrideState

OOR OOS1N LL_TIM_OC_GetOverrideState

OOR OOS2 LL_TIM_OC_GetOverrideState

OOR OOS2N LL_TIM_OC_GetOverrideState

OOR OOS3 LL_TIM_OC_GetOverrideState

OOR OOS3N LL_TIM_OC_GetOverrideState

OOR OOS4 LL_TIM_OC_GetOverrideState

OOR OOS4N LL_TIM_OC_GetOverrideState

Parameters :
Return values :

Returned – value can be one of the following values:

void LL_TIM_OC_EnableOutputOverride ( TIM_TypeDef * timx )

Enable output override (outputs are forced in an idle state defined with OOSx/OOSxN bits).

Reference Manual to LL API cross reference (Register Field Functions)

OOR OCC LL_TIM_OC_EnableOutputOverride

Note

This function can only be used when the outputs are in idle state (MOE = 0).

Parameters :

timx – Timer instance

void LL_TIM_OC_DisableOutputOverride ( TIM_TypeDef * timx )

Disable output override (outputs are in the default idle state).

Reference Manual to LL API cross reference (Register Field Functions)

OOR OCC LL_TIM_OC_DisableOutputOverride

Note

This function can only be used when the outputs are in idle state (MOE = 0).

Parameters :

timx – Timer instance

uint32_t LL_TIM_OC_IsEnabledOutputOverride ( const TIM_TypeDef * timx )

Indicate whether output override is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

OOR OCC LL_TIM_OC_IsEnabledOutputOverride

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_OC_EnableFast ( TIM_TypeDef * timx , uint32_t channel )

Enable fast mode for the output channel.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 OC1FE LL_TIM_OC_EnableFast

CCMR1 OC2FE LL_TIM_OC_EnableFast

CCMR2 OC3FE LL_TIM_OC_EnableFast

CCMR2 OC4FE LL_TIM_OC_EnableFast

CCMR3 OC5FE LL_TIM_OC_EnableFast

CCMR3 OC6FE LL_TIM_OC_EnableFast

CCMR4 OC7FE LL_TIM_OC_EnableFast

Note

Acts only if the channel is configured in PWM1 or PWM2 mode.

Parameters :
void LL_TIM_OC_DisableFast ( TIM_TypeDef * timx , uint32_t channel )

Disable fast mode for the output channel.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 OC1FE LL_TIM_OC_DisableFast

CCMR1 OC2FE LL_TIM_OC_DisableFast

CCMR2 OC3FE LL_TIM_OC_DisableFast

CCMR2 OC4FE LL_TIM_OC_DisableFast

CCMR3 OC5FE LL_TIM_OC_DisableFast

CCMR3 OC6FE LL_TIM_OC_DisableFast

CCMR4 OC7FE LL_TIM_OC_DisableFast

Parameters :
uint32_t LL_TIM_OC_IsEnabledFast ( const TIM_TypeDef * timx , uint32_t channel )

Indicates whether fast mode is enabled for the output channel.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 OC1FE LL_TIM_OC_IsEnabledFast

CCMR1 OC2FE LL_TIM_OC_IsEnabledFast

CCMR2 OC3FE LL_TIM_OC_IsEnabledFast

CCMR2 OC4FE LL_TIM_OC_IsEnabledFast

CCMR3 OC5FE LL_TIM_OC_IsEnabledFast

CCMR3 OC6FE LL_TIM_OC_IsEnabledFast

CCMR4 OC7FE LL_TIM_OC_IsEnabledFast

Parameters :
Return values :

State – of bit (1 or 0).

void LL_TIM_OC_EnablePreload ( TIM_TypeDef * timx , uint32_t channel )

Enable compare register (TIMx_CCRx) preload for the output channel.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 OC1PE LL_TIM_OC_EnablePreload

CCMR1 OC2PE LL_TIM_OC_EnablePreload

CCMR2 OC3PE LL_TIM_OC_EnablePreload

CCMR2 OC4PE LL_TIM_OC_EnablePreload

CCMR3 OC5PE LL_TIM_OC_EnablePreload

CCMR3 OC6PE LL_TIM_OC_EnablePreload

CCMR4 OC7PE LL_TIM_OC_EnablePreload

Parameters :
void LL_TIM_OC_DisablePreload ( TIM_TypeDef * timx , uint32_t channel )

Disable compare register (TIMx_CCRx) preload for the output channel.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 OC1PE LL_TIM_OC_DisablePreload

CCMR1 OC2PE LL_TIM_OC_DisablePreload

CCMR2 OC3PE LL_TIM_OC_DisablePreload

CCMR2 OC4PE LL_TIM_OC_DisablePreload

CCMR3 OC5PE LL_TIM_OC_DisablePreload

CCMR3 OC6PE LL_TIM_OC_DisablePreload

CCMR4 OC7PE LL_TIM_OC_DisablePreload

Parameters :
uint32_t LL_TIM_OC_IsEnabledPreload ( const TIM_TypeDef * timx , uint32_t channel )

Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channel.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 OC1PE LL_TIM_OC_IsEnabledPreload

CCMR1 OC2PE LL_TIM_OC_IsEnabledPreload

CCMR2 OC3PE LL_TIM_OC_IsEnabledPreload

CCMR2 OC4PE LL_TIM_OC_IsEnabledPreload

CCMR3 OC5PE LL_TIM_OC_IsEnabledPreload

CCMR3 OC6PE LL_TIM_OC_IsEnabledPreload

CCMR4 OC7PE LL_TIM_OC_IsEnabledPreload

Parameters :
Return values :

State – of bit (1 or 0).

void LL_TIM_OC_EnableClear ( TIM_TypeDef * timx , uint32_t channel )

Enable clearing the output channel on an external event.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 OC1CE LL_TIM_OC_EnableClear

CCMR1 OC2CE LL_TIM_OC_EnableClear

CCMR2 OC3CE LL_TIM_OC_EnableClear

CCMR2 OC4CE LL_TIM_OC_EnableClear

CCMR3 OC5CE LL_TIM_OC_EnableClear

CCMR3 OC6CE LL_TIM_OC_EnableClear

CCMR4 OC7CE LL_TIM_OC_EnableClear

Note

This function can only be used in Output compare and PWM modes. It does not work in Forced mode.

Note

Macro IS_TIM_OCXREF_CLEAR_INSTANCE(timx) can be used to check whether or not a timer instance can clear the OCxREF signal on an external event.

Parameters :
void LL_TIM_OC_DisableClear ( TIM_TypeDef * timx , uint32_t channel )

Disable clearing the output channel on an external event.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 OC1CE LL_TIM_OC_DisableClear

CCMR1 OC2CE LL_TIM_OC_DisableClear

CCMR2 OC3CE LL_TIM_OC_DisableClear

CCMR2 OC4CE LL_TIM_OC_DisableClear

CCMR3 OC5CE LL_TIM_OC_DisableClear

CCMR3 OC6CE LL_TIM_OC_DisableClear

CCMR4 OC7CE LL_TIM_OC_DisableClear

Note

Macro IS_TIM_OCXREF_CLEAR_INSTANCE(timx) can be used to check whether or not a timer instance can clear the OCxREF signal on an external event.

Parameters :
uint32_t LL_TIM_OC_IsEnabledClear ( const TIM_TypeDef * timx , uint32_t channel )

Indicates clearing the output channel on an external event is enabled for the output channel.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 OC1CE LL_TIM_OC_IsEnabledClear

CCMR1 OC2CE LL_TIM_OC_IsEnabledClear

CCMR2 OC3CE LL_TIM_OC_IsEnabledClear

CCMR2 OC4CE LL_TIM_OC_IsEnabledClear

CCMR3 OC5CE LL_TIM_OC_IsEnabledClear

CCMR3 OC6CE LL_TIM_OC_IsEnabledClear

CCMR4 OC7CE LL_TIM_OC_IsEnabledClear

Note

This function enables clearing the output channel on an external event.

Note

This function can only be used in Output compare and PWM modes. It does not work in Forced mode.

Note

Macro IS_TIM_OCXREF_CLEAR_INSTANCE(timx) can be used to check whether or not a timer instance can clear the OCxREF signal on an external event.

Parameters :
Return values :

State – of bit (1 or 0).

void LL_TIM_OC_SetBreakMode ( TIM_TypeDef * timx , uint32_t channel , uint32_t break_mode )

Set the break channel output mode BKxM.

Reference Manual to LL API cross reference (Register Field Functions)

MPR1 BKM1 LL_TIM_OC_SetBreakMode

MPR1 BKM1N LL_TIM_OC_SetBreakMode

MPR1 BKM2 LL_TIM_OC_SetBreakMode

MPR1 BKM2N LL_TIM_OC_SetBreakMode

MPR1 BKM3 LL_TIM_OC_SetBreakMode

MPR1 BKM3N LL_TIM_OC_SetBreakMode

MPR1 BKM4 LL_TIM_OC_SetBreakMode

MPR1 BKM4N LL_TIM_OC_SetBreakMode

Note

This bit must be modified only when the counter is disabled.

Note

The break2 feature must be disabled when the delayed mode is enabled.

Parameters :
uint32_t LL_TIM_OC_GetBreakMode ( const TIM_TypeDef * timx , uint32_t channel )

Get the break channel output mode BKxM.

Reference Manual to LL API cross reference (Register Field Functions)

MPR1 BKM1 LL_TIM_OC_GetBreakMode

MPR1 BKM1N LL_TIM_OC_GetBreakMode

MPR1 BKM2 LL_TIM_OC_GetBreakMode

MPR1 BKM2N LL_TIM_OC_GetBreakMode

MPR1 BKM3 LL_TIM_OC_GetBreakMode

MPR1 BKM3N LL_TIM_OC_GetBreakMode

MPR1 BKM4 LL_TIM_OC_GetBreakMode

MPR1 BKM4N LL_TIM_OC_GetBreakMode

Parameters :
Return values :

Returned – value can be one of the following values:

void LL_TIM_OC_SetDeadTime ( TIM_TypeDef * timx , uint32_t deadtime )

Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal and the rising edge of the Ocx and OCxN signals).

Reference Manual to LL API cross reference (Register Field Functions)

BDTR DTG LL_TIM_OC_SetDeadTime

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not dead-time insertion feature is supported by a timer instance.

Note

Helper macro LL_TIM_CALC_DEADTIME can be used to calculate the deadtime parameter

Parameters :

  • timx – Timer instance

  • deadtime – between Min_Data=0 and Max_Data=255

uint32_t LL_TIM_OC_GetDeadTime ( const TIM_TypeDef * timx )

Get the dead-time delay (delay inserted between the rising edge of the OCxREF signal and the rising edge of the Ocx and OCxN signals).

Reference Manual to LL API cross reference (Register Field Functions)

BDTR DTG LL_TIM_OC_GetDeadTime

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not dead-time insertion feature is supported by a timer instance.

Note

Helper macro LL_TIM_CALC_DEADTIME can be used to calculate the deadtime parameter

Parameters :

timx – Timer instance

Return values :

deadtime – between Min_Data=0 and Max_Data=255

void LL_TIM_OC_SetCompareCH1 ( TIM_TypeDef * timx , uint32_t compare_value )

Set compare value for output channel 1 (TIMx_CCR1).

Reference Manual to LL API cross reference (Register Field Functions)

CCR1 CCR1 LL_TIM_OC_SetCompareCH1

Note

In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

Macro IS_TIM_CC1_INSTANCE(timx) can be used to check whether or not output channel 1 is supported by a timer instance.

Note

If dithering is activated, compare_value can be calculated with macro LL_TIM_CALC_DELAY_DITHER.

Parameters :

  • timx – Timer instance

  • compare_value – between Min_Data=0 and Max_Data=65535

void LL_TIM_OC_SetCompareCH2 ( TIM_TypeDef * timx , uint32_t compare_value )

Set compare value for output channel 2 (TIMx_CCR2).

Reference Manual to LL API cross reference (Register Field Functions)

CCR2 CCR2 LL_TIM_OC_SetCompareCH2

Note

In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

Macro IS_TIM_CC2_INSTANCE(timx) can be used to check whether or not output channel 2 is supported by a timer instance.

Note

If dithering is activated, compare_value can be calculated with macro LL_TIM_CALC_DELAY_DITHER.

Parameters :

  • timx – Timer instance

  • compare_value – between Min_Data=0 and Max_Data=65535

void LL_TIM_OC_SetCompareCH3 ( TIM_TypeDef * timx , uint32_t compare_value )

Set compare value for output channel 3 (TIMx_CCR3).

Reference Manual to LL API cross reference (Register Field Functions)

CCR3 CCR3 LL_TIM_OC_SetCompareCH3

Note

In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

Macro IS_TIM_CC3_INSTANCE(timx) can be used to check whether or not output channel is supported by a timer instance.

Note

If dithering is activated, compare_value can be calculated with macro LL_TIM_CALC_DELAY_DITHER.

Parameters :

  • timx – Timer instance

  • compare_value – between Min_Data=0 and Max_Data=65535

void LL_TIM_OC_SetCompareCH4 ( TIM_TypeDef * timx , uint32_t compare_value )

Set compare value for output channel 4 (TIMx_CCR4).

Reference Manual to LL API cross reference (Register Field Functions)

CCR4 CCR4 LL_TIM_OC_SetCompareCH4

Note

In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

Macro IS_TIM_CC4_INSTANCE(timx) can be used to check whether or not output channel 4 is supported by a timer instance.

Note

If dithering is activated, compare_value can be calculated with macro LL_TIM_CALC_DELAY_DITHER.

Parameters :

  • timx – Timer instance

  • compare_value – between Min_Data=0 and Max_Data=65535

void LL_TIM_OC_SetCompareCH5 ( TIM_TypeDef * timx , uint32_t compare_value )

Set compare value for output channel 5 (TIMx_CCR5).

Reference Manual to LL API cross reference (Register Field Functions)

CCR5 CCR5 LL_TIM_OC_SetCompareCH5

Note

Macro IS_TIM_CC5_INSTANCE(timx) can be used to check whether or not output channel 5 is supported by a timer instance.

Note

If dithering is activated, compare_value can be calculated with macro LL_TIM_CALC_DELAY_DITHER.

Parameters :

  • timx – Timer instance

  • compare_value – between Min_Data=0 and Max_Data=65535

void LL_TIM_OC_SetCompareCH6 ( TIM_TypeDef * timx , uint32_t compare_value )

Set compare value for output channel 6 (TIMx_CCR6).

Reference Manual to LL API cross reference (Register Field Functions)

CCR6 CCR6 LL_TIM_OC_SetCompareCH6

Note

Macro IS_TIM_CC6_INSTANCE(timx) can be used to check whether or not output channel 6 is supported by a timer instance.

Note

If dithering is activated, compare_value can be calculated with macro LL_TIM_CALC_DELAY_DITHER.

Parameters :

  • timx – Timer instance

  • compare_value – between Min_Data=0 and Max_Data=65535

void LL_TIM_OC_SetCompareCH7 ( TIM_TypeDef * timx , uint32_t compare_value )

Set compare value for output channel 7 (TIMx_CCR7).

Reference Manual to LL API cross reference (Register Field Functions)

CCR7 CCR7 LL_TIM_OC_SetCompareCH7

Note

Macro IS_TIM_CC7_INSTANCE(timx) can be used to check whether or not output channel 7 is supported by a timer instance.

Note

If dithering is activated, compare_value can be calculated with macro LL_TIM_CALC_DELAY_DITHER.

Parameters :

  • timx – Timer instance

  • compare_value – between Min_Data=0 and Max_Data=65535

void LL_TIM_OC_SetCompareValue ( TIM_TypeDef * timx , uint32_t compare_unit , uint32_t compare_value )

Set compare value for the selected compare unit.

Reference Manual to LL API cross reference (Register Field Functions)

CCR7 CCR7 LL_TIM_OC_SetCompareValue

CCR1 CCR1 LL_TIM_OC_SetCompareValue

CCR2 CCR2 LL_TIM_OC_SetCompareValue

CCR3 CCR3 LL_TIM_OC_SetCompareValue

CCR4 CCR4 LL_TIM_OC_SetCompareValue

CCR5 CCR5 LL_TIM_OC_SetCompareValue

CCR6 CCR6 LL_TIM_OC_SetCompareValue

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

Macro IS_TIM_CCx_INSTANCE(timx) can be used to check whether or not capture unit x is supported by a timer instance.

Note

If dithering is activated, compare_value can be calculated with macro LL_TIM_CALC_DELAY_DITHER.

Parameters :
uint32_t LL_TIM_OC_GetCompareCH1 ( const TIM_TypeDef * timx )

Get compare value (TIMx_CCR1) set for output channel 1.

Reference Manual to LL API cross reference (Register Field Functions)

CCR1 CCR1 LL_TIM_OC_GetCompareCH1

Note

In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

Macro IS_TIM_CC1_INSTANCE(timx) can be used to check whether or not output channel 1 is supported by a timer instance.

Note

If dithering is activated, pay attention to the returned value interpretation.

Parameters :

timx – Timer instance

Return values :

compare_value – (between Min_Data=0 and Max_Data=65535)

uint32_t LL_TIM_OC_GetCompareCH2 ( const TIM_TypeDef * timx )

Get compare value (TIMx_CCR2) set for output channel 2.

Reference Manual to LL API cross reference (Register Field Functions)

CCR2 CCR2 LL_TIM_OC_GetCompareCH2

Note

In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

Macro IS_TIM_CC2_INSTANCE(timx) can be used to check whether or not output channel 2 is supported by a timer instance.

Note

If dithering is activated, pay attention to the returned value interpretation.

Parameters :

timx – Timer instance

Return values :

compare_value – (between Min_Data=0 and Max_Data=65535)

uint32_t LL_TIM_OC_GetCompareCH3 ( const TIM_TypeDef * timx )

Get compare value (TIMx_CCR3) set for output channel 3.

Reference Manual to LL API cross reference (Register Field Functions)

CCR3 CCR3 LL_TIM_OC_GetCompareCH3

Note

In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

Macro IS_TIM_CC3_INSTANCE(timx) can be used to check whether or not output channel 3 is supported by a timer instance.

Note

If dithering is activated, pay attention to the returned value interpretation.

Parameters :

timx – Timer instance

Return values :

compare_value – (between Min_Data=0 and Max_Data=65535)

uint32_t LL_TIM_OC_GetCompareCH4 ( const TIM_TypeDef * timx )

Get compare value (TIMx_CCR4) set for output channel 4.

Reference Manual to LL API cross reference (Register Field Functions)

CCR4 CCR4 LL_TIM_OC_GetCompareCH4

Note

In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

Macro IS_TIM_CC4_INSTANCE(timx) can be used to check whether or not output channel 4 is supported by a timer instance.

Note

If dithering is activated, pay attention to the returned value interpretation.

Parameters :

timx – Timer instance

Return values :

compare_value – (between Min_Data=0 and Max_Data=65535)

uint32_t LL_TIM_OC_GetCompareCH5 ( const TIM_TypeDef * timx )

Get compare value (TIMx_CCR5) set for output channel 5.

Reference Manual to LL API cross reference (Register Field Functions)

CCR5 CCR5 LL_TIM_OC_GetCompareCH5

Note

Macro IS_TIM_CC5_INSTANCE(timx) can be used to check whether or not output channel 5 is supported by a timer instance.

Note

If dithering is activated, pay attention to the returned value interpretation.

Parameters :

timx – Timer instance

Return values :

compare_value – (between Min_Data=0 and Max_Data=65535)

uint32_t LL_TIM_OC_GetCompareCH6 ( const TIM_TypeDef * timx )

Get compare value (TIMx_CCR6) set for output channel 6.

Reference Manual to LL API cross reference (Register Field Functions)

CCR6 CCR6 LL_TIM_OC_GetCompareCH6

Note

Macro IS_TIM_CC6_INSTANCE(timx) can be used to check whether or not output channel 6 is supported by a timer instance.

Note

If dithering is activated, pay attention to the returned value interpretation.

Parameters :

timx – Timer instance

Return values :

compare_value – (between Min_Data=0 and Max_Data=65535)

uint32_t LL_TIM_OC_GetCompareCH7 ( const TIM_TypeDef * timx )

Get compare value (TIMx_CCR7) set for output channel 7.

Reference Manual to LL API cross reference (Register Field Functions)

CCR7 CCR7 LL_TIM_OC_GetCompareCH7

Note

Macro IS_TIM_CC7_INSTANCE(timx) can be used to check whether or not output channel 7 is supported by a timer instance.

Note

If dithering is activated, pay attention to the returned value interpretation.

Parameters :

timx – Timer instance

Return values :

compare_value – (between Min_Data=0 and Max_Data=65535)

uint32_t LL_TIM_OC_GetCompareValue ( TIM_TypeDef * timx , uint32_t compare_unit )

Get compare value for the selected compare unit.

Reference Manual to LL API cross reference (Register Field Functions)

CCR1 CCR1 LL_TIM_OC_GetCompareValue

CCR2 CCR2 LL_TIM_OC_GetCompareValue

CCR3 CCR3 LL_TIM_OC_GetCompareValue

CCR4 CCR4 LL_TIM_OC_GetCompareValue

CCR5 CCR5 LL_TIM_OC_GetCompareValue

CCR6 CCR6 LL_TIM_OC_GetCompareValue

CCR7 CCR7 LL_TIM_OC_GetCompareValue

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

Macro IS_TIM_CCx_INSTANCE(timx) can be used to check whether or not capture unit x is supported by a timer instance.

Note

If dithering is activated, compare_value can be calculated with macro LL_TIM_CALC_DELAY_DITHER.

Parameters :
Return values :

compare_value – (between Min_Data=0 and Max_Data=65535)

void LL_TIM_SetCH5CombinedChannels ( TIM_TypeDef * timx , uint32_t group_ch5 )

Select on which reference signal the OC5REF is combined to.

Reference Manual to LL API cross reference (Register Field Functions)

CCR5 GC5C1 LL_TIM_SetCH5CombinedChannels

CCR5 GC5C2 LL_TIM_SetCH5CombinedChannels

CCR5 GC5C3 LL_TIM_SetCH5CombinedChannels

CCR5 GC5C4 LL_TIM_SetCH5CombinedChannels

CCR5 GC5C1O LL_TIM_SetCH5CombinedChannels

CCR5 GC5C2O LL_TIM_SetCH5CombinedChannels

CCR5 GC5C3O LL_TIM_SetCH5CombinedChannels

CCR5 GC5C4O LL_TIM_SetCH5CombinedChannels

Note

Macro IS_TIM_COMBINED3PHASEPWM_INSTANCE(timx) can be used to check whether or not a timer instance supports the combined 3-phase PWM mode.

Parameters :
uint32_t LL_TIM_GetCH5CombinedChannels ( const TIM_TypeDef * timx )

Get on which reference signal the OC5REF is combined to.

Note

Macro IS_TIM_COMBINED3PHASEPWM_INSTANCE(timx) can be used to check whether or not a timer instance supports the combined 3-phase PWM mode.

Parameters :

timx – Timer instance

Return values :

Returned – value can be a combination of the following values:

void LL_TIM_OC_SetPulseWidthPrescaler ( TIM_TypeDef * timx , uint32_t pulse_width_prescaler )

Set the pulse on compare pulse width prescaler.

Reference Manual to LL API cross reference (Register Field Functions)

ECR PWPRSC LL_TIM_OC_SetPulseWidthPrescaler

Note

Macro IS_TIM_PULSEONCOMPARE_INSTANCE(timx) can be used to check whether or not the pulse on compare feature is supported by the timer instance.

Parameters :
uint32_t LL_TIM_OC_GetPulseWidthPrescaler ( const TIM_TypeDef * timx )

Get the pulse on compare pulse width prescaler.

Reference Manual to LL API cross reference (Register Field Functions)

ECR PWPRSC LL_TIM_OC_GetPulseWidthPrescaler

Note

Macro IS_TIM_PULSEONCOMPARE_INSTANCE(timx) can be used to check whether or not the pulse on compare feature is supported by the timer instance.

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_OC_SetPulseWidth ( TIM_TypeDef * timx , uint32_t pulse_width )

Set the pulse on compare pulse width duration.

Reference Manual to LL API cross reference (Register Field Functions)

ECR PW LL_TIM_OC_SetPulseWidth

Note

Macro IS_TIM_PULSEONCOMPARE_INSTANCE(timx) can be used to check whether or not the pulse on compare feature is supported by the timer instance.

Parameters :

  • timx – Timer instance

  • pulse_width – This parameter can be between Min_Data=0 and Max_Data=255

uint32_t LL_TIM_OC_GetPulseWidth ( const TIM_TypeDef * timx )

Get the pulse on compare pulse width duration.

Reference Manual to LL API cross reference (Register Field Functions)

ECR PW LL_TIM_OC_GetPulseWidth

Note

Macro IS_TIM_PULSEONCOMPARE_INSTANCE(timx) can be used to check whether or not the pulse on compare feature is supported by the timer instance.

Parameters :

timx – Timer instance

Return values :

Returned – value can be between Min_Data=0 and Max_Data=255:

Functions

void LL_TIM_IC_Config ( TIM_TypeDef * timx , uint32_t channel , uint32_t configuration )

Configure input channel.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 CC1S LL_TIM_IC_Config

CCMR1 IC1PSC LL_TIM_IC_Config

CCMR1 IC1F LL_TIM_IC_Config

CCMR1 CC2S LL_TIM_IC_Config

CCMR1 IC2PSC LL_TIM_IC_Config

CCMR1 IC2F LL_TIM_IC_Config

CCMR2 CC3S LL_TIM_IC_Config

CCMR2 IC3PSC LL_TIM_IC_Config

CCMR2 IC3F LL_TIM_IC_Config

CCMR2 CC4S LL_TIM_IC_Config

CCMR2 IC4PSC LL_TIM_IC_Config

CCMR2 IC4F LL_TIM_IC_Config

CCER CC1P LL_TIM_IC_Config

CCER CC1NP LL_TIM_IC_Config

CCER CC2P LL_TIM_IC_Config

CCER CC2NP LL_TIM_IC_Config

CCER CC3P LL_TIM_IC_Config

CCER CC3NP LL_TIM_IC_Config

CCER CC4P LL_TIM_IC_Config

CCER CC4NP LL_TIM_IC_Config

Parameters :
void LL_TIM_IC_SetSource ( TIM_TypeDef * timx , uint32_t ti_source )

Select the input channel source.

The description below summarizes “Timer Instance” and “Timer Input” parameter combinations:

Reference Manual to LL API cross reference (Register Field Functions)

TISEL TI1SEL LL_TIM_IC_SetSource

TISEL TI2SEL LL_TIM_IC_SetSource

TISEL TI3SEL LL_TIM_IC_SetSource

TISEL TI4SEL LL_TIM_IC_SetSource

TIM1: one of the following values:

. . TI1_RMP can be one of the following values LL_TIM_TIM1_TI1_GPIO: tim1_ti1 is connected to TIM1_CH1 LL_TIM_TIM1_TI1_COMP1_OUT: tim1_ti1 is connected to comp1_out LL_TIM_TIM1_TI1_COMP2_OUT: tim1_ti1 is connected to comp2_out (*) LL_TIM_TIM1_TI1_COMP3_OUT: tim1_ti1 is connected to comp3_out (*) LL_TIM_TIM1_TI1_COMP4_OUT: tim1_ti1 is connected to comp4_out (*) LL_TIM_TIM1_TI1_PLAY1_OUT0: tim1_ti1 is connected to play1_out0 (*)

. . TI2_RMP can be one of the following values LL_TIM_TIM1_TI2_GPIO: tim1_ti2 is connected to TIM1_CH2 LL_TIM_TIM1_TI2_PLAY1_OUT2: tim1_ti2 is connected to play1_out2 (*)

. . TI3_RMP can be one of the following values LL_TIM_TIM1_TI3_GPIO: tim1_ti3 is connected to TIM1_CH3 LL_TIM_TIM1_TI3_PLAY1_OUT1: tim1_ti3 is connected to play1_out1 (*)

. . TI4_RMP can be one of the following values LL_TIM_TIM1_TI4_GPIO: tim1_ti4 is connected to TIM1_CH4 LL_TIM_TIM1_TI4_PLAY1_OUT8: tim1_ti4 is connected to play1_out8 (*)

TIM2: one of the following values:

. . TI1_RMP can be one of the following values LL_TIM_TIM2_TI1_GPIO: tim2_ti1 is connected to TIM2_CH1 LL_TIM_TIM2_TI1_COMP1_OUT: tim2_ti1 is connected to comp1_out LL_TIM_TIM2_TI1_COMP2_OUT: tim2_ti1 is connected to comp2_out (*) LL_TIM_TIM2_TI1_ETH1_PTP_PPS_OUT: tim2_ti1 is connected to eth1_ptp_pps_out (*) LL_TIM_TIM2_TI1_LSI: tim2_ti1 is connected to LSI LL_TIM_TIM2_TI1_LSE: tim2_ti1 is connected to LSE LL_TIM_TIM2_TI1_RTC_WUT_TRG: tim2_ti1 is connected to rtc_wut_trg LL_TIM_TIM2_TI1_TIM5_CH1: tim2_ti1 is connected to TIM5_CH1 (*) LL_TIM_TIM2_TI1_FDCAN1_RXEOF_EVT: tim2_ti1 is connected to fdcan1_rxeof_evt (*) LL_TIM_TIM2_TI1_COMP3_OUT: tim2_ti1 is connected to comp3_out (*) LL_TIM_TIM2_TI1_COMP4_OUT: tim2_ti1 is connected to comp4_out (*) LL_TIM_TIM2_TI1_PLAY1_OUT15: tim2_ti1 is connected to play1_out15 (*)

. . TI2_RMP can be one of the following values LL_TIM_TIM2_TI2_GPIO: tim2_ti2 is connected to TIM2_CH2 LL_TIM_TIM2_TI2_HSE_RTC: tim2_ti2 is connected to hse_1M_ck LL_TIM_TIM2_TI2_MCO1: tim2_ti2 is connected to MCO1 LL_TIM_TIM2_TI2_MCO2: tim2_ti2 is connected to MCO2 LL_TIM_TIM2_TI2_FDCAN1_TXEOF_EVT: tim2_ti2 is connected to fdcan1_txeof_evt (*) LL_TIM_TIM2_TI2_PLAY1_OUT15: tim2_ti2 is connected to play1_out15 (*)

. . TI3_RMP can be one of the following values LL_TIM_TIM2_TI3_GPIO: tim2_ti3 is connected to TIM2_CH3 LL_TIM_TIM2_TI3_PLAY1_OUT3: tim2_ti3 is connected to play1_out3 (*) LL_TIM_TIM2_TI3_FDCAN2_RXEOF_EVT: tim2_ti3 is connected to fdcan2_rxeof_evt (*)

. . TI4_RMP can be one of the following values LL_TIM_TIM2_TI4_GPIO: tim2_ti4 is connected to TIM2_CH4 LL_TIM_TIM2_TI4_COMP1_OUT: tim2_ti4 is connected to comp1_out LL_TIM_TIM2_TI4_COMP2_OUT: tim2_ti4 is connected to comp2_out (*) LL_TIM_TIM2_TI4_PLAY1_OUT0: tim2_ti4 is connected to play1_out0 (*) LL_TIM_TIM2_TI4_FDCAN2_TXEOF_EVT: tim2_ti4 is connected to fdcan2_txeof_evt (*)

TIM3: one of the following values: (**)

. . TI1_RMP can be one of the following values LL_TIM_TIM3_TI1_GPIO: tim3_ti1 is connected to TIM3_CH1 LL_TIM_TIM3_TI1_COMP1_OUT: tim3_ti1 is connected to comp1_out LL_TIM_TIM3_TI1_ETH1_PTP_PPS_OUT: tim3_ti1 is connected to eth1_ptp_pps_out (*) LL_TIM_TIM3_TI1_FDCAN2_RXEOF_EVT: tim3_ti1 is connected to fdcan2_rxeof_evt (*) LL_TIM_TIM3_TI1_COMP2_OUT: tim3_ti1 is connected to comp2_out (*) LL_TIM_TIM3_TI1_COMP3_OUT: tim3_ti1 is connected to comp3_out (*) LL_TIM_TIM3_TI1_COMP4_OUT: tim3_ti1 is connected to comp4_out (*) LL_TIM_TIM3_TI1_PLAY1_OUT8: tim3_ti1 is connected to play1_out8 (*)

. . TI2_RMP can be one of the following values LL_TIM_TIM3_TI2_GPIO: tim3_ti2 is connected to TIM3_CH2 LL_TIM_TIM3_TI2_FDCAN2_TXEOF_EVT: tim3_ti2 is connected to fdcan2_txeof_evt (*) LL_TIM_TIM3_TI2_PLAY1_OUT9: tim3_ti2 is connected to play1_out9 (*)

. . TI3_RMP can be one of the following values LL_TIM_TIM3_TI3_GPIO: tim3_ti3 is connected to TIM3_CH3 LL_TIM_TIM3_TI3_PLAY1_OUT10: tim3_ti3 is connected to play1_out10 (*)

. . TI4_RMP can be one of the following values LL_TIM_TIM3_TI4_GPIO: tim3_ti4 is connected to TIM3_CH4 LL_TIM_TIM3_TI4_PLAY1_OUT11: tim3_ti4 is connected to play1_out11 (*)

TIM4: one of the following values: (**)

. . TI1_RMP can be one of the following values LL_TIM_TIM4_TI1_GPIO: tim4_ti1 is connected to TIM4_CH1 LL_TIM_TIM4_TI1_COMP1_OUT: tim4_ti1 is connected to comp1_out

. . TI2_RMP can be one of the following values LL_TIM_TIM4_TI2_GPIO: tim4_ti2 is connected to TIM4_CH2

. . TI3_RMP can be one of the following values LL_TIM_TIM4_TI3_GPIO: tim4_ti3 is connected to TIM4_CH3

. . TI4_RMP can be one of the following values LL_TIM_TIM4_TI4_GPIO: tim4_ti4 is connected to TIM4_CH4

TIM5: one of the following values: (**)

. . TI1_RMP can be one of the following values LL_TIM_TIM5_TI1_GPIO: tim5_ti1 is connected to TIM5_CH1 LL_TIM_TIM5_TI1_COMP1_OUT: tim5_ti1 is connected to comp1_out LL_TIM_TIM5_TI1_COMP2_OUT: tim5_ti1 is connected to comp2_out (*) LL_TIM_TIM5_TI1_COMP3_OUT: tim5_ti1 is connected to comp3_out (*) LL_TIM_TIM5_TI1_COMP4_OUT: tim5_ti1 is connected to comp4_out (*)

. . TI2_RMP can be one of the following values LL_TIM_TIM5_TI2_GPIO: tim5_ti2 is connected to TIM5_CH2

. . TI3_RMP can be one of the following values LL_TIM_TIM5_TI3_GPIO: tim5_ti3 is connected to TIM5_CH3

. . TI4_RMP can be one of the following values LL_TIM_TIM5_TI4_GPIO: tim5_ti4 is connected to TIM5_CH4

TIM8: one of the following values:

. . TI1_RMP can be one of the following values LL_TIM_TIM8_TI1_GPIO: tim8_ti1 is connected to TIM8_CH1 LL_TIM_TIM8_TI1_COMP1_OUT: tim8_ti1 is connected to comp1_out LL_TIM_TIM8_TI1_COMP2_OUT: tim8_ti1 is connected to comp2_out (*) LL_TIM_TIM8_TI1_COMP3_OUT: tim8_ti1 is connected to comp3_out (*) LL_TIM_TIM8_TI1_COMP4_OUT: tim8_ti1 is connected to comp4_out (*) LL_TIM_TIM8_TI1_PLAY1_OUT14: tim8_ti1 is connected to play1_out14 (*)

. . TI2_RMP can be one of the following values LL_TIM_TIM8_TI2_GPIO: tim8_ti2 is connected to TIM8_CH2 LL_TIM_TIM8_TI2_PLAY1_OUT10: tim8_ti2 is connected to play1_out10 (*)

. . TI3_RMP can be one of the following values LL_TIM_TIM8_TI3_GPIO: tim8_ti3 is connected to TIM8_CH3 LL_TIM_TIM8_TI3_PLAY1_OUT12: tim8_ti3 is connected to play1_out12 (*)

. . TI4_RMP can be one of the following values LL_TIM_TIM8_TI4_GPIO: tim8_ti4 is connected to TIM8_CH4 LL_TIM_TIM8_TI4_PLAY1_OUT5: tim8_ti4 is connected to play1_out5 (*)

TIM12: one of the following values:

. . TI1_RMP can be one of the following values LL_TIM_TIM12_TI1_GPIO: tim12_ti1 is connected to TIM12_CH1 LL_TIM_TIM12_TI1_COMP1_OUT: tim12_ti1 is connected to comp1_out LL_TIM_TIM12_TI1_COMP2_OUT: tim12_ti1 is connected to comp2_out (*) LL_TIM_TIM12_TI1_MCO1: tim12_ti1 is connected to MCO1 LL_TIM_TIM12_TI1_MCO2: tim12_ti1 is connected to MCO2 LL_TIM_TIM12_TI1_HSE_RTC: tim12_ti1 is connected to hse_1M_ck LL_TIM_TIM12_TI1_I3C1_IBI_ACK: tim12_ti1 is connected to i3c1_ibi_ack LL_TIM_TIM12_TI1_COMP3_OUT: tim12_ti1 is connected to comp3_out (*) LL_TIM_TIM12_TI1_COMP4_OUT: tim12_ti1 is connected to comp4_out (*) LL_TIM_TIM12_TI1_PLAY1_OUT7: tim12_ti1 is connected to play1_out7 (*)

. . TI2_RMP can be one of the following values LL_TIM_TIM12_TI2_GPIO: tim12_ti2 is connected to TIM12_CH2 LL_TIM_TIM12_TI2_PLAY1_OUT14: tim12_ti2 is connected to play1_out14 (*)

TIM15: one of the following values:

. . TI1_RMP can be one of the following values LL_TIM_TIM15_TI1_GPIO: tim15_ti1 is connected to TIM15_CH1 LL_TIM_TIM15_TI1_COMP1_OUT: tim15_ti1 is connected to comp1_out LL_TIM_TIM15_TI1_COMP2_OUT: tim15_ti1 is connected to comp2_out (*) LL_TIM_TIM15_TI1_LSE: tim15_ti1 is connected to LSE LL_TIM_TIM15_TI1_FDCAN2_RXEOF_EVT: tim15_ti1 is connected to fdcan2_rxeof_evt (*) LL_TIM_TIM15_TI1_COMP3_OUT: tim15_ti1 is connected to comp3_out (*) LL_TIM_TIM15_TI1_COMP4_OUT: tim15_ti1 is connected to comp4_out (*) LL_TIM_TIM15_TI1_PLAY1_OUT4: tim15_ti1 is connected to play1_out4 (*)

. . TI2_RMP can be one of the following values LL_TIM_TIM15_TI2_GPIO: tim15_ti2 is connected to TIM15_CH2 LL_TIM_TIM15_TI2_FDCAN2_TXEOF_EVT: tim15_ti2 is connected to fdcan2_txeof_evt (*) LL_TIM_TIM15_TI2_PLAY1_OUT5: tim15_ti2 is connected to play1_out5 (*)

TIM16: one of the following values: (**) LL_TIM_TIM16_TI1_GPIO: tim16_ti1 is connected to TIM16_CH1 LL_TIM_TIM16_TI1_COMP1_OUT: tim16_ti1 is connected to comp1_out LL_TIM_TIM16_TI1_LSI: tim16_ti1 is connected to LSI LL_TIM_TIM16_TI1_LSE: tim16_ti1 is connected to LSE LL_TIM_TIM16_TI1_RTC_WUT_TRG: tim16_ti1 is connected to rtc_wut_trg LL_TIM_TIM16_TI1_MCO1: tim16_ti1 is connected to MCO1 LL_TIM_TIM16_TI1_MCO2: tim16_ti1 is connected to MCO2 LL_TIM_TIM16_TI1_COMP2_OUT: tim16_ti1 is connected to comp2_out (*) LL_TIM_TIM16_TI1_COMP3_OUT: tim16_ti1 is connected to comp3_out (*) LL_TIM_TIM16_TI1_COMP4_OUT: tim16_ti1 is connected to comp4_out (*) LL_TIM_TIM16_TI1_PLAY1_OUT5: tim16_ti1 is connected to play1_out5 (*)

TIM17: one of the following values: (**) LL_TIM_TIM17_TI1_GPIO: tim17_ti1 is connected to TIM17_CH1 LL_TIM_TIM17_TI1_COMP1_OUT: tim17_ti1 is connected to comp1_out LL_TIM_TIM17_TI1_HSE_RTC: tim17_ti1 is connected to hse_1M_ck LL_TIM_TIM17_TI1_MCO1: tim17_ti1 is connected to MCO1 LL_TIM_TIM17_TI1_MCO2: tim17_ti1 is connected to MCO2 LL_TIM_TIM17_TI1_I3C1_IBI_ACK: tim17_ti1 is connected to i3c1_ibi_ack LL_TIM_TIM17_TI1_COMP2_OUT: tim17_ti1 is connected to comp2_out (*) LL_TIM_TIM17_TI1_COMP3_OUT: tim17_ti1 is connected to comp3_out (*) LL_TIM_TIM17_TI1_COMP4_OUT: tim17_ti1 is connected to comp4_out (*) LL_TIM_TIM17_TI1_PLAY1_OUT9: tim17_ti1 is connected to play1_out9 (*)

TIM20: one of the following values: (**)

. . TI1_RMP can be one of the following values LL_TIM_TIM20_TI1_GPIO: tim20_ti1 is connected to TIM20_CH1 LL_TIM_TIM20_TI1_COMP1_OUT: tim20_ti1 is connected to comp1_out LL_TIM_TIM20_TI1_COMP2_OUT: tim20_ti1 is connected to comp2_out (*) LL_TIM_TIM20_TI1_COMP3_OUT: tim20_ti1 is connected to comp3_out (*) LL_TIM_TIM20_TI1_COMP4_OUT: tim20_ti1 is connected to comp4_out (*) LL_TIM_TIM20_TI1_PLAY1_OUT3: tim20_ti1 is connected to play1_out3 (*)

. . TI2_RMP can be one of the following values LL_TIM_TIM20_TI2_GPIO: tim20_ti2 is connected to TIM20_CH2 LL_TIM_TIM20_TI2_PLAY1_OUT7: tim20_ti2 is connected to play1_out7 (*)

. . TI3_RMP can be one of the following values LL_TIM_TIM20_TI3_GPIO: tim20_ti3 is connected to TIM20_CH3 LL_TIM_TIM20_TI3_PLAY1_OUT8: tim20_ti3 is connected to play1_out8 (*)

. . TI4_RMP can be one of the following values LL_TIM_TIM20_TI4_GPIO: tim20_ti4 is connected to TIM20_CH4 LL_TIM_TIM20_TI4_PLAY1_OUT9: tim20_ti4 is connected to play1_out9 (*)

(*) Value not defined in all devices. (**) Timer instance not available on all devices.

Note

Macro IS_TIM_REMAP_INSTANCE(timx) can be used to check whether or not a some timer inputs can be remapped.

Parameters :

  • timx – Timer instance

  • ti_source – The timer input source parameter depends on timx. Description is available only in the CHM version of the User Manual (not in the PDF). Otherwise, see the Reference Manual description of the TISEL registers.

uint32_t LL_TIM_IC_GetSource ( const TIM_TypeDef * timx , uint32_t channel )

Get the source of the input channel.

Reference Manual to LL API cross reference (Register Field Functions)

TISEL TI1SEL LL_TIM_IC_GetSource

TISEL TI2SEL LL_TIM_IC_GetSource

TISEL TI3SEL LL_TIM_IC_GetSource

TISEL TI4SEL LL_TIM_IC_GetSource

Note

Macro IS_TIM_REMAP_INSTANCE(timx) can be used to check whether or not a some timer inputs can be remapped.

Parameters :
Return values :

Returned – value can be one of the following values: 

    TIM1: one of the following values:

       . . TI1_RMP can be one of the following values
       LL_TIM_TIM1_TI1_GPIO:                tim1_ti1 is connected to TIM1_CH1
       LL_TIM_TIM1_TI1_COMP1_OUT:           tim1_ti1 is connected to comp1_out
       LL_TIM_TIM1_TI1_COMP2_OUT:           tim1_ti1 is connected to comp2_out (*)
       LL_TIM_TIM1_TI1_COMP3_OUT:           tim1_ti1 is connected to comp3_out (*)
       LL_TIM_TIM1_TI1_COMP4_OUT:           tim1_ti1 is connected to comp4_out (*)
       LL_TIM_TIM1_TI1_PLAY1_OUT0:          tim1_ti1 is connected to play1_out0 (*)

       . . TI2_RMP can be one of the following values
       LL_TIM_TIM1_TI2_GPIO:                tim1_ti2 is connected to TIM1_CH2
       LL_TIM_TIM1_TI2_PLAY1_OUT2:          tim1_ti2 is connected to play1_out2 (*)

       . . TI3_RMP can be one of the following values
       LL_TIM_TIM1_TI3_GPIO:                tim1_ti3 is connected to TIM1_CH3
       LL_TIM_TIM1_TI3_PLAY1_OUT1:          tim1_ti3 is connected to play1_out1 (*)

       . . TI4_RMP can be one of the following values
       LL_TIM_TIM1_TI4_GPIO:                tim1_ti4 is connected to TIM1_CH4
       LL_TIM_TIM1_TI4_PLAY1_OUT8:          tim1_ti4 is connected to play1_out8 (*)

    TIM2: one of the following values:

       . . TI1_RMP can be one of the following values
       LL_TIM_TIM2_TI1_GPIO:                tim2_ti1 is connected to TIM2_CH1
       LL_TIM_TIM2_TI1_COMP1_OUT:           tim2_ti1 is connected to comp1_out
       LL_TIM_TIM2_TI1_COMP2_OUT:           tim2_ti1 is connected to comp2_out (*)
       LL_TIM_TIM2_TI1_ETH1_PTP_PPS_OUT:    tim2_ti1 is connected to eth1_ptp_pps_out (*)
       LL_TIM_TIM2_TI1_LSI:                 tim2_ti1 is connected to LSI
       LL_TIM_TIM2_TI1_LSE:                 tim2_ti1 is connected to LSE
       LL_TIM_TIM2_TI1_RTC_WUT_TRG:         tim2_ti1 is connected to rtc_wut_trg
       LL_TIM_TIM2_TI1_TIM5_CH1:            tim2_ti1 is connected to TIM5_CH1 (*)
       LL_TIM_TIM2_TI1_FDCAN1_RXEOF_EVT:    tim2_ti1 is connected to fdcan1_rxeof_evt (*)
       LL_TIM_TIM2_TI1_COMP3_OUT:           tim2_ti1 is connected to comp3_out (*)
       LL_TIM_TIM2_TI1_COMP4_OUT:           tim2_ti1 is connected to comp4_out (*)
       LL_TIM_TIM2_TI1_PLAY1_OUT15:         tim2_ti1 is connected to play1_out15 (*)

       . . TI2_RMP can be one of the following values
       LL_TIM_TIM2_TI2_GPIO:                tim2_ti2 is connected to TIM2_CH2
       LL_TIM_TIM2_TI2_HSE_RTC:             tim2_ti2 is connected to hse_1M_ck
       LL_TIM_TIM2_TI2_MCO1:                tim2_ti2 is connected to MCO1
       LL_TIM_TIM2_TI2_MCO2:                tim2_ti2 is connected to MCO2
       LL_TIM_TIM2_TI2_FDCAN1_TXEOF_EVT:    tim2_ti2 is connected to fdcan1_txeof_evt (*)
       LL_TIM_TIM2_TI2_PLAY1_OUT15:         tim2_ti2 is connected to play1_out15 (*)

       . . TI3_RMP can be one of the following values
       LL_TIM_TIM2_TI3_GPIO:                tim2_ti3 is connected to TIM2_CH3
       LL_TIM_TIM2_TI3_PLAY1_OUT3:          tim2_ti3 is connected to play1_out3 (*)
       LL_TIM_TIM2_TI3_FDCAN2_RXEOF_EVT:    tim2_ti3 is connected to fdcan2_rxeof_evt (*)

       . . TI4_RMP can be one of the following values
       LL_TIM_TIM2_TI4_GPIO:                tim2_ti4 is connected to TIM2_CH4
       LL_TIM_TIM2_TI4_COMP1_OUT:           tim2_ti4 is connected to comp1_out
       LL_TIM_TIM2_TI4_COMP2_OUT:           tim2_ti4 is connected to comp2_out (*)
       LL_TIM_TIM2_TI4_PLAY1_OUT0:          tim2_ti4 is connected to play1_out0 (*)
       LL_TIM_TIM2_TI4_FDCAN2_TXEOF_EVT:    tim2_ti4 is connected to fdcan2_txeof_evt (*)

    TIM3: one of the following values: (**)

       . . TI1_RMP can be one of the following values
       LL_TIM_TIM3_TI1_GPIO:                tim3_ti1 is connected to TIM3_CH1
       LL_TIM_TIM3_TI1_COMP1_OUT:           tim3_ti1 is connected to comp1_out
       LL_TIM_TIM3_TI1_ETH1_PTP_PPS_OUT:    tim3_ti1 is connected to eth1_ptp_pps_out (*)
       LL_TIM_TIM3_TI1_FDCAN2_RXEOF_EVT:    tim3_ti1 is connected to fdcan2_rxeof_evt (*)
       LL_TIM_TIM3_TI1_COMP2_OUT:           tim3_ti1 is connected to comp2_out (*)
       LL_TIM_TIM3_TI1_COMP3_OUT:           tim3_ti1 is connected to comp3_out (*)
       LL_TIM_TIM3_TI1_COMP4_OUT:           tim3_ti1 is connected to comp4_out (*)
       LL_TIM_TIM3_TI1_PLAY1_OUT8:          tim3_ti1 is connected to play1_out8 (*)

       . . TI2_RMP can be one of the following values
       LL_TIM_TIM3_TI2_GPIO:                tim3_ti2 is connected to TIM3_CH2
       LL_TIM_TIM3_TI2_FDCAN2_TXEOF_EVT:    tim3_ti2 is connected to fdcan2_txeof_evt (*)
       LL_TIM_TIM3_TI2_PLAY1_OUT9:          tim3_ti2 is connected to play1_out9 (*)

       . . TI3_RMP can be one of the following values
       LL_TIM_TIM3_TI3_GPIO:                tim3_ti3 is connected to TIM3_CH3
       LL_TIM_TIM3_TI3_PLAY1_OUT10:         tim3_ti3 is connected to play1_out10 (*)

       . . TI4_RMP can be one of the following values
       LL_TIM_TIM3_TI4_GPIO:                tim3_ti4 is connected to TIM3_CH4
       LL_TIM_TIM3_TI4_PLAY1_OUT11:         tim3_ti4 is connected to play1_out11 (*)

    TIM4: one of the following values: (**)

       . . TI1_RMP can be one of the following values
       LL_TIM_TIM4_TI1_GPIO:                tim4_ti1 is connected to TIM4_CH1
       LL_TIM_TIM4_TI1_COMP1_OUT:           tim4_ti1 is connected to comp1_out

       . . TI2_RMP can be one of the following values
       LL_TIM_TIM4_TI2_GPIO:                tim4_ti2 is connected to TIM4_CH2

       . . TI3_RMP can be one of the following values
       LL_TIM_TIM4_TI3_GPIO:                tim4_ti3 is connected to TIM4_CH3

       . . TI4_RMP can be one of the following values
       LL_TIM_TIM4_TI4_GPIO:                tim4_ti4 is connected to TIM4_CH4

    TIM5: one of the following values: (**)

       . . TI1_RMP can be one of the following values
       LL_TIM_TIM5_TI1_GPIO:                tim5_ti1 is connected to TIM5_CH1
       LL_TIM_TIM5_TI1_COMP1_OUT:           tim5_ti1 is connected to comp1_out
       LL_TIM_TIM5_TI1_COMP2_OUT:           tim5_ti1 is connected to comp2_out (*)
       LL_TIM_TIM5_TI1_COMP3_OUT:           tim5_ti1 is connected to comp3_out (*)
       LL_TIM_TIM5_TI1_COMP4_OUT:           tim5_ti1 is connected to comp4_out (*)

       . . TI2_RMP can be one of the following values
       LL_TIM_TIM5_TI2_GPIO:                tim5_ti2 is connected to TIM5_CH2

       . . TI3_RMP can be one of the following values
       LL_TIM_TIM5_TI3_GPIO:                tim5_ti3 is connected to TIM5_CH3

       . . TI4_RMP can be one of the following values
       LL_TIM_TIM5_TI4_GPIO:                tim5_ti4 is connected to TIM5_CH4

    TIM8: one of the following values:

       . . TI1_RMP can be one of the following values
       LL_TIM_TIM8_TI1_GPIO:                tim8_ti1 is connected to TIM8_CH1
       LL_TIM_TIM8_TI1_COMP1_OUT:           tim8_ti1 is connected to comp1_out
       LL_TIM_TIM8_TI1_COMP2_OUT:           tim8_ti1 is connected to comp2_out (*)
       LL_TIM_TIM8_TI1_COMP3_OUT:           tim8_ti1 is connected to comp3_out (*)
       LL_TIM_TIM8_TI1_COMP4_OUT:           tim8_ti1 is connected to comp4_out (*)
       LL_TIM_TIM8_TI1_PLAY1_OUT14:         tim8_ti1 is connected to play1_out14 (*)

       . . TI2_RMP can be one of the following values
       LL_TIM_TIM8_TI2_GPIO:                tim8_ti2 is connected to TIM8_CH2
       LL_TIM_TIM8_TI2_PLAY1_OUT10:         tim8_ti2 is connected to play1_out10 (*)

       . . TI3_RMP can be one of the following values
       LL_TIM_TIM8_TI3_GPIO:                tim8_ti3 is connected to TIM8_CH3
       LL_TIM_TIM8_TI3_PLAY1_OUT12:         tim8_ti3 is connected to play1_out12 (*)

       . . TI4_RMP can be one of the following values
       LL_TIM_TIM8_TI4_GPIO:                tim8_ti4 is connected to TIM8_CH4
       LL_TIM_TIM8_TI4_PLAY1_OUT5:          tim8_ti4 is connected to play1_out5 (*)

    TIM12: one of the following values:

       . . TI1_RMP can be one of the following values
       LL_TIM_TIM12_TI1_GPIO:               tim12_ti1 is connected to TIM12_CH1
       LL_TIM_TIM12_TI1_COMP1_OUT:          tim12_ti1 is connected to comp1_out
       LL_TIM_TIM12_TI1_COMP2_OUT:          tim12_ti1 is connected to comp2_out (*)
       LL_TIM_TIM12_TI1_MCO1:               tim12_ti1 is connected to MCO1
       LL_TIM_TIM12_TI1_MCO2:               tim12_ti1 is connected to MCO2
       LL_TIM_TIM12_TI1_HSE_RTC:            tim12_ti1 is connected to hse_1M_ck
       LL_TIM_TIM12_TI1_I3C1_IBI_ACK:       tim12_ti1 is connected to i3c1_ibi_ack
       LL_TIM_TIM12_TI1_COMP3_OUT:          tim12_ti1 is connected to comp3_out (*)
       LL_TIM_TIM12_TI1_COMP4_OUT:          tim12_ti1 is connected to comp4_out (*)
       LL_TIM_TIM12_TI1_PLAY1_OUT7:         tim12_ti1 is connected to play1_out7 (*)

       . . TI2_RMP can be one of the following values
       LL_TIM_TIM12_TI2_GPIO:               tim12_ti2 is connected to TIM12_CH2
       LL_TIM_TIM12_TI2_PLAY1_OUT14:        tim12_ti2 is connected to play1_out14 (*)

    TIM15: one of the following values:

       . . TI1_RMP can be one of the following values
       LL_TIM_TIM15_TI1_GPIO:               tim15_ti1 is connected to TIM15_CH1
       LL_TIM_TIM15_TI1_COMP1_OUT:          tim15_ti1 is connected to comp1_out
       LL_TIM_TIM15_TI1_COMP2_OUT:          tim15_ti1 is connected to comp2_out (*)
       LL_TIM_TIM15_TI1_LSE:                tim15_ti1 is connected to LSE
       LL_TIM_TIM15_TI1_FDCAN2_RXEOF_EVT:   tim15_ti1 is connected to fdcan2_rxeof_evt (*)
       LL_TIM_TIM15_TI1_COMP3_OUT:          tim15_ti1 is connected to comp3_out (*)
       LL_TIM_TIM15_TI1_COMP4_OUT:          tim15_ti1 is connected to comp4_out (*)
       LL_TIM_TIM15_TI1_PLAY1_OUT4:         tim15_ti1 is connected to play1_out4 (*)

       . . TI2_RMP can be one of the following values
       LL_TIM_TIM15_TI2_GPIO:               tim15_ti2 is connected to TIM15_CH2
       LL_TIM_TIM15_TI2_FDCAN2_TXEOF_EVT:   tim15_ti2 is connected to fdcan2_txeof_evt (*)
       LL_TIM_TIM15_TI2_PLAY1_OUT5:         tim15_ti2 is connected to play1_out5 (*)

    TIM16: one of the following values: (**)
       LL_TIM_TIM16_TI1_GPIO:               tim16_ti1 is connected to TIM16_CH1
       LL_TIM_TIM16_TI1_COMP1_OUT:          tim16_ti1 is connected to comp1_out
       LL_TIM_TIM16_TI1_LSI:                tim16_ti1 is connected to LSI
       LL_TIM_TIM16_TI1_LSE:                tim16_ti1 is connected to LSE
       LL_TIM_TIM16_TI1_RTC_WUT_TRG:        tim16_ti1 is connected to rtc_wut_trg
       LL_TIM_TIM16_TI1_MCO1:               tim16_ti1 is connected to MCO1
       LL_TIM_TIM16_TI1_MCO2:               tim16_ti1 is connected to MCO2
       LL_TIM_TIM16_TI1_COMP2_OUT:          tim16_ti1 is connected to comp2_out (*)
       LL_TIM_TIM16_TI1_COMP3_OUT:          tim16_ti1 is connected to comp3_out (*)
       LL_TIM_TIM16_TI1_COMP4_OUT:          tim16_ti1 is connected to comp4_out (*)
       LL_TIM_TIM16_TI1_PLAY1_OUT5:         tim16_ti1 is connected to play1_out5 (*)

    TIM17: one of the following values: (**)
       LL_TIM_TIM17_TI1_GPIO:               tim17_ti1 is connected to TIM17_CH1
       LL_TIM_TIM17_TI1_COMP1_OUT:          tim17_ti1 is connected to comp1_out
       LL_TIM_TIM17_TI1_HSE_RTC:            tim17_ti1 is connected to hse_1M_ck
       LL_TIM_TIM17_TI1_MCO1:               tim17_ti1 is connected to MCO1
       LL_TIM_TIM17_TI1_MCO2:               tim17_ti1 is connected to MCO2
       LL_TIM_TIM17_TI1_I3C1_IBI_ACK:       tim17_ti1 is connected to i3c1_ibi_ack
       LL_TIM_TIM17_TI1_COMP2_OUT:          tim17_ti1 is connected to comp2_out (*)
       LL_TIM_TIM17_TI1_COMP3_OUT:          tim17_ti1 is connected to comp3_out (*)
       LL_TIM_TIM17_TI1_COMP4_OUT:          tim17_ti1 is connected to comp4_out (*)
       LL_TIM_TIM17_TI1_PLAY1_OUT9:         tim17_ti1 is connected to play1_out9 (*)

    TIM20: one of the following values: (**)

       . . TI1_RMP can be one of the following values
       LL_TIM_TIM20_TI1_GPIO:               tim20_ti1 is connected to TIM20_CH1
       LL_TIM_TIM20_TI1_COMP1_OUT:          tim20_ti1 is connected to comp1_out
       LL_TIM_TIM20_TI1_COMP2_OUT:          tim20_ti1 is connected to comp2_out (*)
       LL_TIM_TIM20_TI1_COMP3_OUT:          tim20_ti1 is connected to comp3_out (*)
       LL_TIM_TIM20_TI1_COMP4_OUT:          tim20_ti1 is connected to comp4_out (*)
       LL_TIM_TIM20_TI1_PLAY1_OUT3:         tim20_ti1 is connected to play1_out3 (*)

       . . TI2_RMP can be one of the following values
       LL_TIM_TIM20_TI2_GPIO:               tim20_ti2 is connected to TIM20_CH2
       LL_TIM_TIM20_TI2_PLAY1_OUT7:         tim20_ti2 is connected to play1_out7 (*)

       . . TI3_RMP can be one of the following values
       LL_TIM_TIM20_TI3_GPIO:               tim20_ti3 is connected to TIM20_CH3
       LL_TIM_TIM20_TI3_PLAY1_OUT8:         tim20_ti3 is connected to play1_out8 (*)

       . . TI4_RMP can be one of the following values
       LL_TIM_TIM20_TI4_GPIO:               tim20_ti4 is connected to TIM20_CH4
       LL_TIM_TIM20_TI4_PLAY1_OUT9:         tim20_ti4 is connected to play1_out9 (*)

    (*)  Value not defined in all devices.
    (**) Timer instance not available on all devices.

void LL_TIM_IC_SetActiveInput ( TIM_TypeDef * timx , uint32_t channel , uint32_t ic_active_input )

Set the active input.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 CC1S LL_TIM_IC_SetActiveInput

CCMR1 CC2S LL_TIM_IC_SetActiveInput

CCMR2 CC3S LL_TIM_IC_SetActiveInput

CCMR2 CC4S LL_TIM_IC_SetActiveInput

Parameters :
uint32_t LL_TIM_IC_GetActiveInput ( const TIM_TypeDef * timx , uint32_t channel )

Get the current active input.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 CC1S LL_TIM_IC_GetActiveInput

CCMR1 CC2S LL_TIM_IC_GetActiveInput

CCMR2 CC3S LL_TIM_IC_GetActiveInput

CCMR2 CC4S LL_TIM_IC_GetActiveInput

Parameters :
Return values :

Returned – value can be one of the following values:

void LL_TIM_IC_SetPrescaler ( TIM_TypeDef * timx , uint32_t channel , uint32_t ic_prescaler )

Set the prescaler of input channel.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 IC1PSC LL_TIM_IC_SetPrescaler

CCMR1 IC2PSC LL_TIM_IC_SetPrescaler

CCMR2 IC3PSC LL_TIM_IC_SetPrescaler

CCMR2 IC4PSC LL_TIM_IC_SetPrescaler

Parameters :
uint32_t LL_TIM_IC_GetPrescaler ( const TIM_TypeDef * timx , uint32_t channel )

Get the current prescaler value acting on an input channel.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 IC1PSC LL_TIM_IC_GetPrescaler

CCMR1 IC2PSC LL_TIM_IC_GetPrescaler

CCMR2 IC3PSC LL_TIM_IC_GetPrescaler

CCMR2 IC4PSC LL_TIM_IC_GetPrescaler

Parameters :
Return values :

Returned – value can be one of the following values:

void LL_TIM_IC_SetFilter ( TIM_TypeDef * timx , uint32_t channel , uint32_t ic_filter )

Set the input filter duration.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 IC1F LL_TIM_IC_SetFilter

CCMR1 IC2F LL_TIM_IC_SetFilter

CCMR2 IC3F LL_TIM_IC_SetFilter

CCMR2 IC4F LL_TIM_IC_SetFilter

Parameters :
uint32_t LL_TIM_IC_GetFilter ( const TIM_TypeDef * timx , uint32_t channel )

Get the input filter duration.

Reference Manual to LL API cross reference (Register Field Functions)

CCMR1 IC1F LL_TIM_IC_GetFilter

CCMR1 IC2F LL_TIM_IC_GetFilter

CCMR2 IC3F LL_TIM_IC_GetFilter

CCMR2 IC4F LL_TIM_IC_GetFilter

Parameters :
Return values :

Returned – value can be one of the following values:

void LL_TIM_IC_SetPolarity ( TIM_TypeDef * timx , uint32_t channel , uint32_t ic_polarity )

Set the input channel polarity.

Reference Manual to LL API cross reference (Register Field Functions)

CCER CC1P LL_TIM_IC_SetPolarity

CCER CC1NP LL_TIM_IC_SetPolarity

CCER CC2P LL_TIM_IC_SetPolarity

CCER CC2NP LL_TIM_IC_SetPolarity

CCER CC3P LL_TIM_IC_SetPolarity

CCER CC3NP LL_TIM_IC_SetPolarity

CCER CC4P LL_TIM_IC_SetPolarity

CCER CC4NP LL_TIM_IC_SetPolarity

Parameters :
uint32_t LL_TIM_IC_GetPolarity ( const TIM_TypeDef * timx , uint32_t channel )

Get the current input channel polarity.

Reference Manual to LL API cross reference (Register Field Functions)

CCER CC1P LL_TIM_IC_GetPolarity

CCER CC1NP LL_TIM_IC_GetPolarity

CCER CC2P LL_TIM_IC_GetPolarity

CCER CC2NP LL_TIM_IC_GetPolarity

CCER CC3P LL_TIM_IC_GetPolarity

CCER CC3NP LL_TIM_IC_GetPolarity

CCER CC4P LL_TIM_IC_GetPolarity

CCER CC4NP LL_TIM_IC_GetPolarity

Parameters :
Return values :

Returned – value can be one of the following values:

void LL_TIM_IC_SetXORGatePosition ( TIM_TypeDef * timx , uint32_t xor_position )

Set the XOR gate position.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 XORPS LL_TIM_IC_SetXORGatePosition

Note

Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not a timer instance provides a XOR input.

Note

Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not a timer instance has at least 3 channels.

Parameters :
uint32_t LL_TIM_IC_GetXORGatePosition ( TIM_TypeDef * timx )

Get the XOR gate position.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 XORPS LL_TIM_IC_SetXORGatePosition

Note

Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not a timer instance provides a XOR input.

Note

Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not a timer instance has at least 3 channels.

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_IC_EnableXORGateInputInversion ( TIM_TypeDef * timx , uint32_t channel )

Enable the signal inversion of a XOR gate input channel.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 TI1INV LL_TIM_IC_EnableXORGateInputInversion

CR2 TI2INV LL_TIM_IC_EnableXORGateInputInversion

CR2 TI3INV LL_TIM_IC_EnableXORGateInputInversion

Note

Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not a timer instance provides a XOR input.

Parameters :
void LL_TIM_IC_DisableXORGateInputInversion ( TIM_TypeDef * timx , uint32_t channel )

Disable the signal inversion of a XOR gate input channel.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 TI1INV LL_TIM_IC_DisableXORGateInputInversion

CR2 TI2INV LL_TIM_IC_DisableXORGateInputInversion

CR2 TI3INV LL_TIM_IC_DisableXORGateInputInversion

Note

Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not a timer instance provides a XOR input.

Parameters :
uint32_t LL_TIM_IC_IsEnabledXORGateInputInversion ( const TIM_TypeDef * timx , uint32_t channel )

Indicates whether the signal inversion of a XOR gate input channel is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 TI1INV LL_TIM_IC_IsEnabledXORGateInputInversion

CR2 TI2INV LL_TIM_IC_IsEnabledXORGateInputInversion

CR2 TI3INV LL_TIM_IC_IsEnabledXORGateInputInversion

Note

Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not a timer instance provides a XOR input.

Parameters :
Return values :

State – of bit (1 or 0).

void LL_TIM_IC_EnableXORCombination ( TIM_TypeDef * timx )

Connect the TIMx_CH1, CH2 and CH3 pins to the TI1 input (XOR combination).

Reference Manual to LL API cross reference (Register Field Functions)

CR2 TI1S LL_TIM_IC_EnableXORCombination

Note

Macro IS_TIM_XOR_INSTANCE(timx) can be used to check whether or not a timer instance provides an XOR input.

Parameters :

timx – Timer instance

void LL_TIM_IC_DisableXORCombination ( TIM_TypeDef * timx )

Disconnect the TIMx_CH1, CH2 and CH3 pins from the TI1 input.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 TI1S LL_TIM_IC_DisableXORCombination

Note

Macro IS_TIM_XOR_INSTANCE(timx) can be used to check whether or not a timer instance provides an XOR input.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IC_IsEnabledXORCombination ( const TIM_TypeDef * timx )

Indicates whether the TIMx_CH1, CH2 and CH3 pins are connectected to the TI1 input.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 TI1S LL_TIM_IC_IsEnabledXORCombination

Note

Macro IS_TIM_XOR_INSTANCE(timx) can be used to check whether or not a timer instance provides an XOR input.

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

uint32_t LL_TIM_IC_GetCaptureCH1 ( const TIM_TypeDef * timx )

Get captured value for input channel 1.

Reference Manual to LL API cross reference (Register Field Functions)

CCR1 CCR1 LL_TIM_IC_GetCaptureCH1

Note

In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

Macro IS_TIM_CC1_INSTANCE(timx) can be used to check whether or not input channel 1 is supported by a timer instance.

Note

If dithering is activated, pay attention to the returned value interpretation.

Parameters :

timx – Timer instance

Return values :

CapturedValue – (between Min_Data=0 and Max_Data=65535)

uint32_t LL_TIM_IC_GetCaptureCH2 ( const TIM_TypeDef * timx )

Get captured value for input channel 2.

Reference Manual to LL API cross reference (Register Field Functions)

CCR2 CCR2 LL_TIM_IC_GetCaptureCH2

Note

In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

Macro IS_TIM_CC2_INSTANCE(timx) can be used to check whether or not input channel 2 is supported by a timer instance.

Note

If dithering is activated, pay attention to the returned value interpretation.

Parameters :

timx – Timer instance

Return values :

CapturedValue – (between Min_Data=0 and Max_Data=65535)

uint32_t LL_TIM_IC_GetCaptureCH3 ( const TIM_TypeDef * timx )

Get captured value for input channel 3.

Reference Manual to LL API cross reference (Register Field Functions)

CCR3 CCR3 LL_TIM_IC_GetCaptureCH3

Note

In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

Macro IS_TIM_CC3_INSTANCE(timx) can be used to check whether or not input channel 3 is supported by a timer instance.

Note

If dithering is activated, pay attention to the returned value interpretation.

Parameters :

timx – Timer instance

Return values :

CapturedValue – (between Min_Data=0 and Max_Data=65535)

uint32_t LL_TIM_IC_GetCaptureCH4 ( const TIM_TypeDef * timx )

Get captured value for input channel 4.

Reference Manual to LL API cross reference (Register Field Functions)

CCR4 CCR4 LL_TIM_IC_GetCaptureCH4

Note

In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

Macro IS_TIM_CC4_INSTANCE(timx) can be used to check whether or not input channel 4 is supported by a timer instance.

Note

If dithering is activated, pay attention to the returned value interpretation.

Parameters :

timx – Timer instance

Return values :

CapturedValue – (between Min_Data=0 and Max_Data=65535)

uint32_t LL_TIM_IC_GetCapturedValue ( const TIM_TypeDef * timx , uint32_t channel )

Get captured value for the selected capture unit.

Reference Manual to LL API cross reference (Register Field Functions)

CCR1 CCR1 LL_TIM_IC_GetCapturedValue

CCR2 CCR2 LL_TIM_IC_GetCapturedValue

CCR3 CCR3 LL_TIM_IC_GetCapturedValue

CCR4 CCR4 LL_TIM_IC_GetCapturedValue

Note

In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.

Note

Macro IS_TIM_32B_COUNTER_INSTANCE(timx) can be used to check whether or not a timer instance supports a 32-bit counter.

Note

If dithering is activated, pay attention to the returned value interpretation.

Parameters :
Return values :

CapturedValue – (between Min_Data=0 and Max_Data=65535)

uint32_t LL_TIM_IC_GetInputStatus ( TIM_TypeDef * timx , uint32_t channel )

Indicate the level of input signals (after the digital filtering stage), for polling purposes.

Reference Manual to LL API cross reference (Register Field Functions)

SR TI1FS LL_TIM_IC_GetInputStatus

SR TI2FS LL_TIM_IC_GetInputStatus

SR TI3FS LL_TIM_IC_GetInputStatus

SR TI4FS LL_TIM_IC_GetInputStatus

Parameters :
Return values :

Returned – value can be one of the following values:

Functions

void LL_TIM_EnableExternalClock ( TIM_TypeDef * timx )

Enable external clock mode 2.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR ECE LL_TIM_EnableExternalClock

Note

When external clock mode 2 is enabled the counter is clocked by any active edge on the ETRF signal.

Note

Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(timx) can be used to check whether or not a timer instance supports external clock mode2.

Parameters :

timx – Timer instance

void LL_TIM_DisableExternalClock ( TIM_TypeDef * timx )

Disable external clock mode 2.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR ECE LL_TIM_DisableExternalClock

Note

Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(timx) can be used to check whether or not a timer instance supports external clock mode2.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledExternalClock ( const TIM_TypeDef * timx )

Indicate whether external clock mode 2 is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR ECE LL_TIM_IsEnabledExternalClock

Note

Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(timx) can be used to check whether or not a timer instance supports external clock mode2.

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_SetClockSource ( TIM_TypeDef * timx , uint32_t clock_source )

Set the clock source of the counter clock.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR SMS LL_TIM_SetClockSource

SMCR ECE LL_TIM_SetClockSource

Note

when selected clock source is external clock mode 1, the timer input the external clock is applied is selected by calling the LL_TIM_SetTriggerInput() function. This timer input must be configured by calling the LL_TIM_IC_Config() function.

Note

Macro IS_TIM_SLAVE_INSTANCE(timx) can be used to check whether or not a timer instance supports external clock mode1.

Note

Macro IS_TIM_ETR_INSTANCE(timx) can be used to check whether or not a timer instance supports external clock mode2.

Note

Macro IS_TIM_ENCODER_INTERFACE_INSTANCE(timx) can be used to check whether or not a timer instance supports the encoder mode.

Parameters :
uint32_t LL_TIM_GetClockSource ( const TIM_TypeDef * timx )

Get the clock source of the counter clock.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR SMS LL_TIM_GetClockSource

SMCR ECE LL_TIM_GetClockSource

Note

If external clock mode 1 and external clock mode 2 are enabled at the same time, the external clock input is tim_etrf.

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

Functions

void LL_TIM_SetTriggerOutput ( TIM_TypeDef * timx , uint32_t timer_synchronization )

Set the trigger output (TRGO) used for timer synchronization.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 MMS LL_TIM_SetTriggerOutput

Note

Macro IS_TIM_MASTER_INSTANCE(timx) can be used to check whether or not a timer instance can operate as a master timer.

Parameters :
uint32_t LL_TIM_GetTriggerOutput ( const TIM_TypeDef * timx )

Get the source of the trigger output (TRGO).

Reference Manual to LL API cross reference (Register Field Functions)

CR2 MMS LL_TIM_GetTriggerOutput

Note

Macro IS_TIM_MASTER_INSTANCE(timx) can be used to check whether or not a timer instance can operate as a master timer.

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_SetTriggerOutput2 ( TIM_TypeDef * timx , uint32_t adc_synchronization )

Set the trigger output 2 (TRGO2) used for ADC synchronization .

Reference Manual to LL API cross reference (Register Field Functions)

CR2 MMS2 LL_TIM_SetTriggerOutput2

Note

Macro IS_TIM_TRGO2_INSTANCE(timx) can be used to check whether or not a timer instance can be used for ADC synchronization.

Parameters :
uint32_t LL_TIM_GetTriggerOutput2 ( const TIM_TypeDef * timx )

Get the source of the trigger output 2 (TRGO2).

Reference Manual to LL API cross reference (Register Field Functions)

CR2 MMS2 LL_TIM_GetTriggerOutput2

Note

Macro IS_TIM_TRGO2_INSTANCE(timx) can be used to check whether or not a timer instance can be used for ADC synchronization.

Parameters :

timx – Timer Instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_SetTriggerOutput2Postscaler ( TIM_TypeDef * timx , uint32_t postscaler )

Set the trigger output 2 (TRGO2) post-scaler value.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 TGO2PSC LL_TIM_SetTriggerOutput2Postscaler

Note

The TRGO2 clock frequency tgo2_cktim is equal to tim_ocxrefc / (TGO2PSC[4:0] + 1).

Note

The post-scaler can be changed on the fly as this control register is buffered. The new post-scaler ratio is taken into account at the next update event.

Parameters :

  • timx – Timer instance

  • postscaler – (between Min_Data=0 and Max_Data=31)

uint32_t LL_TIM_GetTriggerOutput2Postscaler ( const TIM_TypeDef * timx )

Get the trigger output 2 (TRGO2) post-scaler value.

Reference Manual to LL API cross reference (Register Field Functions)

CR1 TGO2PSC LL_TIM_GetTriggerOutput2Postscaler

Parameters :

timx – Timer instance

Return values :

postscaler – (between Min_Data=0 and Max_Data=31)

void LL_TIM_SetSlaveMode ( TIM_TypeDef * timx , uint32_t slave_mode )

Set the synchronization mode of a slave timer.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR SMS LL_TIM_SetSlaveMode

Note

Macro IS_TIM_SLAVE_INSTANCE(timx) can be used to check whether or not a timer instance can operate as a slave timer.

Parameters :
uint32_t LL_TIM_GetSlaveMode ( const TIM_TypeDef * timx )

Get the synchronization mode of a slave timer.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR SMS LL_TIM_GetSlaveMode

Note

Macro IS_TIM_SLAVE_INSTANCE(timx) can be used to check whether or not a timer instance can operate as a slave timer.

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_SetTriggerInput ( TIM_TypeDef * timx , uint32_t trigger_input )

Set the selects the trigger input to be used to synchronize the counter.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR TS LL_TIM_SetTriggerInput

Note

Macro IS_TIM_SLAVE_INSTANCE(timx) can be used to check whether or not a timer instance can operate as a slave timer.

Parameters :

  • timx – Timer instance

  • trigger_input – This parameter can be one of the following values: LL_TIM_TS_ITR0 LL_TIM_TS_ITR1 LL_TIM_TS_ITR2 LL_TIM_TS_ITR6 LL_TIM_TS_ITR7 LL_TIM_TS_ITR8 LL_TIM_TS_ITR9 #if TIM20 LL_TIM_TS_ITR12 LL_TIM_TS_ITR13 LL_TIM_TS_TI1F_ED LL_TIM_TS_TI1FP1 LL_TIM_TS_TI2FP2 LL_TIM_TS_ETRF

uint32_t LL_TIM_GetTriggerInput ( const TIM_TypeDef * timx )

Get the trigger input used to synchronize the counter.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR TS LL_TIM_GetTriggerInput

Note

Macro IS_TIM_SLAVE_INSTANCE(timx) can be used to check whether or not a timer instance can operate as a slave timer.

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values: LL_TIM_TS_ITR0 LL_TIM_TS_ITR1 LL_TIM_TS_ITR2 LL_TIM_TS_ITR6 LL_TIM_TS_ITR7 LL_TIM_TS_ITR8 LL_TIM_TS_ITR9 #if TIM20 LL_TIM_TS_ITR12 LL_TIM_TS_ITR13 LL_TIM_TS_TI1F_ED LL_TIM_TS_TI1FP1 LL_TIM_TS_TI2FP2 LL_TIM_TS_ETRF

void LL_TIM_EnableMasterSlaveMode ( TIM_TypeDef * timx )

Enable the Master/Slave mode.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR MSM LL_TIM_EnableMasterSlaveMode

Note

Macro IS_TIM_SLAVE_INSTANCE(timx) can be used to check whether or not a timer instance can operate as a slave timer.

Parameters :

timx – Timer instance

void LL_TIM_DisableMasterSlaveMode ( TIM_TypeDef * timx )

Disable the Master/Slave mode.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR MSM LL_TIM_DisableMasterSlaveMode

Note

Macro IS_TIM_SLAVE_INSTANCE(timx) can be used to check whether or not a timer instance can operate as a slave timer.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledMasterSlaveMode ( const TIM_TypeDef * timx )

Indicates whether the Master/Slave mode is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR MSM LL_TIM_IsEnabledMasterSlaveMode

Note

Macro IS_TIM_SLAVE_INSTANCE(timx) can be used to check whether or not a timer instance can operate as a slave timer.

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ConfigETR ( TIM_TypeDef * timx , uint32_t etr_polarity , uint32_t etr_prescaler , uint32_t etr_filter )

Configure the external trigger (ETR) input.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR ETP LL_TIM_ConfigETR

SMCR ETPS LL_TIM_ConfigETR

SMCR SETPS LL_TIM_ConfigETR

SMCR ETF LL_TIM_ConfigETR

Note

Macro IS_TIM_ETR_INSTANCE(timx) can be used to check whether or not a timer instance provides an external trigger input.

Parameters :
void LL_TIM_GetConfigETR ( TIM_TypeDef * timx , uint32_t * p_etr_polarity , uint32_t * p_etr_prescaler , uint32_t * p_etr_filter )

Get the external trigger (ETR) input configuration.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR ETP LL_TIM_GetConfigETR

SMCR ETPS LL_TIM_GetConfigETR

SMCR SETPS LL_TIM_GetConfigETR

SMCR ETF LL_TIM_GetConfigETR

Note

Macro IS_TIM_ETR_INSTANCE(timx) can be used to check whether or not a timer instance provides an external trigger input.

Parameters :
void LL_TIM_SetETRSource ( TIM_TypeDef * timx , uint32_t etr_source )

Select the external trigger (ETR) input source.

Reference Manual to LL API cross reference (Register Field Functions)

AF1 ETRSEL LL_TIM_SetETRSource

Note

Macro IS_TIM_ETRSEL_INSTANCE(timx) can be used to check whether or not a timer instance supports ETR source selection.

Parameters :

  • timx – Timer instance

  • etr_source – This parameter can be one of the following values: 

        TIM1: one of the following values:
       LL_TIM_TIM1_ETR_IN_GPIO:              tim1_etr_in is connected to TIM1_ETR
       LL_TIM_TIM1_ETR_IN_COMP1_OUT:         tim1_etr_in is connected to comp1_out
       LL_TIM_TIM1_ETR_IN_COMP2_OUT:         tim1_etr_in is connected to comp2_out (*)
       LL_TIM_TIM1_ETR_IN_ADC1_AWD1:         tim1_etr_in is connected to adc1_awd1
       LL_TIM_TIM1_ETR_IN_ADC1_AWD2:         tim1_etr_in is connected to adc1_awd2
       LL_TIM_TIM1_ETR_IN_ADC1_AWD3:         tim1_etr_in is connected to adc1_awd3
       LL_TIM_TIM1_ETR_IN_COMP3_OUT:         tim1_etr_in is connected to comp3_out (*)
       LL_TIM_TIM1_ETR_IN_COMP4_OUT:         tim1_etr_in is connected to comp4_out (*)
       LL_TIM_TIM1_ETR_IN_PLAY1_OUT6:        tim1_etr_in is connected to play1_out6 (*)
       LL_TIM_TIM1_ETR_IN_PLAY1_OUT8:        tim1_etr_in is connected to play1_out8 (*)

    TIM2: one of the following values:
       LL_TIM_TIM2_ETR_IN_GPIO:              tim2_etr_in is connected to TIM2_ETR
       LL_TIM_TIM2_ETR_IN_COMP1_OUT:         tim2_etr_in is connected to comp1_out
       LL_TIM_TIM2_ETR_IN_COMP2_OUT:         tim2_etr_in is connected to comp2_out (*)
       LL_TIM_TIM2_ETR_IN_ADC1_AWD1:         tim2_etr_in is connected to adc1_awd1
       LL_TIM_TIM2_ETR_IN_ADC1_AWD2:         tim2_etr_in is connected to adc1_awd2
       LL_TIM_TIM2_ETR_IN_ADC1_AWD3:         tim2_etr_in is connected to adc1_awd3
       LL_TIM_TIM2_ETR_IN_LSE:               tim2_etr_in is connected to LSE
       LL_TIM_TIM2_ETR_IN_MCO1:              tim2_etr_in is connected to MCO1
       LL_TIM_TIM2_ETR_IN_TIM3_ETR:          tim2_etr_in is connected to TIM3_ETR (*)
       LL_TIM_TIM2_ETR_IN_TIM4_ETR:          tim2_etr_in is connected to TIM4_ETR (*)
       LL_TIM_TIM2_ETR_IN_TIM5_ETR:          tim2_etr_in is connected to TIM5_ETR (*)
       LL_TIM_TIM2_ETR_IN_ETH1_PTP_PPS_OUT:  tim2_etr_in is connected to eth1_ptp_pps_out (*)
       LL_TIM_TIM2_ETR_IN_COMP3_OUT:         tim2_etr_in is connected to comp3_out (*)
       LL_TIM_TIM2_ETR_IN_COMP4_OUT:         tim2_etr_in is connected to comp4_out (*)
       LL_TIM_TIM2_ETR_IN_PLAY1_OUT4:        tim2_etr_in is connected to play1_out4 (*)
       LL_TIM_TIM2_ETR_IN_PLAY1_OUT2:        tim2_etr_in is connected to play1_out2 (*)

    TIM3: one of the following values: (**)
       LL_TIM_TIM3_ETR_IN_GPIO:              tim3_etr_in is connected to TIM3_ETR
       LL_TIM_TIM3_ETR_IN_COMP1_OUT:         tim3_etr_in is connected to comp1_out
       LL_TIM_TIM3_ETR_IN_ADC2_AWD1:         tim3_etr_in is connected to adc2_awd1 (*)
       LL_TIM_TIM3_ETR_IN_ADC2_AWD2:         tim3_etr_in is connected to adc2_awd2 (*)
       LL_TIM_TIM3_ETR_IN_ADC2_AWD3:         tim3_etr_in is connected to adc2_awd3 (*)
       LL_TIM_TIM3_ETR_IN_TIM2_ETR:          tim3_etr_in is connected to TIM2_ETR
       LL_TIM_TIM3_ETR_IN_TIM4_ETR:          tim3_etr_in is connected to TIM4_ETR
       LL_TIM_TIM3_ETR_IN_TIM5_ETR:          tim3_etr_in is connected to TIM5_ETR
       LL_TIM_TIM3_ETR_IN_ETH1_PTP_PPS_OUT:  tim3_etr_in is connected to eth1_ptp_pps_out (*)
       LL_TIM_TIM3_ETR_IN_COMP2_OUT:         tim3_etr_in is connected to comp2_out (*)
       LL_TIM_TIM3_ETR_IN_COMP3_OUT:         tim3_etr_in is connected to comp3_out (*)
       LL_TIM_TIM3_ETR_IN_COMP4_OUT:         tim3_etr_in is connected to comp4_out (*)
       LL_TIM_TIM3_ETR_IN_PLAY1_OUT4:        tim3_etr_in is connected to play1_out4 (*)
       LL_TIM_TIM3_ETR_IN_PLAY1_OUT13:       tim3_etr_in is connected to play1_out13 (*)

    TIM4: one of the following values: (**)
       LL_TIM_TIM4_ETR_IN_GPIO:              tim4_etr_in is connected to TIM4_ETR
       LL_TIM_TIM4_ETR_IN_COMP1_OUT:         tim4_etr_in is connected to comp1_out
       LL_TIM_TIM4_ETR_IN_ADC3_AWD1:         tim4_etr_in is connected to adc3_awd1
       LL_TIM_TIM4_ETR_IN_ADC3_AWD2:         tim4_etr_in is connected to adc3_awd2
       LL_TIM_TIM4_ETR_IN_ADC3_AWD3:         tim4_etr_in is connected to adc3_awd3
       LL_TIM_TIM4_ETR_IN_TIM2_ETR:          tim4_etr_in is connected to TIM2_ETR
       LL_TIM_TIM4_ETR_IN_TIM3_ETR:          tim4_etr_in is connected to TIM3_ETR
       LL_TIM_TIM4_ETR_IN_TIM5_ETR:          tim4_etr_in is connected to TIM5_ETR

    TIM5: one of the following values: (**)
       LL_TIM_TIM5_ETR_IN_GPIO:              tim5_etr_in is connected to TIM5_ETR
       LL_TIM_TIM5_ETR_IN_COMP1_OUT:         tim5_etr_in is connected to comp1_out
       LL_TIM_TIM5_ETR_IN_ADC3_AWD1:         tim5_etr_in is connected to adc3_awd1 (*)
       LL_TIM_TIM5_ETR_IN_ADC3_AWD2:         tim5_etr_in is connected to adc3_awd2 (*)
       LL_TIM_TIM5_ETR_IN_ADC3_AWD3:         tim5_etr_in is connected to adc3_awd3 (*)
       LL_TIM_TIM5_ETR_IN_TIM2_ETR:          tim5_etr_in is connected to TIM2_ETR
       LL_TIM_TIM5_ETR_IN_TIM3_ETR:          tim5_etr_in is connected to TIM3_ETR (*)
       LL_TIM_TIM5_ETR_IN_TIM4_ETR:          tim5_etr_in is connected to TIM4_ETR (*)
       LL_TIM_TIM5_ETR_IN_COMP2_OUT:         tim5_etr_in is connected to comp2_out (*)
       LL_TIM_TIM5_ETR_IN_COMP3_OUT:         tim5_etr_in is connected to comp3_out (*)
       LL_TIM_TIM5_ETR_IN_COMP4_OUT:         tim5_etr_in is connected to comp4_out (*)

    TIM8: one of the following values:
       LL_TIM_TIM8_ETR_IN_GPIO:              tim8_etr_in is connected to TIM8_ETR
       LL_TIM_TIM8_ETR_IN_COMP1_OUT:         tim8_etr_in is connected to comp1_out
       LL_TIM_TIM8_ETR_IN_COMP2_OUT:         tim8_etr_in is connected to comp2_out (*)
       LL_TIM_TIM8_ETR_IN_ADC1_AWD1:         tim8_etr_in is connected to adc1_awd1 (*)
       LL_TIM_TIM8_ETR_IN_ADC1_AWD2:         tim8_etr_in is connected to adc1_awd2 (*)
       LL_TIM_TIM8_ETR_IN_ADC1_AWD3:         tim8_etr_in is connected to adc1_awd3 (*)
       LL_TIM_TIM8_ETR_IN_ADC2_AWD1:         tim8_etr_in is connected to adc2_awd1 (*)
       LL_TIM_TIM8_ETR_IN_ADC2_AWD2:         tim8_etr_in is connected to adc2_awd2 (*)
       LL_TIM_TIM8_ETR_IN_ADC2_AWD3:         tim8_etr_in is connected to adc2_awd3 (*)
       LL_TIM_TIM8_ETR_IN_ADC3_AWD1:         tim8_etr_in is connected to adc3_awd1 (*)
       LL_TIM_TIM8_ETR_IN_ADC3_AWD2:         tim8_etr_in is connected to adc3_awd2 (*)
       LL_TIM_TIM8_ETR_IN_ADC3_AWD3:         tim8_etr_in is connected to adc3_awd3 (*)
       LL_TIM_TIM8_ETR_IN_COMP3_OUT:         tim8_etr_in is connected to comp3_out (*)
       LL_TIM_TIM8_ETR_IN_COMP4_OUT:         tim8_etr_in is connected to comp4_out (*)
       LL_TIM_TIM8_ETR_IN_PLAY1_OUT6:        tim8_etr_in is connected to play1_out6 (*)
       LL_TIM_TIM8_ETR_IN_PLAY1_OUT10:       tim8_etr_in is connected to play1_out10 (*)

    TIM20: one of the following values: (**)
       LL_TIM_TIM20_ETR_IN_GPIO:             tim20_etr_in is connected to TIM20_ETR
       LL_TIM_TIM20_ETR_IN_COMP1_OUT:        tim20_etr_in is connected to comp1_out
       LL_TIM_TIM20_ETR_IN_ADC3_AWD1:        tim20_etr_in is connected to adc3_awd1 (*)
       LL_TIM_TIM20_ETR_IN_ADC3_AWD2:        tim20_etr_in is connected to adc3_awd2 (*)
       LL_TIM_TIM20_ETR_IN_ADC3_AWD3:        tim20_etr_in is connected to adc3_awd3 (*)
       LL_TIM_TIM20_ETR_IN_COMP2_OUT:        tim20_etr_in is connected to comp2_out (*)
       LL_TIM_TIM20_ETR_IN_COMP3_OUT:        tim20_etr_in is connected to comp3_out (*)
       LL_TIM_TIM20_ETR_IN_COMP4_OUT:        tim20_etr_in is connected to comp4_out (*)
       LL_TIM_TIM20_ETR_IN_PLAY1_OUT6:       tim20_etr_in is connected to play1_out6 (*)
       LL_TIM_TIM20_ETR_IN_PLAY1_OUT14:      tim20_etr_in is connected to play1_out14 (*)

    (*) Value not defined in all devices.
    (**) Timer instance not available on all devices.

uint32_t LL_TIM_GetETRSource ( const TIM_TypeDef * timx )

Get the source of the external trigger input (ETR).

Reference Manual to LL API cross reference (Register Field Functions)

AF1 ETRSEL LL_TIM_GetETRSource

Note

Macro IS_TIM_ETRSEL_INSTANCE(timx) can be used to check whether or not a timer instance supports ETR source selection.

Parameters :

timx – Timer instance

Return values :

ETR – source that can be one of the following values: 

    TIM1: one of the following values:
       LL_TIM_TIM1_ETR_IN_GPIO:              tim1_etr_in is connected to TIM1_ETR
       LL_TIM_TIM1_ETR_IN_COMP1_OUT:         tim1_etr_in is connected to comp1_out
       LL_TIM_TIM1_ETR_IN_COMP2_OUT:         tim1_etr_in is connected to comp2_out (*)
       LL_TIM_TIM1_ETR_IN_ADC1_AWD1:         tim1_etr_in is connected to adc1_awd1
       LL_TIM_TIM1_ETR_IN_ADC1_AWD2:         tim1_etr_in is connected to adc1_awd2
       LL_TIM_TIM1_ETR_IN_ADC1_AWD3:         tim1_etr_in is connected to adc1_awd3
       LL_TIM_TIM1_ETR_IN_COMP3_OUT:         tim1_etr_in is connected to comp3_out (*)
       LL_TIM_TIM1_ETR_IN_COMP4_OUT:         tim1_etr_in is connected to comp4_out (*)
       LL_TIM_TIM1_ETR_IN_PLAY1_OUT6:        tim1_etr_in is connected to play1_out6 (*)
       LL_TIM_TIM1_ETR_IN_PLAY1_OUT8:        tim1_etr_in is connected to play1_out8 (*)

    TIM2: one of the following values:
       LL_TIM_TIM2_ETR_IN_GPIO:              tim2_etr_in is connected to TIM2_ETR
       LL_TIM_TIM2_ETR_IN_COMP1_OUT:         tim2_etr_in is connected to comp1_out
       LL_TIM_TIM2_ETR_IN_COMP2_OUT:         tim2_etr_in is connected to comp2_out (*)
       LL_TIM_TIM2_ETR_IN_ADC1_AWD1:         tim2_etr_in is connected to adc1_awd1
       LL_TIM_TIM2_ETR_IN_ADC1_AWD2:         tim2_etr_in is connected to adc1_awd2
       LL_TIM_TIM2_ETR_IN_ADC1_AWD3:         tim2_etr_in is connected to adc1_awd3
       LL_TIM_TIM2_ETR_IN_LSE:               tim2_etr_in is connected to LSE
       LL_TIM_TIM2_ETR_IN_MCO1:              tim2_etr_in is connected to MCO1
       LL_TIM_TIM2_ETR_IN_TIM3_ETR:          tim2_etr_in is connected to TIM3_ETR (*)
       LL_TIM_TIM2_ETR_IN_TIM4_ETR:          tim2_etr_in is connected to TIM4_ETR (*)
       LL_TIM_TIM2_ETR_IN_TIM5_ETR:          tim2_etr_in is connected to TIM5_ETR (*)
       LL_TIM_TIM2_ETR_IN_ETH1_PTP_PPS_OUT:  tim2_etr_in is connected to eth1_ptp_pps_out (*)
       LL_TIM_TIM2_ETR_IN_COMP3_OUT:         tim2_etr_in is connected to comp3_out (*)
       LL_TIM_TIM2_ETR_IN_COMP4_OUT:         tim2_etr_in is connected to comp4_out (*)
       LL_TIM_TIM2_ETR_IN_PLAY1_OUT4:        tim2_etr_in is connected to play1_out4 (*)
       LL_TIM_TIM2_ETR_IN_PLAY1_OUT2:        tim2_etr_in is connected to play1_out2 (*)

    TIM3: one of the following values: (**)
       LL_TIM_TIM3_ETR_IN_GPIO:              tim3_etr_in is connected to TIM3_ETR
       LL_TIM_TIM3_ETR_IN_COMP1_OUT:         tim3_etr_in is connected to comp1_out
       LL_TIM_TIM3_ETR_IN_ADC2_AWD1:         tim3_etr_in is connected to adc2_awd1 (*)
       LL_TIM_TIM3_ETR_IN_ADC2_AWD2:         tim3_etr_in is connected to adc2_awd2 (*)
       LL_TIM_TIM3_ETR_IN_ADC2_AWD3:         tim3_etr_in is connected to adc2_awd3 (*)
       LL_TIM_TIM3_ETR_IN_TIM2_ETR:          tim3_etr_in is connected to TIM2_ETR
       LL_TIM_TIM3_ETR_IN_TIM4_ETR:          tim3_etr_in is connected to TIM4_ETR
       LL_TIM_TIM3_ETR_IN_TIM5_ETR:          tim3_etr_in is connected to TIM5_ETR
       LL_TIM_TIM3_ETR_IN_ETH1_PTP_PPS_OUT:  tim3_etr_in is connected to eth1_ptp_pps_out (*)
       LL_TIM_TIM3_ETR_IN_COMP2_OUT:         tim3_etr_in is connected to comp2_out (*)
       LL_TIM_TIM3_ETR_IN_COMP3_OUT:         tim3_etr_in is connected to comp3_out (*)
       LL_TIM_TIM3_ETR_IN_COMP4_OUT:         tim3_etr_in is connected to comp4_out (*)
       LL_TIM_TIM3_ETR_IN_PLAY1_OUT4:        tim3_etr_in is connected to play1_out4 (*)
       LL_TIM_TIM3_ETR_IN_PLAY1_OUT13:       tim3_etr_in is connected to play1_out13 (*)

    TIM4: one of the following values: (**)
       LL_TIM_TIM4_ETR_IN_GPIO:              tim4_etr_in is connected to TIM4_ETR
       LL_TIM_TIM4_ETR_IN_COMP1_OUT:         tim4_etr_in is connected to comp1_out
       LL_TIM_TIM4_ETR_IN_ADC3_AWD1:         tim4_etr_in is connected to adc3_awd1
       LL_TIM_TIM4_ETR_IN_ADC3_AWD2:         tim4_etr_in is connected to adc3_awd2
       LL_TIM_TIM4_ETR_IN_ADC3_AWD3:         tim4_etr_in is connected to adc3_awd3
       LL_TIM_TIM4_ETR_IN_TIM2_ETR:          tim4_etr_in is connected to TIM2_ETR
       LL_TIM_TIM4_ETR_IN_TIM3_ETR:          tim4_etr_in is connected to TIM3_ETR
       LL_TIM_TIM4_ETR_IN_TIM5_ETR:          tim4_etr_in is connected to TIM5_ETR

    TIM5: one of the following values: (**)
       LL_TIM_TIM5_ETR_IN_GPIO:              tim5_etr_in is connected to TIM5_ETR
       LL_TIM_TIM5_ETR_IN_COMP1_OUT:         tim5_etr_in is connected to comp1_out
       LL_TIM_TIM5_ETR_IN_ADC3_AWD1:         tim5_etr_in is connected to adc3_awd1 (*)
       LL_TIM_TIM5_ETR_IN_ADC3_AWD2:         tim5_etr_in is connected to adc3_awd2 (*)
       LL_TIM_TIM5_ETR_IN_ADC3_AWD3:         tim5_etr_in is connected to adc3_awd3 (*)
       LL_TIM_TIM5_ETR_IN_TIM2_ETR:          tim5_etr_in is connected to TIM2_ETR
       LL_TIM_TIM5_ETR_IN_TIM3_ETR:          tim5_etr_in is connected to TIM3_ETR (*)
       LL_TIM_TIM5_ETR_IN_TIM4_ETR:          tim5_etr_in is connected to TIM4_ETR (*)
       LL_TIM_TIM5_ETR_IN_COMP2_OUT:         tim5_etr_in is connected to comp2_out (*)
       LL_TIM_TIM5_ETR_IN_COMP3_OUT:         tim5_etr_in is connected to comp3_out (*)
       LL_TIM_TIM5_ETR_IN_COMP4_OUT:         tim5_etr_in is connected to comp4_out (*)

    TIM8: one of the following values:
       LL_TIM_TIM8_ETR_IN_GPIO:              tim8_etr_in is connected to TIM8_ETR
       LL_TIM_TIM8_ETR_IN_COMP1_OUT:         tim8_etr_in is connected to comp1_out
       LL_TIM_TIM8_ETR_IN_COMP2_OUT:         tim8_etr_in is connected to comp2_out (*)
       LL_TIM_TIM8_ETR_IN_ADC1_AWD1:         tim8_etr_in is connected to adc1_awd1 (*)
       LL_TIM_TIM8_ETR_IN_ADC1_AWD2:         tim8_etr_in is connected to adc1_awd2 (*)
       LL_TIM_TIM8_ETR_IN_ADC1_AWD3:         tim8_etr_in is connected to adc1_awd3 (*)
       LL_TIM_TIM8_ETR_IN_ADC2_AWD1:         tim8_etr_in is connected to adc2_awd1 (*)
       LL_TIM_TIM8_ETR_IN_ADC2_AWD2:         tim8_etr_in is connected to adc2_awd2 (*)
       LL_TIM_TIM8_ETR_IN_ADC2_AWD3:         tim8_etr_in is connected to adc2_awd3 (*)
       LL_TIM_TIM8_ETR_IN_ADC3_AWD1:         tim8_etr_in is connected to adc3_awd1 (*)
       LL_TIM_TIM8_ETR_IN_ADC3_AWD2:         tim8_etr_in is connected to adc3_awd2 (*)
       LL_TIM_TIM8_ETR_IN_ADC3_AWD3:         tim8_etr_in is connected to adc3_awd3 (*)
       LL_TIM_TIM8_ETR_IN_COMP3_OUT:         tim8_etr_in is connected to comp3_out (*)
       LL_TIM_TIM8_ETR_IN_COMP4_OUT:         tim8_etr_in is connected to comp4_out (*)
       LL_TIM_TIM8_ETR_IN_PLAY1_OUT6:        tim8_etr_in is connected to play1_out6 (*)
       LL_TIM_TIM8_ETR_IN_PLAY1_OUT10:       tim8_etr_in is connected to play1_out10 (*)

    TIM20: one of the following values: (**)
       LL_TIM_TIM20_ETR_IN_GPIO:             tim20_etr_in is connected to TIM20_ETR
       LL_TIM_TIM20_ETR_IN_COMP1_OUT:        tim20_etr_in is connected to comp1_out
       LL_TIM_TIM20_ETR_IN_ADC3_AWD1:        tim20_etr_in is connected to adc3_awd1 (*)
       LL_TIM_TIM20_ETR_IN_ADC3_AWD2:        tim20_etr_in is connected to adc3_awd2 (*)
       LL_TIM_TIM20_ETR_IN_ADC3_AWD3:        tim20_etr_in is connected to adc3_awd3 (*)
       LL_TIM_TIM20_ETR_IN_COMP2_OUT:        tim20_etr_in is connected to comp2_out (*)
       LL_TIM_TIM20_ETR_IN_COMP3_OUT:        tim20_etr_in is connected to comp3_out (*)
       LL_TIM_TIM20_ETR_IN_COMP4_OUT:        tim20_etr_in is connected to comp4_out (*)
       LL_TIM_TIM20_ETR_IN_PLAY1_OUT6:       tim20_etr_in is connected to play1_out6 (*)
       LL_TIM_TIM20_ETR_IN_PLAY1_OUT14:      tim20_etr_in is connected to play1_out14 (*)

    (*) Value not defined in all devices.
    (**) Timer instance not available on all devices.

void LL_TIM_EnableSMSPreload ( TIM_TypeDef * timx )

Enable SMS preload.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR SMSPE LL_TIM_EnableSMSPreload

Note

Macro IS_TIM_SMS_PRELOAD_INSTANCE(timx) can be used to check whether or not a timer instance supports the preload of SMS field in SMCR register.

Parameters :

timx – Timer instance

void LL_TIM_DisableSMSPreload ( TIM_TypeDef * timx )

Disable SMS preload.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR SMSPE LL_TIM_DisableSMSPreload

Note

Macro IS_TIM_SMS_PRELOAD_INSTANCE(timx) can be used to check whether or not a timer instance supports the preload of SMS field in SMCR register.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledSMSPreload ( const TIM_TypeDef * timx )

Indicate whether SMS preload is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR SMSPE LL_TIM_IsEnabledSMSPreload

Note

Macro IS_TIM_SMS_PRELOAD_INSTANCE(timx) can be used to check whether or not a timer instance supports the preload of SMS field in SMCR register.

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_SetSMSPreloadSource ( TIM_TypeDef * timx , uint32_t preload_source )

Set the preload source of SMS.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR SMSPS LL_TIM_SetSMSPreloadSource

Note

Macro IS_TIM_SMS_PRELOAD_INSTANCE(timx) can be used to check whether or not a timer instance supports the preload of SMS field in SMCR register.

Parameters :
uint32_t LL_TIM_GetSMSPreloadSource ( const TIM_TypeDef * timx )

Get the preload source of SMS.

Reference Manual to LL API cross reference (Register Field Functions)

SMCR SMSPS LL_TIM_GetSMSPreloadSource

Note

Macro IS_TIM_SMS_PRELOAD_INSTANCE(timx) can be used to check whether or not a timer instance supports the preload of SMS field in SMCR register.

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_EnableADCSynchronization ( TIM_TypeDef * timx )

Enable ADC synchronization.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 ADSYNC LL_TIM_EnableADCSynchronization

Note

Macro IS_TIM_MASTER_INSTANCE(timx) can be used to check whether or not a timer instance supports ADC synchronization.

Parameters :

timx – Timer instance

void LL_TIM_DisableADCSynchronization ( TIM_TypeDef * timx )

Enable ADC synchronization.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 ADSYNC LL_TIM_DisableADCSynchronization

Note

Macro IS_TIM_MASTER_INSTANCE(timx) can be used to check whether or not a timer instance supports ADC synchronization.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledADCSynchronization ( const TIM_TypeDef * timx )

Indicate whether ADC sycnhronization is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

CR2 ADSYNC LL_TIM_IsEnabledADCSynchronization

Note

Macro IS_TIM_MASTER_INSTANCE(timx) can be used to check whether or not a timer instance supports ADC synchronization.

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

Functions

void LL_TIM_EnableBRK ( TIM_TypeDef * timx )

Enable the break function.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKE LL_TIM_EnableBRK

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides a break input.

Parameters :

timx – Timer instance

void LL_TIM_DisableBRK ( TIM_TypeDef * timx )

Disable the break function.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKE LL_TIM_DisableBRK

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides a break input.

Parameters :

timx – Timer instance

void LL_TIM_ConfigBRK ( TIM_TypeDef * timx , uint32_t break_polarity , uint32_t break_filter , uint32_t break_afmode )

Configure the break input.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKP LL_TIM_ConfigBRK

BDTR BKF LL_TIM_ConfigBRK

BDTR BKBID LL_TIM_ConfigBRK

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides a break input.

Note

Bidirectional mode is only supported by advanced timer instances.

Note

In bidirectional mode (BKBID bit set), the Break input is configured both in input mode and in open drain output mode. Any active Break event will assert a low logic level on the Break input to indicate an internal break event to external devices.

Note

When bidirectional mode isn’t supported, break_afmode must be set to LL_TIM_BREAK_AFMODE_INPUT.

Parameters :
void LL_TIM_GetConfigBRK ( TIM_TypeDef * timx , uint32_t * p_break_polarity , uint32_t * p_break_filter , uint32_t * p_break_afmode )

Get the break input configuration.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKP LL_TIM_GetConfigBRK

BDTR BKF LL_TIM_GetConfigBRK

BDTR BKBID LL_TIM_GetConfigBRK

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides a break input.

Parameters :
void LL_TIM_DisarmBRK ( TIM_TypeDef * timx )

Disarm the break input (when it operates in bidirectional mode).

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKDSRM LL_TIM_DisarmBRK

Note

The break input can be disarmed only when it is configured in bidirectional mode and when when MOE is reset.

Note

Purpose is to be able to have the input voltage back to high-state, whatever the time constant on the output .

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsDisarmedBRK ( const TIM_TypeDef * timx )

Indicates whether the break input is disarmed.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKDSRM LL_TIM_IsDisarmedBRK

Parameters :

timx – Timer instance

Return values :

Status – of the break input (0: armed, 1: disarmed)

void LL_TIM_EnableBRK2 ( TIM_TypeDef * timx )

Enable the break 2 function.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BK2E LL_TIM_EnableBRK2

Note

Macro IS_TIM_BKIN2_INSTANCE(timx) can be used to check whether or not a timer instance provides a second break input.

Parameters :

timx – Timer instance

void LL_TIM_DisableBRK2 ( TIM_TypeDef * timx )

Disable the break 2 function.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BK2E LL_TIM_DisableBRK2

Note

Macro IS_TIM_BKIN2_INSTANCE(timx) can be used to check whether or not a timer instance provides a second break input.

Parameters :

timx – Timer instance

void LL_TIM_ConfigBRK2 ( TIM_TypeDef * timx , uint32_t break2_polarity , uint32_t break2_filter , uint32_t break2_afmode )

Configure the break 2 input.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BK2P LL_TIM_ConfigBRK2

BDTR BK2F LL_TIM_ConfigBRK2

BDTR BK2BID LL_TIM_ConfigBRK2

Note

Macro IS_TIM_BKIN2_INSTANCE(timx) can be used to check whether or not a timer instance provides a second break input.

Note

Bidirectional mode is only supported by advanced timer instances.

Note

In bidirectional mode (BK2BID bit set), the Break 2 input is configured both in input mode and in open drain output mode. Any active Break event will assert a low logic level on the Break 2 input to indicate an internal break event to external devices.

Note

When bidirectional mode isn’t supported, break2_afmode must be set to LL_TIM_BREAK2_AFMODE_INPUT.

Parameters :
void LL_TIM_GetConfigBRK2 ( TIM_TypeDef * timx , uint32_t * p_break2_polarity , uint32_t * p_break2_filter , uint32_t * p_break2_afmode )

Get the break 2 input configuration.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BK2P LL_TIM_GetConfigBRK2

BDTR BK2F LL_TIM_GetConfigBRK2

BDTR BK2BID LL_TIM_GetConfigBRK2

Note

Macro IS_TIM_BKIN2_INSTANCE(timx) can be used to check whether or not a timer instance provides a second break input.

Parameters :
void LL_TIM_DisarmBRK2 ( TIM_TypeDef * timx )

Disarm the break 2 input (when it operates in bidirectional mode).

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BK2DSRM LL_TIM_DisarmBRK2

Note

The break 2 input can be disarmed only when it is configured in bidirectional mode and when when MOE is reset.

Note

Purpose is to be able to have the input voltage back to high-state, whatever the time constant on the output.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsDisarmedBRK2 ( const TIM_TypeDef * timx )

Indicates whether the break input 2 is disarmed.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BK2DSRM LL_TIM_IsDisarmedBRK2

Parameters :

timx – Timer instance

Return values :

Status – of the break input 2 (0: armed, 1: disarmed)

void LL_TIM_DisarmBreakInput ( TIM_TypeDef * timx , uint32_t break_input )

Disarm the break input.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKDSRM LL_TIM_DisarmBreakInput

BDTR BK2DSRM LL_TIM_DisarmBreakInput

Note

The break input can be disarmed only when it is configured in bidirectional mode and when when MOE is reset.

Parameters :
uint32_t LL_TIM_IsDisarmedBreakInput ( const TIM_TypeDef * timx , uint32_t break_input )

Indicates whether the break input 2 is disarmed.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKDSRM LL_TIM_IsDisarmedBreakInput

BDTR BK2DSRM LL_TIM_IsDisarmedBreakInput

Parameters :
Return values :

Status – of the break input 2 (0: armed, 1: disarmed)

void LL_TIM_SetOffStates ( TIM_TypeDef * timx , uint32_t offstate_idle , uint32_t offstate_run )

Select the outputs off state (enabled v.s. disabled) in Idle and Run modes.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR OSSI LL_TIM_SetOffStates

BDTR OSSR LL_TIM_SetOffStates

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides a break input.

Parameters :
void LL_TIM_GetOffStates ( const TIM_TypeDef * timx , uint32_t * offstate_idle , uint32_t * offstate_run )

Get actual outputs off state (enabled v.s. disabled) in Idle and Run modes.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR OSSI LL_TIM_GetOffStates

BDTR OSSR LL_TIM_GetOffStates

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides a break input.

Parameters :
uint32_t LL_TIM_GetOutputDisableStatus ( const TIM_TypeDef * timx )

Indicate the global output state when a break or break2 event occurred, to discriminate the source.

Reference Manual to LL API cross reference (Register Field Functions)

SR ODS LL_TIM_GetOutputDisableStatus

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_EnableAutomaticOutput ( TIM_TypeDef * timx )

Enable automatic output (MOE can be set by software or automatically when a break input is active).

Reference Manual to LL API cross reference (Register Field Functions)

BDTR AOE LL_TIM_EnableAutomaticOutput

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides a break input.

Parameters :

timx – Timer instance

void LL_TIM_DisableAutomaticOutput ( TIM_TypeDef * timx )

Disable automatic output (MOE can be set only by software).

Reference Manual to LL API cross reference (Register Field Functions)

BDTR AOE LL_TIM_DisableAutomaticOutput

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides a break input.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledAutomaticOutput ( const TIM_TypeDef * timx )

Indicate whether automatic output is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR AOE LL_TIM_IsEnabledAutomaticOutput

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides a break input.

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableAllOutputs ( TIM_TypeDef * timx )

Enable the outputs (set the MOE bit in TIMx_BDTR register).

Reference Manual to LL API cross reference (Register Field Functions)

BDTR MOE LL_TIM_EnableAllOutputs

Note

The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by software and is reset in case of break or break2 event

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides a break input.

Parameters :

timx – Timer instance

void LL_TIM_DisableAllOutputs ( TIM_TypeDef * timx )

Disable the outputs (reset the MOE bit in TIMx_BDTR register).

Reference Manual to LL API cross reference (Register Field Functions)

BDTR MOE LL_TIM_DisableAllOutputs

Note

The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by software and is reset in case of break or break2 event.

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides a break input.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledAllOutputs ( const TIM_TypeDef * timx )

Indicates whether outputs are enabled.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR MOE LL_TIM_IsEnabledAllOutputs

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides a break input.

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableBreakInput ( TIM_TypeDef * timx , uint32_t break_input )

Enable a break input.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKE LL_TIM_EnableBreakInput

BDTR BK2E LL_TIM_EnableBreakInput

Note

Macro IS_TIM_BREAK_INSTANCE(timx) (IS_TIM_BKIN2_INSTANCE(timx)) can be used to check whether or not a timer instance provides a break input (resp. a break2 input).

Parameters :
void LL_TIM_DisableBreakInput ( TIM_TypeDef * timx , uint32_t break_input )

Disable a break input.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKE LL_TIM_DisableBreakInput

BDTR BK2E LL_TIM_DisableBreakInput

Note

Macro IS_TIM_BREAK_INSTANCE(timx) (IS_TIM_BKIN2_INSTANCE(timx)) can be used to check whether or not a timer instance provides a break input (resp. a break2 input).

Parameters :
uint32_t LL_TIM_IsEnabledBreakInput ( const TIM_TypeDef * timx , uint32_t break_input )

Indicates whether the input is enabled or not.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKE LL_TIM_IsEnabledBreakInput

BDTR BK2E LL_TIM_IsEnabledBreakInput

Note

Macro IS_TIM_BREAK_INSTANCE(timx) (IS_TIM_BKIN2_INSTANCE(timx)) can be used to check whether or not a timer instance provides a break input (resp. a break2 input).

Parameters :
void LL_TIM_SetBreakInputPolarity ( TIM_TypeDef * timx , uint32_t break_input , uint32_t break_polarity )

Set the polarity of a break input.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKP LL_TIM_SetBreakInputPolarity

BDTR BK2P LL_TIM_SetBreakInputPolarity

Parameters :
uint32_t LL_TIM_GetBreakInputPolarity ( const TIM_TypeDef * timx , uint32_t break_input )

Get the polarity of a break input.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKP LL_TIM_GetBreakInputPolarity

BDTR BK2P LL_TIM_GetBreakInputPolarity

Parameters :
Return values :

Returned – value can be one of the following values:

void LL_TIM_SetBreakInputFilter ( TIM_TypeDef * timx , uint32_t break_input , uint32_t break_filter )

Set the digital filter of a break input.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKF LL_TIM_SetBreakInputFilter

BDTR BK2F LL_TIM_SetBreakInputFilter

Parameters :
uint32_t LL_TIM_GetBreakInputFilter ( const TIM_TypeDef * timx , uint32_t break_input )

Get the digital filter of a break input.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKF LL_TIM_GetBreakInputFilter

BDTR BK2F LL_TIM_GetBreakInputFilter

Parameters :
Return values :

Returned – value can be one of the following values:

void LL_TIM_SetBreakInputAFMode ( TIM_TypeDef * timx , uint32_t break_input , uint32_t break_afmode )

Set the mode of a break input.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKBID LL_TIM_SetBreakInputAFMode

BDTR BK2BID LL_TIM_SetBreakInputAFMode

Parameters :
uint32_t LL_TIM_GetBreakInputAFMode ( const TIM_TypeDef * timx , uint32_t break_input )

Get the mode of a break input.

Reference Manual to LL API cross reference (Register Field Functions)

BDTR BKBID LL_TIM_SetBreakInputAFMode

BDTR BK2BID LL_TIM_SetBreakInputAFMode

Parameters :
Return values :

Returned – value can be one of the following values:

void LL_TIM_EnableBreakInputSource ( TIM_TypeDef * timx , uint32_t break_input , uint32_t source )

Enable the signals connected to the designated timer break input.

The description below summarizes specific “Timer Instance” and “BREAK(2) input source” parameter possibilities:

Reference Manual to LL API cross reference (Register Field Functions)

AF1 BKINE LL_TIM_EnableBreakInputSource

AF1 BKCMP1E LL_TIM_EnableBreakInputSource

AF1 BKCMP2E LL_TIM_EnableBreakInputSource

AF1 BKCMP3E LL_TIM_EnableBreakInputSource

AF1 BKCMP4E LL_TIM_EnableBreakInputSource

AF1 BKCMP5E LL_TIM_EnableBreakInputSource

AF1 BKCMP6E LL_TIM_EnableBreakInputSource

AF1 BKCMP8E LL_TIM_EnableBreakInputSource

AF1 BKCMP9E LL_TIM_EnableBreakInputSource

AF1 BKCMP10E LL_TIM_EnableBreakInputSource

AF1 BKCMP11E LL_TIM_EnableBreakInputSource

AF1 BKCMP13E LL_TIM_EnableBreakInputSource

AF1 BKCMP14E LL_TIM_EnableBreakInputSource

AF2 BK2INE LL_TIM_EnableBreakInputSource

AF2 BK2CMP1E LL_TIM_EnableBreakInputSource

AF2 BK2CMP2E LL_TIM_EnableBreakInputSource

AF2 BK2CMP3E LL_TIM_EnableBreakInputSource

AF2 BK2CMP4E LL_TIM_EnableBreakInputSource

AF2 BK2CMP5E LL_TIM_EnableBreakInputSource

AF2 BK2CMP6E LL_TIM_EnableBreakInputSource

AF2 BK2CMP7E LL_TIM_EnableBreakInputSource

AF2 BK2CMP13E LL_TIM_EnableBreakInputSource

AF2 BK2CMP14E LL_TIM_EnableBreakInputSource

TIM1: combination of the following values:

. . BREAK can be a combination of the following values LL_TIM_TIM1_BRK_GPIO LL_TIM_TIM1_BRK_COMP1_OUT LL_TIM_TIM1_BRK_TIM8_BKIN LL_TIM_TIM1_BRK_TIM15_BKIN 

    TIM8: combination of the following values:

       . . BREAK can be a combination of the following values
       LL_TIM_TIM8_BRK_GPIO
       LL_TIM_TIM8_BRK_COMP1_OUT
LL_TIM_TIM8_BRK_TIM1_BKIN LL_TIM_TIM8_BRK_TIM15_BKIN 

    TIM15: combination of the following values:

       . . BREAK can be a combination of the following values
       LL_TIM_TIM15_BRK_GPIO
       LL_TIM_TIM15_BRK_COMP1_OUT
LL_TIM_TIM15_BRK_TIM1_BKIN LL_TIM_TIM15_BRK_TIM8_BKIN 

    (*)  Value not defined in all devices.
    (**) Timer instance not available on all devices.
Parameters :

  • timx – Timer instance

  • break_input – This parameter can be one of the following values:

  • source – The break and break2 input source parameter depends on timx. Description is available only in the CHM version of the User Manual (not in the PDF).

void LL_TIM_DisableBreakInputSource ( TIM_TypeDef * timx , uint32_t break_input , uint32_t source )

Disable the signals connected to the designated timer break input.

The description below summarizes specific “Timer Instance” and “BREAK(2) input source” parameter possibilities:

Reference Manual to LL API cross reference (Register Field Functions)

AF1 BKINE LL_TIM_DisableBreakInputSource

AF1 BKCMP1E LL_TIM_DisableBreakInputSource

AF1 BKCMP2E LL_TIM_DisableBreakInputSource

AF1 BKCMP3E LL_TIM_DisableBreakInputSource

AF1 BKCMP4E LL_TIM_DisableBreakInputSource

AF1 BKCMP5E LL_TIM_DisableBreakInputSource

AF1 BKCMP6E LL_TIM_DisableBreakInputSource

AF1 BKCMP8E LL_TIM_DisableBreakInputSource

AF1 BKCMP9E LL_TIM_DisableBreakInputSource

AF1 BKCMP10E LL_TIM_DisableBreakInputSource

AF1 BKCMP11E LL_TIM_DisableBreakInputSource

AF1 BKCMP13E LL_TIM_DisableBreakInputSource

AF1 BKCMP14E LL_TIM_DisableBreakInputSource

AF2 BK2INE LL_TIM_DisableBreakInputSource

AF2 BK2CMP1E LL_TIM_DisableBreakInputSource

AF2 BK2CMP2E LL_TIM_DisableBreakInputSource

AF2 BK2CMP3E LL_TIM_DisableBreakInputSource

AF2 BK2CMP4E LL_TIM_DisableBreakInputSource

AF2 BK2CMP5E LL_TIM_DisableBreakInputSource

AF2 BK2CMP6E LL_TIM_DisableBreakInputSource

AF2 BK2CMP7E LL_TIM_DisableBreakInputSource

AF2 BK2CMP13E LL_TIM_DisableBreakInputSource

AF2 BK2CMP14E LL_TIM_DisableBreakInputSource

TIM1: combination of the following values:

. . BREAK can be a combination of the following values LL_TIM_TIM1_BRK_GPIO LL_TIM_TIM1_BRK_COMP1_OUT LL_TIM_TIM1_BRK_TIM8_BKIN LL_TIM_TIM1_BRK_TIM15_BKIN 

    TIM8: combination of the following values:

       . . BREAK can be a combination of the following values
       LL_TIM_TIM8_BRK_GPIO
       LL_TIM_TIM8_BRK_COMP1_OUT
LL_TIM_TIM8_BRK_TIM1_BKIN LL_TIM_TIM8_BRK_TIM15_BKIN 

    TIM15: combination of the following values:

       . . BREAK can be a combination of the following values
       LL_TIM_TIM15_BRK_GPIO
       LL_TIM_TIM15_BRK_COMP1_OUT
LL_TIM_TIM15_BRK_TIM1_BKIN LL_TIM_TIM15_BRK_TIM8_BKIN 

    (*)  Value not defined in all devices.
    (**) Timer instance not available on all devices.
Parameters :

  • timx – Timer instance

  • break_input – This parameter can be one of the following values:

  • source – The break and break2 input source parameter depends on timx. Description is available only in the CHM version of the User Manual (not in the PDF).

uint32_t LL_TIM_IsEnabledBreakInputSource ( const TIM_TypeDef * timx , uint32_t break_input , uint32_t source )

Indicates whether a break input source is enabled or not.

The description below summarizes specific “Timer Instance” and “BREAK(2) input source” parameter possibilities:

Reference Manual to LL API cross reference (Register Field Functions)

AF1 BKINE LL_TIM_IsEnabledBreakInputSource

AF1 BKCMP1E LL_TIM_IsEnabledBreakInputSource

AF1 BKCMP2E LL_TIM_IsEnabledBreakInputSource

AF1 BKCMP3E LL_TIM_IsEnabledBreakInputSource

AF1 BKCMP4E LL_TIM_IsEnabledBreakInputSource

AF1 BKCMP5E LL_TIM_IsEnabledBreakInputSource

AF1 BKCMP6E LL_TIM_IsEnabledBreakInputSource

AF1 BKCMP8E LL_TIM_IsEnabledBreakInputSource

AF1 BKCMP9E LL_TIM_IsEnabledBreakInputSource

AF1 BKCMP10E LL_TIM_IsEnabledBreakInputSource

AF1 BKCMP11E LL_TIM_IsEnabledBreakInputSource

AF1 BKCMP13E LL_TIM_IsEnabledBreakInputSource

AF1 BKCMP14E LL_TIM_IsEnabledBreakInputSource

AF2 BK2INE LL_TIM_IsEnabledBreakInputSource

AF2 BK2CMP1E LL_TIM_IsEnabledBreakInputSource

AF2 BK2CMP2E LL_TIM_IsEnabledBreakInputSource

AF2 BK2CMP3E LL_TIM_IsEnabledBreakInputSource

AF2 BK2CMP4E LL_TIM_IsEnabledBreakInputSource

AF2 BK2CMP5E LL_TIM_IsEnabledBreakInputSource

AF2 BK2CMP6E LL_TIM_IsEnabledBreakInputSource

AF2 BK2CMP7E LL_TIM_IsEnabledBreakInputSource

AF2 BK2CMP13E LL_TIM_IsEnabledBreakInputSource

AF2 BK2CMP14E LL_TIM_IsEnabledBreakInputSource

TIM1: combination of the following values:

. . BREAK can be a combination of the following values LL_TIM_TIM1_BRK_GPIO LL_TIM_TIM1_BRK_COMP1_OUT LL_TIM_TIM1_BRK_TIM8_BKIN LL_TIM_TIM1_BRK_TIM15_BKIN 

    TIM8: combination of the following values:

       . . BREAK can be a combination of the following values
       LL_TIM_TIM8_BRK_GPIO
       LL_TIM_TIM8_BRK_COMP1_OUT
LL_TIM_TIM8_BRK_TIM1_BKIN LL_TIM_TIM8_BRK_TIM15_BKIN 

    TIM15: combination of the following values:

       . . BREAK can be a combination of the following values
       LL_TIM_TIM15_BRK_GPIO
       LL_TIM_TIM15_BRK_COMP1_OUT
LL_TIM_TIM15_BRK_TIM1_BKIN LL_TIM_TIM15_BRK_TIM8_BKIN 

    (*)  Value not defined in all devices.
    (**) Timer instance not available on all devices.
Parameters :

  • timx – Timer instance

  • break_input – This parameter can be one of the following values:

  • source – The break and break2 input source parameter depends on timx. Description is available only in the CHM version of the User Manual (not in the PDF).

Return values :

State – of bit (1 or 0).

void LL_TIM_SetBreakInputSourcePolarity ( TIM_TypeDef * timx , uint32_t break_input , uint32_t source , uint32_t polarity )

Set the polarity of the break signal for the timer break input.

The description below summarizes specific “Timer Instance” and “BREAK(2) input source” parameter possibilities:

Reference Manual to LL API cross reference (Register Field Functions)

AF1 BKINP LL_TIM_SetBreakInputSourcePolarity

AF1 BKCMP1P LL_TIM_SetBreakInputSourcePolarity

AF1 BKCMP2P LL_TIM_SetBreakInputSourcePolarity

AF1 BKCMP3P LL_TIM_SetBreakInputSourcePolarity

AF1 BKCMP4P LL_TIM_SetBreakInputSourcePolarity

AF2 BK2INP LL_TIM_SetBreakInputSourcePolarity

AF2 BK2CMP1P LL_TIM_SetBreakInputSourcePolarity

AF2 BK2CMP2P LL_TIM_SetBreakInputSourcePolarity

AF2 BK2CMP3P LL_TIM_SetBreakInputSourcePolarity

AF2 BK2CMP4P LL_TIM_SetBreakInputSourcePolarity

TIM1: one of the following values:

. . BREAK can be one of the following values LL_TIM_TIM1_BRK_GPIO LL_TIM_TIM1_BRK_COMP1_OUT 

    TIM8: one of the following values:

       . . BREAK can be one of the following values
       LL_TIM_TIM8_BRK_GPIO
       LL_TIM_TIM8_BRK_COMP1_OUT

    TIM15: one of the following values:

       . . BREAK can be one of the following values
       LL_TIM_TIM15_BRK_GPIO
       LL_TIM_TIM15_BRK_COMP1_OUT


    (*)  Value not defined in all devices.
    (**) Timer instance not available on all devices.

Parameters :

  • timx – Timer instance

  • break_input – This parameter can be one of the following values:

  • source – The break and break2 input source parameter depends on timx. Description is available only in the CHM version of the User Manual (not in the PDF).

  • polarity – This parameter can be one of the following values: LL_TIM_BREAK_INPUT_SRC_NONINVERTED LL_TIM_BREAK_INPUT_SRC_INVERTED

uint32_t LL_TIM_GetBreakInputSourcePolarity ( const TIM_TypeDef * timx , uint32_t break_input , uint32_t source )

Get the polarity of the break signal for the timer break input.

The description below summarizes specific “Timer Instance” and “BREAK(2) input source” parameter possibilities:

Reference Manual to LL API cross reference (Register Field Functions)

AF1 BKINP LL_TIM_GetBreakInputSourcePolarity

AF1 BKCMP1P LL_TIM_GetBreakInputSourcePolarity

AF1 BKCMP2P LL_TIM_GetBreakInputSourcePolarity

AF1 BKCMP3P LL_TIM_GetBreakInputSourcePolarity

AF1 BKCMP4P LL_TIM_GetBreakInputSourcePolarity

AF2 BK2INP LL_TIM_GetBreakInputSourcePolarity

AF2 BK2CMP1P LL_TIM_GetBreakInputSourcePolarity

AF2 BK2CMP2P LL_TIM_GetBreakInputSourcePolarity

AF2 BK2CMP3P LL_TIM_GetBreakInputSourcePolarity

AF2 BK2CMP4P LL_TIM_GetBreakInputSourcePolarity

TIM1: one of the following values:

. . BREAK can be one of the following values LL_TIM_TIM1_BRK_GPIO LL_TIM_TIM1_BRK_COMP1_OUT 

    TIM8: one of the following values:

       . . BREAK can be one of the following values
       LL_TIM_TIM8_BRK_GPIO
       LL_TIM_TIM8_BRK_COMP1_OUT

    TIM15: one of the following values:

       . . BREAK can be one of the following values
       LL_TIM_TIM15_BRK_GPIO
       LL_TIM_TIM15_BRK_COMP1_OUT

    (*)  Value not defined in all devices.
    (**) Timer instance not available on all devices.
Parameters :

  • timx – Timer instance

  • break_input – This parameter can be one of the following values:

  • source – The break and break2 input source parameter depends on timx. Description is available only in the CHM version of the User Manual (not in the PDF).

Return values :

Returned – value can be one of the following values:

void LL_TIM_SetBreakDelay ( TIM_TypeDef * timx , uint32_t break_delay , uint32_t delay )

Set the delay duration for a specific break delay.

Reference Manual to LL API cross reference (Register Field Functions)

MPR2 DBK1 LL_TIM_SetBreakDelay

MPR2 DBK2 LL_TIM_SetBreakDelay

Note

The delay duration can be changed on the fly as this control register is buffered. The new value is taken into account at the next update event.

Parameters :

  • timx – Timer instance

  • break_delay – This parameter can be one of the following values:

  • delay – Delay duration (between Min_Data=0 and Max_Data=255)

uint32_t LL_TIM_GetBreakDelay ( const TIM_TypeDef * timx , uint32_t break_delay )

Get the delay duration for a specific break delay.

Reference Manual to LL API cross reference (Register Field Functions)

MPR2 DBK1 LL_TIM_GetBreakDelay

MPR2 DBK2 LL_TIM_GetBreakDelay

Parameters :
Return values :

Delay – duration (between Min_Data=0 and Max_Data=255)

void LL_TIM_EnableAsymmetricalDeadTime ( TIM_TypeDef * timx )

Enable asymmetrical deadtime.

Reference Manual to LL API cross reference (Register Field Functions)

DTR2 DTAE LL_TIM_EnableAsymmetricalDeadTime

Note

Macro IS_TIM_DEADTIME_ASYMMETRICAL_INSTANCE(timx) can be used to check whether or not a timer instance provides asymmetrical deadtime.

Parameters :

timx – Timer instance

void LL_TIM_DisableAsymmetricalDeadTime ( TIM_TypeDef * timx )

Disable asymmetrical dead-time.

Reference Manual to LL API cross reference (Register Field Functions)

DTR2 DTAE LL_TIM_DisableAsymmetricalDeadTime

Note

Macro IS_TIM_DEADTIME_ASYMMETRICAL_INSTANCE(timx) can be used to check whether or not a timer instance provides asymmetrical deadtime.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledAsymmetricalDeadTime ( const TIM_TypeDef * timx )

Indicates whether asymmetrical deadtime is activated.

Reference Manual to LL API cross reference (Register Field Functions)

DTR2 DTAE LL_TIM_IsEnabledAsymmetricalDeadTime

Note

Macro IS_TIM_DEADTIME_ASYMMETRICAL_INSTANCE(timx) can be used to check whether or not a timer instance provides asymmetrical deadtime.

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_SetFallingDeadTime ( TIM_TypeDef * timx , uint32_t deadtime )

Set the falling edge dead-time delay (delay inserted between the falling edge of the OCxREF signal and the rising edge of OCxN signals).

Reference Manual to LL API cross reference (Register Field Functions)

DTR2 DTGF LL_TIM_SetFallingDeadTime

Note

Macro IS_TIM_DEADTIME_ASYMMETRICAL_INSTANCE(timx) can be used to check whether or not asymmetrical dead-time insertion feature is supported by a timer instance.

Note

Helper macro LL_TIM_CALC_DEADTIME can be used to calculate the deadtime parameter

Note

This bit-field can not be modified as long as LOCK level 1, 2 or 3 has been programmed (LOCK bits in TIMx_BDTR register).

Parameters :

  • timx – Timer instance

  • deadtime – between Min_Data=0 and Max_Data=255

uint32_t LL_TIM_GetFallingDeadTime ( const TIM_TypeDef * timx )

Get the falling edge dead-time delay (delay inserted between the falling edge of the OCxREF signal and the rising edge of OCxN signals).

Reference Manual to LL API cross reference (Register Field Functions)

DTR2 DTGF LL_TIM_GetFallingDeadTime

Note

Macro IS_TIM_DEADTIME_ASYMMETRICAL_INSTANCE(timx) can be used to check whether or not asymmetrical dead-time insertion feature is supported by a timer instance.

Note

This bit-field can not be modified as long as LOCK level 1, 2 or 3 has been programmed (LOCK bits in TIMx_BDTR register).

Parameters :

timx – Timer instance

Return values :

Returned – value can be between Min_Data=0 and Max_Data=255.

void LL_TIM_EnableDeadTimePreload ( TIM_TypeDef * timx )

Enable deadtime preload.

Reference Manual to LL API cross reference (Register Field Functions)

DTR2 DTPE LL_TIM_EnableDeadTimePreload

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides deadtime preload.

Parameters :

timx – Timer instance

void LL_TIM_DisableDeadTimePreload ( TIM_TypeDef * timx )

Disable dead-time preload.

Reference Manual to LL API cross reference (Register Field Functions)

DTR2 DTPE LL_TIM_DisableDeadTimePreload

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides deadtime preload.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledDeadTimePreload ( const TIM_TypeDef * timx )

Indicates whether deadtime preload is activated.

Reference Manual to LL API cross reference (Register Field Functions)

DTR2 DTPE LL_TIM_IsEnabledDeadTimePreload

Note

Macro IS_TIM_BREAK_INSTANCE(timx) can be used to check whether or not a timer instance provides deadtime preload.

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

Functions

void LL_TIM_ConfigDMABurst ( TIM_TypeDef * timx , uint32_t dmaburst_base_address , uint32_t dmaburst_length , uint32_t dmaburst_source )

Configures the timer DMA burst feature.

Reference Manual to LL API cross reference (Register Field Functions)

DCR DBSS LL_TIM_ConfigDMABurst

DCR DBL LL_TIM_ConfigDMABurst

DCR DBA LL_TIM_ConfigDMABurst

Note

Macro IS_TIM_DMABURST_INSTANCE(timx) can be used to check whether or not a timer instance supports the DMA burst mode.

Parameters :
void LL_TIM_GetConfigDMABurst ( TIM_TypeDef * timx , uint32_t * p_dmaburst_base_address , uint32_t * p_dmaburst_length , uint32_t * p_dmaburst_source )

Get the timer DMA burst configuration.

Reference Manual to LL API cross reference (Register Field Functions)

DCR DBSS LL_TIM_GetConfigDMABurst

DCR DBL LL_TIM_GetConfigDMABurst

DCR DBA LL_TIM_GetConfigDMABurst

Note

Macro IS_TIM_DMABURST_INSTANCE(timx) can be used to check whether or not a timer instance supports the DMA burst mode.

Parameters :
uint32_t LL_TIM_GetDMABurstSource ( const TIM_TypeDef * timx )

Get the DMA burst source.

Reference Manual to LL API cross reference (Register Field Functions)

DCR DBSS LL_TIM_GetDMABurstSource

Note

Macro IS_TIM_DMABURST_INSTANCE(timx) can be used to check whether or not a timer instance supports the DMA burst mode.

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

(*) Value not defined for all timer instances.

Functions

void LL_TIM_EnableEncoderIndex ( TIM_TypeDef * timx )

Enable encoder index.

Reference Manual to LL API cross reference (Register Field Functions)

ECR IE LL_TIM_EnableEncoderIndex

Note

Macro IS_TIM_INDEX_INSTANCE(timx) can be used to check whether or not a timer instance provides an index input.

Parameters :

timx – Timer instance

void LL_TIM_DisableEncoderIndex ( TIM_TypeDef * timx )

Disable encoder index.

Reference Manual to LL API cross reference (Register Field Functions)

ECR IE LL_TIM_DisableEncoderIndex

Note

Macro IS_TIM_INDEX_INSTANCE(timx) can be used to check whether or not a timer instance provides an index input.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledEncoderIndex ( const TIM_TypeDef * timx )

Indicate whether encoder index is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

ECR IE LL_TIM_IsEnabledEncoderIndex

Note

Macro IS_TIM_INDEX_INSTANCE(timx) can be used to check whether or not a timer instance provides an index input.

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_SetIndexDirection ( TIM_TypeDef * timx , uint32_t index_direction )

Set index direction.

Reference Manual to LL API cross reference (Register Field Functions)

ECR IDIR LL_TIM_SetIndexDirection

Note

Macro IS_TIM_INDEX_INSTANCE(timx) can be used to check whether or not a timer instance provides an index input.

Parameters :
uint32_t LL_TIM_GetIndexDirection ( const TIM_TypeDef * timx )

Get actual index direction.

Reference Manual to LL API cross reference (Register Field Functions)

ECR IDIR LL_TIM_GetIndexDirection

Note

Macro IS_TIM_INDEX_INSTANCE(timx) can be used to check whether or not a timer instance provides an index input.

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_SetIndexBlanking ( TIM_TypeDef * timx , uint32_t index_blanking )

Set index blanking.

Reference Manual to LL API cross reference (Register Field Functions)

ECR IBLK LL_TIM_SetIndexBlanking

Note

Macro IS_TIM_INDEX_INSTANCE(timx) can be used to check whether or not a timer instance provides an index input.

Parameters :
uint32_t LL_TIM_GetIndexBlanking ( const TIM_TypeDef * timx )

Get actual index blanking.

Reference Manual to LL API cross reference (Register Field Functions)

ECR IBLK LL_TIM_GetIndexBlanking

Note

Macro IS_TIM_INDEX_INSTANCE(timx) can be used to check whether or not a timer instance provides an index input.

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_EnableFirstIndex ( TIM_TypeDef * timx )

Enable first index.

Reference Manual to LL API cross reference (Register Field Functions)

ECR FIDX LL_TIM_EnableFirstIndex

Note

Macro IS_TIM_INDEX_INSTANCE(timx) can be used to check whether or not a timer instance provides an index input.

Parameters :

timx – Timer instance

void LL_TIM_DisableFirstIndex ( TIM_TypeDef * timx )

Disable first index.

Reference Manual to LL API cross reference (Register Field Functions)

ECR FIDX LL_TIM_DisableFirstIndex

Note

Macro IS_TIM_INDEX_INSTANCE(timx) can be used to check whether or not a timer instance provides an index input.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledFirstIndex ( const TIM_TypeDef * timx )

Indicates whether first index is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

ECR FIDX LL_TIM_IsEnabledFirstIndex

Note

Macro IS_TIM_INDEX_INSTANCE(timx) can be used to check whether or not a timer instance provides an index input.

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_SetIndexPositionning ( TIM_TypeDef * timx , uint32_t index_positioning )

Set index positioning.

Reference Manual to LL API cross reference (Register Field Functions)

ECR IPOS LL_TIM_SetIndexPositionning

Note

Macro IS_TIM_INDEX_INSTANCE(timx) can be used to check whether or not a timer instance provides an index input.

Parameters :
uint32_t LL_TIM_GetIndexPositionning ( const TIM_TypeDef * timx )

Get actual index positioning.

Reference Manual to LL API cross reference (Register Field Functions)

ECR IPOS LL_TIM_GetIndexPositionning

Note

Macro IS_TIM_INDEX_INSTANCE(timx) can be used to check whether or not a timer instance provides an index input.

Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values:

void LL_TIM_ConfigEncoderIndex ( TIM_TypeDef * timx , uint32_t configuration )

Configure encoder index.

Reference Manual to LL API cross reference (Register Field Functions)

ECR IDIR LL_TIM_ConfigEncoderIndex

ECR IBLK LL_TIM_ConfigEncoderIndex

ECR FIDX LL_TIM_ConfigEncoderIndex

ECR IPOS LL_TIM_ConfigEncoderIndex

Note

Macro IS_TIM_INDEX_INSTANCE(timx) can be used to check whether or not a timer instance provides an index input.

Parameters :

Functions

void LL_TIM_SetOCRefClearInputSource ( TIM_TypeDef * timx , uint32_t ocrefclear_input_source )

Set the OCREF clear input source.

TIM1: one of the following values: LL_TIM_TIM1_OCREF_CLR_INT_ETR LL_TIM_TIM1_OCREF_CLR_INT_COMP1_OUT 

    TIM2: one of the following values:
       LL_TIM_TIM2_OCREF_CLR_INT_ETR
       LL_TIM_TIM2_OCREF_CLR_INT_COMP1_OUT

    TIM3: one of the following values: (**)
       LL_TIM_TIM3_OCREF_CLR_INT_ETR
       LL_TIM_TIM3_OCREF_CLR_INT_COMP1_OUT

    TIM4: one of the following values: (**)
       LL_TIM_TIM4_OCREF_CLR_INT_ETR
       LL_TIM_TIM4_OCREF_CLR_INT_COMP1_OUT

    TIM5: one of the following values: (**)
       LL_TIM_TIM5_OCREF_CLR_INT_ETR
       LL_TIM_TIM5_OCREF_CLR_INT_COMP1_OUT

    TIM8: one of the following values:
       LL_TIM_TIM8_OCREF_CLR_INT_ETR
       LL_TIM_TIM8_OCREF_CLR_INT_COMP1_OUT

    TIM15: one of the following values:
       LL_TIM_TIM15_OCREF_CLR_INT_COMP1_OUT
Reference Manual to LL API cross reference (Register Field Functions)

AF2 OCRSEL LL_TIM_SetOCRefClearInputSource

SMCR OCCS LL_TIM_SetOCRefClearInputSource 

    (*)  Value not defined in all devices.
    (**) Timer instance not available on all devices.

Note

The OCxREF signal of a given channel can be cleared when a high level is applied on the OCREF_CLR_INPUT

Note

This function can only be used in Output compare and PWM modes.

Parameters :

  • timx – Timer instance

  • ocrefclear_input_source – This parameter can be one of the following values: The description below summarizes specific “Timer Instance” and “OCRef clear input source” parameter possibilities:

uint32_t LL_TIM_GetOCRefClearInputSource ( const TIM_TypeDef * timx )

Get the OCREF clear input source.

TIM1: one of the following values: LL_TIM_TIM1_OCREF_CLR_INT_ETR LL_TIM_TIM1_OCREF_CLR_INT_COMP1_OUT 

    TIM2: one of the following values:
       LL_TIM_TIM2_OCREF_CLR_INT_ETR
       LL_TIM_TIM2_OCREF_CLR_INT_COMP1_OUT

    TIM3: one of the following values: (**)
       LL_TIM_TIM3_OCREF_CLR_INT_ETR
       LL_TIM_TIM3_OCREF_CLR_INT_COMP1_OUT

    TIM4: one of the following values: (**)
       LL_TIM_TIM4_OCREF_CLR_INT_ETR
       LL_TIM_TIM4_OCREF_CLR_INT_COMP1_OUT

    TIM5: one of the following values: (**)
       LL_TIM_TIM5_OCREF_CLR_INT_ETR
       LL_TIM_TIM5_OCREF_CLR_INT_COMP1_OUT

    TIM8: one of the following values:
       LL_TIM_TIM8_OCREF_CLR_INT_ETR
       LL_TIM_TIM8_OCREF_CLR_INT_COMP1_OUT

    TIM15: one of the following values:
       LL_TIM_TIM15_OCREF_CLR_INT_COMP1_OUT
Reference Manual to LL API cross reference (Register Field Functions)

AF2 OCRSEL LL_TIM_GetOCRefClearInputSource

SMCR OCCS LL_TIM_GetOCRefClearInputSource 

    (*)  Value not defined in all devices.
    (**) Timer instance not available on all devices.
Parameters :

timx – Timer instance

Return values :

Returned – value can be one of the following values: The description below summarizes specific “Timer Instance” and “OCRef clear input source” parameter possibilities:

Functions

void LL_TIM_ClearFlag_UPDATE ( TIM_TypeDef * timx )

Clear the update interrupt flag (UIF).

Reference Manual to LL API cross reference (Register Field Functions)

SR UIF LL_TIM_ClearFlag_UPDATE

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_UPDATE ( const TIM_TypeDef * timx )

Indicate whether update interrupt flag (UIF) is set (update interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR UIF LL_TIM_IsActiveFlag_UPDATE

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_CC1 ( TIM_TypeDef * timx )

Clear the Capture/Compare 1 interrupt flag (CC1F).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC1IF LL_TIM_ClearFlag_CC1

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_CC1 ( const TIM_TypeDef * timx )

Indicate whether Capture/Compare 1 interrupt flag (CC1F) is set (Capture/Compare 1 interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC1IF LL_TIM_IsActiveFlag_CC1

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_CC2 ( TIM_TypeDef * timx )

Clear the Capture/Compare 2 interrupt flag (CC2F).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC2IF LL_TIM_ClearFlag_CC2

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_CC2 ( const TIM_TypeDef * timx )

Indicate whether Capture/Compare 2 interrupt flag (CC2F) is set (Capture/Compare 2 interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC2IF LL_TIM_IsActiveFlag_CC2

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_CC3 ( TIM_TypeDef * timx )

Clear the Capture/Compare 3 interrupt flag (CC3F).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC3IF LL_TIM_ClearFlag_CC3

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_CC3 ( const TIM_TypeDef * timx )

Indicate whether Capture/Compare 3 interrupt flag (CC3F) is set (Capture/Compare 3 interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC3IF LL_TIM_IsActiveFlag_CC3

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_CC4 ( TIM_TypeDef * timx )

Clear the Capture/Compare 4 interrupt flag (CC4F).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC4IF LL_TIM_ClearFlag_CC4

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_CC4 ( const TIM_TypeDef * timx )

Indicate whether Capture/Compare 4 interrupt flag (CC4F) is set (Capture/Compare 4 interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC4IF LL_TIM_IsActiveFlag_CC4

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_CC5 ( TIM_TypeDef * timx )

Clear the Capture/Compare 5 interrupt flag (CC5F).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC5IF LL_TIM_ClearFlag_CC5

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_CC5 ( const TIM_TypeDef * timx )

Indicate whether Capture/Compare 5 interrupt flag (CC5F) is set (Capture/Compare 5 interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC5IF LL_TIM_IsActiveFlag_CC5

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_CC6 ( TIM_TypeDef * timx )

Clear the Capture/Compare 6 interrupt flag (CC6F).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC6IF LL_TIM_ClearFlag_CC6

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_CC6 ( const TIM_TypeDef * timx )

Indicate whether Capture/Compare 6 interrupt flag (CC6F) is set (Capture/Compare 6 interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC6IF LL_TIM_IsActiveFlag_CC6

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_CC7 ( TIM_TypeDef * timx )

Clear the Capture/Compare 7 interrupt flag (CC7F).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC7IF LL_TIM_ClearFlag_CC7

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_CC7 ( const TIM_TypeDef * timx )

Indicate whether Capture/Compare 7 interrupt flag (CC7F) is set (Capture/Compare 7 interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC7IF LL_TIM_IsActiveFlag_CC7

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_COM ( TIM_TypeDef * timx )

Clear the commutation interrupt flag (COMIF).

Reference Manual to LL API cross reference (Register Field Functions)

SR COMIF LL_TIM_ClearFlag_COM

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_COM ( const TIM_TypeDef * timx )

Indicate whether commutation interrupt flag (COMIF) is set (commutation interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR COMIF LL_TIM_IsActiveFlag_COM

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_TRIG ( TIM_TypeDef * timx )

Clear the trigger interrupt flag (TIF).

Reference Manual to LL API cross reference (Register Field Functions)

SR TIF LL_TIM_ClearFlag_TRIG

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_TRIG ( const TIM_TypeDef * timx )

Indicate whether trigger interrupt flag (TIF) is set (trigger interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR TIF LL_TIM_IsActiveFlag_TRIG

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_BRK ( TIM_TypeDef * timx )

Clear the break interrupt flag (BIF).

Reference Manual to LL API cross reference (Register Field Functions)

SR BIF LL_TIM_ClearFlag_BRK

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_BRK ( const TIM_TypeDef * timx )

Indicate whether break interrupt flag (BIF) is set (break interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR BIF LL_TIM_IsActiveFlag_BRK

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_BRK2 ( TIM_TypeDef * timx )

Clear the break 2 interrupt flag (B2IF).

Reference Manual to LL API cross reference (Register Field Functions)

SR B2IF LL_TIM_ClearFlag_BRK2

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_BRK2 ( const TIM_TypeDef * timx )

Indicate whether break 2 interrupt flag (B2IF) is set (break 2 interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR B2IF LL_TIM_IsActiveFlag_BRK2

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_SYSBRK ( TIM_TypeDef * timx )

Clear the system break interrupt flag (SBIF).

Reference Manual to LL API cross reference (Register Field Functions)

SR SBIF LL_TIM_ClearFlag_SYSBRK

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_SYSBRK ( const TIM_TypeDef * timx )

Indicate whether system break interrupt flag (SBIF) is set (system break interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR SBIF LL_TIM_IsActiveFlag_SYSBRK

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_BG ( TIM_TypeDef * timx )

Clear the break generation flag (BGF).

Reference Manual to LL API cross reference (Register Field Functions)

SR BGF LL_TIM_ClearFlag_BG

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_BG ( const TIM_TypeDef * timx )

Indicate whether break generation flag (BGF) is set (break interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR BGF LL_TIM_IsActiveFlag_BG

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_B2G ( TIM_TypeDef * timx )

Clear the break 2 generation flag (B2GF).

Reference Manual to LL API cross reference (Register Field Functions)

SR B2GF LL_TIM_ClearFlag_B2G

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_B2G ( const TIM_TypeDef * timx )

Indicate whether break 2 generation flag (B2GF) is set (break 2 interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR B2GF LL_TIM_IsActiveFlag_B2G

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_CC1OVR ( TIM_TypeDef * timx )

Clear the Capture/Compare 1 over-capture interrupt flag (CC1OF).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC1OF LL_TIM_ClearFlag_CC1OVR

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_CC1OVR ( const TIM_TypeDef * timx )

Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set (Capture/Compare 1 interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC1OF LL_TIM_IsActiveFlag_CC1OVR

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_CC2OVR ( TIM_TypeDef * timx )

Clear the Capture/Compare 2 over-capture interrupt flag (CC2OF).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC2OF LL_TIM_ClearFlag_CC2OVR

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_CC2OVR ( const TIM_TypeDef * timx )

Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set (Capture/Compare 2 over-capture interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC2OF LL_TIM_IsActiveFlag_CC2OVR

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_CC3OVR ( TIM_TypeDef * timx )

Clear the Capture/Compare 3 over-capture interrupt flag (CC3OF).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC3OF LL_TIM_ClearFlag_CC3OVR

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_CC3OVR ( const TIM_TypeDef * timx )

Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set (Capture/Compare 3 over-capture interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC3OF LL_TIM_IsActiveFlag_CC3OVR

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_CC4OVR ( TIM_TypeDef * timx )

Clear the Capture/Compare 4 over-capture interrupt flag (CC4OF).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC4OF LL_TIM_ClearFlag_CC4OVR

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_CC4OVR ( const TIM_TypeDef * timx )

Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set (Capture/Compare 4 over-capture interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR CC4OF LL_TIM_IsActiveFlag_CC4OVR

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_TERR ( TIM_TypeDef * timx )

Clear the transition error interrupt flag (TERRF).

Reference Manual to LL API cross reference (Register Field Functions)

SR TERRF LL_TIM_ClearFlag_TERR

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_TERR ( const TIM_TypeDef * timx )

Indicate whether transition error interrupt flag (TERRF) is set (transition error interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR TERRF LL_TIM_IsActiveFlag_TERR

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_IERR ( TIM_TypeDef * timx )

Clear the index error interrupt flag (IERRF).

Reference Manual to LL API cross reference (Register Field Functions)

SR IERRF LL_TIM_ClearFlag_IERR

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_IERR ( const TIM_TypeDef * timx )

Indicate whether index error interrupt flag (IERRF) is set (index error interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR IERRF LL_TIM_IsActiveFlag_IERR

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_DIR ( TIM_TypeDef * timx )

Clear the direction change interrupt flag (DIRF).

Reference Manual to LL API cross reference (Register Field Functions)

SR DIRF LL_TIM_ClearFlag_DIR

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_DIR ( const TIM_TypeDef * timx )

Indicate whether direction change interrupt flag (DIRF) is set (direction change interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR DIRF LL_TIM_IsActiveFlag_DIR

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_IDX ( TIM_TypeDef * timx )

Clear the index interrupt flag (IDXF).

Reference Manual to LL API cross reference (Register Field Functions)

SR IDXF LL_TIM_ClearFlag_IDX

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_IDX ( const TIM_TypeDef * timx )

Indicate whether index interrupt flag (IDXF) is set (index interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR IDXF LL_TIM_IsActiveFlag_IDX

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_ClearFlag_UIOVR ( TIM_TypeDef * timx )

Clear the overrun flag (UIOVRF).

Reference Manual to LL API cross reference (Register Field Functions)

SR UIOVRF LL_TIM_ClearFlag_UIOVR

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsActiveFlag_UIOVR ( const TIM_TypeDef * timx )

Indicate whether overrun flag (UIOVRF) is set (another interrupt is pending).

Reference Manual to LL API cross reference (Register Field Functions)

SR UIOVRF LL_TIM_IsActiveFlag_UIOVR

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

Functions

void LL_TIM_EnableIT_UPDATE ( TIM_TypeDef * timx )

Enable update interrupt (UIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER UIE LL_TIM_EnableIT_UPDATE

Parameters :

timx – Timer instance

void LL_TIM_DisableIT_UPDATE ( TIM_TypeDef * timx )

Disable update interrupt (UIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER UIE LL_TIM_DisableIT_UPDATE

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledIT_UPDATE ( const TIM_TypeDef * timx )

Indicates whether the update interrupt (UIE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER UIE LL_TIM_IsEnabledIT_UPDATE

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableIT_CC1 ( TIM_TypeDef * timx )

Enable capture/compare 1 interrupt (CC1IE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC1IE LL_TIM_EnableIT_CC1

Parameters :

timx – Timer instance

void LL_TIM_DisableIT_CC1 ( TIM_TypeDef * timx )

Disable capture/compare 1 interrupt (CC1IE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC1IE LL_TIM_DisableIT_CC1

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledIT_CC1 ( const TIM_TypeDef * timx )

Indicates whether the capture/compare 1 interrupt (CC1IE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC1IE LL_TIM_IsEnabledIT_CC1

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableIT_CC2 ( TIM_TypeDef * timx )

Enable capture/compare 2 interrupt (CC2IE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC2IE LL_TIM_EnableIT_CC2

Parameters :

timx – Timer instance

void LL_TIM_DisableIT_CC2 ( TIM_TypeDef * timx )

Disable capture/compare 2 interrupt (CC2IE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC2IE LL_TIM_DisableIT_CC2

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledIT_CC2 ( const TIM_TypeDef * timx )

Indicates whether the capture/compare 2 interrupt (CC2IE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC2IE LL_TIM_IsEnabledIT_CC2

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableIT_CC3 ( TIM_TypeDef * timx )

Enable capture/compare 3 interrupt (CC3IE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC3IE LL_TIM_EnableIT_CC3

Parameters :

timx – Timer instance

void LL_TIM_DisableIT_CC3 ( TIM_TypeDef * timx )

Disable capture/compare 3 interrupt (CC3IE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC3IE LL_TIM_DisableIT_CC3

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledIT_CC3 ( const TIM_TypeDef * timx )

Indicates whether the capture/compare 3 interrupt (CC3IE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC3IE LL_TIM_IsEnabledIT_CC3

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableIT_CC4 ( TIM_TypeDef * timx )

Enable capture/compare 4 interrupt (CC4IE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC4IE LL_TIM_EnableIT_CC4

Parameters :

timx – Timer instance

void LL_TIM_DisableIT_CC4 ( TIM_TypeDef * timx )

Disable capture/compare 4 interrupt (CC4IE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC4IE LL_TIM_DisableIT_CC4

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledIT_CC4 ( const TIM_TypeDef * timx )

Indicates whether the capture/compare 4 interrupt (CC4IE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC4IE LL_TIM_IsEnabledIT_CC4

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableIT_COM ( TIM_TypeDef * timx )

Enable commutation interrupt (COMIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER COMIE LL_TIM_EnableIT_COM

Parameters :

timx – Timer instance

void LL_TIM_DisableIT_COM ( TIM_TypeDef * timx )

Disable commutation interrupt (COMIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER COMIE LL_TIM_DisableIT_COM

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledIT_COM ( const TIM_TypeDef * timx )

Indicates whether the commutation interrupt (COMIE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER COMIE LL_TIM_IsEnabledIT_COM

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableIT_TRIG ( TIM_TypeDef * timx )

Enable trigger interrupt (TIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER TIE LL_TIM_EnableIT_TRIG

Parameters :

timx – Timer instance

void LL_TIM_DisableIT_TRIG ( TIM_TypeDef * timx )

Disable trigger interrupt (TIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER TIE LL_TIM_DisableIT_TRIG

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledIT_TRIG ( const TIM_TypeDef * timx )

Indicates whether the trigger interrupt (TIE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER TIE LL_TIM_IsEnabledIT_TRIG

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableIT_BRK ( TIM_TypeDef * timx )

Enable break interrupt (BIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER BIE LL_TIM_EnableIT_BRK

Parameters :

timx – Timer instance

void LL_TIM_DisableIT_BRK ( TIM_TypeDef * timx )

Disable break interrupt (BIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER BIE LL_TIM_DisableIT_BRK

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledIT_BRK ( const TIM_TypeDef * timx )

Indicates whether the break interrupt (BIE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER BIE LL_TIM_IsEnabledIT_BRK

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableIT_TERR ( TIM_TypeDef * timx )

Enable transition error interrupt (TERRIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER TERRIE LL_TIM_EnableIT_TERR

Note

Macro IS_TIM_ENCODER_ERROR_INSTANCE(timx) can be used to check whether or not a timer instance provides encoder error management.

Parameters :

timx – Timer instance

void LL_TIM_DisableIT_TERR ( TIM_TypeDef * timx )

Disable transition error interrupt (TERRIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER TERRIE LL_TIM_DisableIT_TERR

Note

Macro IS_TIM_ENCODER_ERROR_INSTANCE(timx) can be used to check whether or not a timer instance provides encoder error management.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledIT_TERR ( const TIM_TypeDef * timx )

Indicates whether the transition error interrupt (TERRIE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER TERRIE LL_TIM_IsEnabledIT_TERR

Note

Macro IS_TIM_ENCODER_ERROR_INSTANCE(timx) can be used to check whether or not a timer instance provides encoder error management.

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableIT_IERR ( TIM_TypeDef * timx )

Enable index error interrupt (IERRIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER IERRIE LL_TIM_EnableIT_IERR

Note

Macro IS_TIM_ENCODER_ERROR_INSTANCE(timx) can be used to check whether or not a timer instance provides encoder error management.

Parameters :

timx – Timer instance

void LL_TIM_DisableIT_IERR ( TIM_TypeDef * timx )

Disable index error interrupt (IERRIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER IERRIE LL_TIM_DisableIT_IERR

Note

Macro IS_TIM_ENCODER_ERROR_INSTANCE(timx) can be used to check whether or not a timer instance provides encoder error management.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledIT_IERR ( const TIM_TypeDef * timx )

Indicates whether the index error interrupt (IERRIE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER IERRIE LL_TIM_IsEnabledIT_IERR

Note

Macro IS_TIM_ENCODER_ERROR_INSTANCE(timx) can be used to check whether or not a timer instance provides encoder error management.

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableIT_DIR ( TIM_TypeDef * timx )

Enable direction change interrupt (DIRIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER DIRIE LL_TIM_EnableIT_DIR

Note

Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(timx) can be used to check whether or not a timer instance provides encoder interrupt management.

Parameters :

timx – Timer instance

void LL_TIM_DisableIT_DIR ( TIM_TypeDef * timx )

Disable direction change interrupt (DIRIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER DIRIE LL_TIM_DisableIT_DIR

Note

Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(timx) can be used to check whether or not a timer instance provides encoder interrupt management.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledIT_DIR ( const TIM_TypeDef * timx )

Indicates whether the direction change interrupt (DIRIE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER DIRIE LL_TIM_IsEnabledIT_DIR

Note

Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(timx) can be used to check whether or not a timer instance provides encoder interrupt management.

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableIT_IDX ( TIM_TypeDef * timx )

Enable index interrupt (IDXIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER IDXIE LL_TIM_EnableIT_IDX

Note

Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(timx) can be used to check whether or not a timer instance provides encoder interrupt management.

Parameters :

timx – Timer instance

void LL_TIM_DisableIT_IDX ( TIM_TypeDef * timx )

Disable index interrupt (IDXIE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER IDXIE LL_TIM_DisableIT_IDX

Note

Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(timx) can be used to check whether or not a timer instance provides encoder interrupt management.

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledIT_IDX ( const TIM_TypeDef * timx )

Indicates whether the index interrupt (IDXIE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER IDXIE LL_TIM_IsEnabledIT_IDX

Note

Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(timx) can be used to check whether or not a timer instance provides encoder interrupt management.

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableIT ( TIM_TypeDef * timx , uint32_t it_mask )

Enable the interrupt(s).

Reference Manual to LL API cross reference (Register Field Functions)

DIER BIE LL_TIM_EnableIT

DIER UIE LL_TIM_EnableIT

DIER CC1IE LL_TIM_EnableIT

DIER CC2IE LL_TIM_EnableIT

DIER CC3IE LL_TIM_EnableIT

DIER CC4IE LL_TIM_EnableIT

DIER COMIE LL_TIM_EnableIT

DIER IDXIE LL_TIM_EnableIT

DIER DIRIE LL_TIM_EnableIT

DIER IERRIE LL_TIM_EnableIT

DIER TERRIE LL_TIM_EnableIT

DIER TIE LL_TIM_EnableIT

Parameters :
void LL_TIM_DisableIT ( TIM_TypeDef * timx , uint32_t it_mask )

Disable the interrupt(s).

Reference Manual to LL API cross reference (Register Field Functions)

DIER BIE LL_TIM_DisableIT

DIER UIE LL_TIM_DisableIT

DIER CC1IE LL_TIM_DisableIT

DIER CC2IE LL_TIM_DisableIT

DIER CC3IE LL_TIM_DisableIT

DIER CC4IE LL_TIM_DisableIT

DIER COMIE LL_TIM_DisableIT

DIER IDXIE LL_TIM_DisableIT

DIER DIRIE LL_TIM_DisableIT

DIER IERRIE LL_TIM_DisableIT

DIER TERRIE LL_TIM_DisableIT

DIER TIE LL_TIM_DisableIT

Parameters :

Functions

void LL_TIM_EnableDMAReq_UPDATE ( TIM_TypeDef * timx )

Enable update DMA request (UDE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER UDE LL_TIM_EnableDMAReq_UPDATE

Parameters :

timx – Timer instance

void LL_TIM_DisableDMAReq_UPDATE ( TIM_TypeDef * timx )

Disable update DMA request (UDE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER UDE LL_TIM_DisableDMAReq_UPDATE

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledDMAReq_UPDATE ( const TIM_TypeDef * timx )

Indicates whether the update DMA request (UDE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER UDE LL_TIM_IsEnabledDMAReq_UPDATE

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableDMAReq_CC1 ( TIM_TypeDef * timx )

Enable capture/compare 1 DMA request (CC1DE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC1DE LL_TIM_EnableDMAReq_CC1

Parameters :

timx – Timer instance

void LL_TIM_DisableDMAReq_CC1 ( TIM_TypeDef * timx )

Disable capture/compare 1 DMA request (CC1DE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC1DE LL_TIM_DisableDMAReq_CC1

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledDMAReq_CC1 ( const TIM_TypeDef * timx )

Indicates whether the capture/compare 1 DMA request (CC1DE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC1DE LL_TIM_IsEnabledDMAReq_CC1

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableDMAReq_CC2 ( TIM_TypeDef * timx )

Enable capture/compare 2 DMA request (CC2DE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC2DE LL_TIM_EnableDMAReq_CC2

Parameters :

timx – Timer instance

void LL_TIM_DisableDMAReq_CC2 ( TIM_TypeDef * timx )

Disable capture/compare 2 DMA request (CC2DE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC2DE LL_TIM_DisableDMAReq_CC2

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledDMAReq_CC2 ( const TIM_TypeDef * timx )

Indicates whether the capture/compare 2 DMA request (CC2DE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC2DE LL_TIM_IsEnabledDMAReq_CC2

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableDMAReq_CC3 ( TIM_TypeDef * timx )

Enable capture/compare 3 DMA request (CC3DE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC3DE LL_TIM_EnableDMAReq_CC3

Parameters :

timx – Timer instance

void LL_TIM_DisableDMAReq_CC3 ( TIM_TypeDef * timx )

Disable capture/compare 3 DMA request (CC3DE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC3DE LL_TIM_DisableDMAReq_CC3

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledDMAReq_CC3 ( const TIM_TypeDef * timx )

Indicates whether the capture/compare 3 DMA request (CC3DE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC3DE LL_TIM_IsEnabledDMAReq_CC3

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableDMAReq_CC4 ( TIM_TypeDef * timx )

Enable capture/compare 4 DMA request (CC4DE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC4DE LL_TIM_EnableDMAReq_CC4

Parameters :

timx – Timer instance

void LL_TIM_DisableDMAReq_CC4 ( TIM_TypeDef * timx )

Disable capture/compare 4 DMA request (CC4DE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC4DE LL_TIM_DisableDMAReq_CC4

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledDMAReq_CC4 ( const TIM_TypeDef * timx )

Indicates whether the capture/compare 4 DMA request (CC4DE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER CC4DE LL_TIM_IsEnabledDMAReq_CC4

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableDMAReq_COM ( TIM_TypeDef * timx )

Enable commutation DMA request (COMDE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER COMDE LL_TIM_EnableDMAReq_COM

Parameters :

timx – Timer instance

void LL_TIM_DisableDMAReq_COM ( TIM_TypeDef * timx )

Disable commutation DMA request (COMDE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER COMDE LL_TIM_DisableDMAReq_COM

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledDMAReq_COM ( const TIM_TypeDef * timx )

Indicates whether the commutation DMA request (COMDE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER COMDE LL_TIM_IsEnabledDMAReq_COM

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableDMAReq_TRIG ( TIM_TypeDef * timx )

Enable trigger interrupt (TDE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER TDE LL_TIM_EnableDMAReq_TRIG

Parameters :

timx – Timer instance

void LL_TIM_DisableDMAReq_TRIG ( TIM_TypeDef * timx )

Disable trigger interrupt (TDE).

Reference Manual to LL API cross reference (Register Field Functions)

DIER TDE LL_TIM_DisableDMAReq_TRIG

Parameters :

timx – Timer instance

uint32_t LL_TIM_IsEnabledDMAReq_TRIG ( const TIM_TypeDef * timx )

Indicates whether the trigger interrupt (TDE) is enabled.

Reference Manual to LL API cross reference (Register Field Functions)

DIER TDE LL_TIM_IsEnabledDMAReq_TRIG

Parameters :

timx – Timer instance

Return values :

State – of bit (1 or 0).

void LL_TIM_EnableDMAReq ( TIM_TypeDef * timx , uint32_t dma_mask )

Enable the selected dma request(s).

Reference Manual to LL API cross reference (Register Field Functions)

DIER UDE LL_TIM_EnableDMAReq

DIER CC1DE LL_TIM_EnableDMAReq

DIER CC2DE LL_TIM_EnableDMAReq

DIER CC3DE LL_TIM_EnableDMAReq

DIER CC4DE LL_TIM_EnableDMAReq

DIER COMDE LL_TIM_EnableDMAReq

DIER TDE LL_TIM_EnableDMAReq

Parameters :
void LL_TIM_DisableDMAReq ( TIM_TypeDef * timx , uint32_t dma_mask )

Disable the selected dma request(s).

Reference Manual to LL API cross reference (Register Field Functions)

DIER UDE LL_TIM_DisableDMAReq

DIER CC1DE LL_TIM_DisableDMAReq

DIER CC2DE LL_TIM_DisableDMAReq

DIER CC3DE LL_TIM_DisableDMAReq

DIER CC4DE LL_TIM_DisableDMAReq

DIER COMDE LL_TIM_DisableDMAReq

DIER TDE LL_TIM_DisableDMAReq

Parameters :

Functions

void LL_TIM_GenerateEvent_UPDATE ( TIM_TypeDef * timx )

Generate an update event.

Reference Manual to LL API cross reference (Register Field Functions)

EGR UG LL_TIM_GenerateEvent_UPDATE

Parameters :

timx – Timer instance

void LL_TIM_GenerateEvent_CC1 ( TIM_TypeDef * timx )

Generate Capture/Compare 1 event.

Reference Manual to LL API cross reference (Register Field Functions)

EGR CC1G LL_TIM_GenerateEvent_CC1

Parameters :

timx – Timer instance

void LL_TIM_GenerateEvent_CC2 ( TIM_TypeDef * timx )

Generate Capture/Compare 2 event.

Reference Manual to LL API cross reference (Register Field Functions)

EGR CC2G LL_TIM_GenerateEvent_CC2

Parameters :

timx – Timer instance

void LL_TIM_GenerateEvent_CC3 ( TIM_TypeDef * timx )

Generate Capture/Compare 3 event.

Reference Manual to LL API cross reference (Register Field Functions)

EGR CC3G LL_TIM_GenerateEvent_CC3

Parameters :

timx – Timer instance

void LL_TIM_GenerateEvent_CC4 ( TIM_TypeDef * timx )

Generate Capture/Compare 4 event.

Reference Manual to LL API cross reference (Register Field Functions)

EGR CC4G LL_TIM_GenerateEvent_CC4

Parameters :

timx – Timer instance

void LL_TIM_GenerateEvent_COM ( TIM_TypeDef * timx )

Generate commutation event.

Reference Manual to LL API cross reference (Register Field Functions)

EGR COMG LL_TIM_GenerateEvent_COM

Parameters :

timx – Timer instance

void LL_TIM_GenerateEvent_TRIG ( TIM_TypeDef * timx )

Generate trigger event.

Reference Manual to LL API cross reference (Register Field Functions)

EGR TG LL_TIM_GenerateEvent_TRIG

Parameters :

timx – Timer instance

void LL_TIM_GenerateEvent_BRK ( TIM_TypeDef * timx )

Generate break event.

Reference Manual to LL API cross reference (Register Field Functions)

EGR BG LL_TIM_GenerateEvent_BRK

Parameters :

timx – Timer instance

void LL_TIM_GenerateEvent_BRK2 ( TIM_TypeDef * timx )

Generate break 2 event.

Reference Manual to LL API cross reference (Register Field Functions)

EGR B2G LL_TIM_GenerateEvent_BRK2

Parameters :

timx – Timer instance

void LL_TIM_GenerateEvent ( TIM_TypeDef * timx , uint32_t software_event )

Generate software event(s).

Reference Manual to LL API cross reference (Register Field Functions)

EGR UG LL_TIM_GenerateEvent

EGR CC1G LL_TIM_GenerateEvent

EGR CC2G LL_TIM_GenerateEvent

EGR CC3G LL_TIM_GenerateEvent

EGR CC4G LL_TIM_GenerateEvent

EGR COMG LL_TIM_GenerateEvent

EGR TG LL_TIM_GenerateEvent

EGR BG LL_TIM_GenerateEvent

EGR B2G LL_TIM_GenerateEvent

Parameters :

TIM3 External Trigger Input

Note

This section is not available for STM32C562xx.

TIM4 External Trigger Input

Note

This section is not available for STM32C562xx.

TIM3 Input Ch1

Note

This section is not available for STM32C562xx.

TIM3 Input Ch2

Note

This section is not available for STM32C562xx.

TIM3 Input Ch3

Note

This section is not available for STM32C562xx.

TIM3 Input Ch4

Note

This section is not available for STM32C562xx.

TIM4 Input Ch1

Note

This section is not available for STM32C562xx.

TIM4 Input Ch2

Note

This section is not available for STM32C562xx.

TIM4 Input Ch3

Note

This section is not available for STM32C562xx.

TIM4 Input Ch4

Note

This section is not available for STM32C562xx.