2.13. When selecting microcontrollers in the STM32WL series

For STM32WL3 projects that operate with FreeRTOS, when the timebase is set to SysTick in conjunction with a GCC toolchain, build issues may be encountered.

If LoRaWAN®, SubGHZ_Phy, or SigfoxTM middleware is used with the option Generate peripheral initialization as a pair of .c/.h files per peripheral disabled, it is advised to untick the visibility of the SUBGHZ and IPCC peripherals in [Project Manager] > [Advanced Settings] Generated Function Calls.

Import from and to dual-core is not working for the STM32WL series.

For dual-core products, IPCC LL + RF middleware are not supported.

If a Sigfox project is generated with MDK-ARM, the option -fshort-enums must be set in project Options > C/C++ (AC6).

The SUBGHZ peripheral is forced on the Cortex-M0+.

In case of project migration from a release version before V6.2.0, some previously default configuration states have moved to “default” configuration.

When compiling under IAR Embedded Workbench, in case of dual-core products, the user must activate the share mode in both CM4 and CM0PLUS ST-LINK project options.

The “Time base: System tick timer” value selected in the NVIC configuration panel is not used for code generation and must be updated manually in the generated code.

KMS and STM32Cube Azure® RTOS ThreadX cannot be enabled in the same core.