Reference Manual to LL API cross reference

The following table provides the mapping between the registers and bits, as they appear inside product reference manual, and the functions provided by the Low Layer interface.

This table gives the correlation for DMA registers

Register

Bit

Function

CBR1

BNDT

CBR1

BRC

CBR1

BRDDEC

CBR1

BRSDEC

CBR1

DDEC

CBR1

SDEC

CBR2

BRDAO

CBR2

BRSAO

CCR

DTEIE

CCR

EN

CCR

HTIE

CCR

LAP

CCR

LSM

CCR

PRIO

CCR

RESET

CCR

SUSP

CCR

SUSPIE

CCR

TCIE

CCR

TOIE

CCR

TOIF/SUSPIF/USEIF/ULEIF/DTEIF/HTIF/TCIF

CCR

ULEIE

CCR

USEIE

CDAR

DA

CDAR

DAO

CFCR

DTEF

CFCR

HTF

CFCR

SUSPF

CFCR

TCF

CFCR

TOF

CFCR

TOF/SUSPF/USEF/ULEF/DTEF/HTF/TCF

CFCR

ULEF

CFCR

USEF

CLBAR

LBA

CLLR

LA

CLLR

UB1

CLLR

UB2

CLLR

UDA

CLLR

ULL

CLLR

USA

CLLR

UT1

CLLR

UT2

CLLR

UT3

CSAR

SA

CSR

DTEF

CSR

FIFOL

CSR

HTF

CSR

IDLEF

CSR

SUSPF

CSR

TCF

CSR

TOF

CSR

ULEF

CSR

USEF

CTR1

DAP

CTR1

DBL_1

CTR1

DBX

CTR1

DDW_LOG2

CTR1

DHX

CTR1

DINC

CTR1

DSEC

CTR1

PAM

CTR1

SAP

CTR1

SBL_1

CTR1

SBX

CTR1

SDW_LOG2

CTR1

SINC

CTR1

SSEC

CTR2

BREQ

CTR2

DREQ

CTR2

REQSEL

CTR2

SWREQ

CTR2

TCEM

CTR2

TRIGM

CTR2

TRIGPOL

CTR2

TRIGPOL/TRIGM/TRIGSEL

CTR2

TRIGSEL

CTR3

DAO

CTR3

SAO

MISR

MISx

PRIVCFGR

PRIVx

RCFGLOCKR

LOCKx

SECCFGR

LOCKx

SECCFGR

SECx

SMISR

MISx