LL GTZC Constants

Register Selection

group GTZC_LL_EC_RegisterSelection

Defines

LL_GTZC1_PERIPH_REG1 00U

GTZC1 peripherals register 1

LL_GTZC1_PERIPH_REG2 32U

GTZC1 peripherals register 2

LL_GTZC1_PERIPH_REG3 64U

GTZC1 peripherals register 3

LL_GTZC1_PERIPH_REG4 96U

GTZC1 peripherals register 4

LL_GTZC2_PERIPH_REG1 (00U + AHB3PERIPH_BASE_NS)

GTZC2 peripherals register 1

LL_GTZC2_PERIPH_REG2 (32U + AHB3PERIPH_BASE_NS)

GTZC2 peripherals register 2

Watermark Maximum Descriptos

group GTZC_LL_EC_WatermarkMaximumDescriptos

Defines

LL_GTZC_MPCWM_MAX_DESC 5U

GTZC Watermark maximum descriptors

Peripheral Selection

group GTZC_LL_EC_PeripheralSelection

Defines

LL_GTZC1_GRP1_TIM2 GTZC_CFGR1_TIM2_Msk

GTZC1 (ILAC/SEC/PRIV)CFGR1 peripheral selection.

LL GTZC1 CFGR1 peripheral TIM2

LL_GTZC1_GRP1_TIM3 GTZC_CFGR1_TIM3_Msk

LL GTZC1 CFGR1 peripheral TIM3

LL_GTZC1_GRP1_TIM4 GTZC_CFGR1_TIM4_Msk

LL GTZC1 CFGR1 peripheral TIM4

LL_GTZC1_GRP1_TIM5 GTZC_CFGR1_TIM5_Msk

LL GTZC1 CFGR1 peripheral TIM5

LL_GTZC1_GRP1_TIM6 GTZC_CFGR1_TIM6_Msk

LL GTZC1 CFGR1 peripheral TIM6

LL_GTZC1_GRP1_TIM7 GTZC_CFGR1_TIM7_Msk

LL GTZC1 CFGR1 peripheral TIM7

LL_GTZC1_GRP1_WWDG GTZC_CFGR1_WWDG_Msk

LL GTZC1 CFGR1 peripheral WWDG

LL_GTZC1_GRP1_IWDG GTZC_CFGR1_IWDG_Msk

LL GTZC1 CFGR1 peripheral IWDG

LL_GTZC1_GRP1_SPI2 GTZC_CFGR1_SPI2_Msk

LL GTZC1 CFGR1 peripheral SPI2

LL_GTZC1_GRP1_USART2 GTZC_CFGR1_USART2_Msk

LL GTZC1 CFGR1 peripheral USART2

LL_GTZC1_GRP1_USART3 GTZC_CFGR1_USART3_Msk

LL GTZC1 CFGR1 peripheral USART3

LL_GTZC1_GRP1_UART4 GTZC_CFGR1_UART4_Msk

LL GTZC1 CFGR1 peripheral UART4

LL_GTZC1_GRP1_UART5 GTZC_CFGR1_UART5_Msk

LL GTZC1 CFGR1 peripheral UART5

LL_GTZC1_GRP1_I2C1 GTZC_CFGR1_I2C1_Msk

LL GTZC1 CFGR1 peripheral I2C1

LL_GTZC1_GRP1_I2C2 GTZC_CFGR1_I2C2_Msk

LL GTZC1 CFGR1 peripheral I2C2

LL_GTZC1_GRP1_CRS GTZC_CFGR1_CRS_Msk

LL GTZC1 CFGR1 peripheral CRS

LL_GTZC1_GRP1_I2C4 GTZC_CFGR1_I2C4_Msk

LL GTZC1 CFGR1 peripheral I2C4

LL_GTZC1_GRP1_LPTIM2 GTZC_CFGR1_LPTIM2_Msk

LL GTZC1 CFGR1 peripheral LPTIM2

LL_GTZC1_GRP1_FDCAN1 GTZC_CFGR1_FDCAN1_Msk

LL GTZC1 CFGR1 peripheral FDCAN1

LL_GTZC1_GRP1_UCPD1 GTZC_CFGR1_UCPD1_Msk

LL GTZC1 CFGR1 peripheral UCPD1

LL_GTZC1_GRP1_USART6 GTZC_CFGR1_USART6_Msk

LL GTZC1 CFGR1 peripheral USART6

LL_GTZC1_GRP1_I2C5 GTZC_CFGR1_I2C5_Msk

LL GTZC1 CFGR1 peripheral I2C5

LL_GTZC1_GRP1_I2C6 GTZC_CFGR1_I2C6_Msk

LL GTZC1 CFGR1 peripheral I2C6

LL_GTZC1_GRP1_ALL 0x00EFFFFFU

LL GTZC1 CFGR1 ALL peripherals

LL_GTZC1_GRP2_TIM1 GTZC_CFGR2_TIM1_Msk

GTZC1 (ILAC/SEC/PRIV)CFGR2 peripheral selection.

LL GTZC1 CFGR2 peripheral TIM1

LL_GTZC1_GRP2_SPI1 GTZC_CFGR2_SPI1_Msk

LL GTZC1 CFGR2 peripheral SPI1

LL_GTZC1_GRP2_TIM8 GTZC_CFGR2_TIM8_Msk

LL GTZC1 CFGR2 peripheral TIM8

LL_GTZC1_GRP2_USART1 GTZC_CFGR2_USART1_Msk

LL GTZC1 CFGR2 peripheral USART1

LL_GTZC1_GRP2_TIM15 GTZC_CFGR2_TIM15_Msk

LL GTZC1 CFGR2 peripheral TIM15

LL_GTZC1_GRP2_TIM16 GTZC_CFGR2_TIM16_Msk

LL GTZC1 CFGR2 peripheral TIM16

LL_GTZC1_GRP2_TIM17 GTZC_CFGR2_TIM17_Msk

LL GTZC1 CFGR2 peripheral TIM17

LL_GTZC1_GRP2_SAI1 GTZC_CFGR2_SAI1_Msk

LL GTZC1 CFGR2 peripheral SAI1

LL_GTZC1_GRP2_SAI2 GTZC_CFGR2_SAI2_Msk

LL GTZC1 CFGR2 peripheral SAI2

LL_GTZC1_GRP2_LTDC_USB GTZC_CFGR2_LTDCUSB_Msk

LL GTZC1 CFGR2 peripheral LTDC or USB

LL_GTZC1_GRP2_DSI GTZC_CFGR2_DSI_Msk

LL GTZC1 CFGR2 peripheral DSI

LL_GTZC1_GRP2_GFXTIM GTZC_CFGR2_GFXTIM_Msk

LL GTZC1 CFGR2 peripheral GFXTIM

LL_GTZC1_GRP2_ALL 0x00000FFFU

LL GTZC1 CFGR2 ALL peripherals

LL_GTZC1_GRP3_MDF1 GTZC_CFGR3_MDF1_Msk

GTZC1 (ILAC/SEC/PRIV)CFGR3 peripheral selection.

LL GTZC1 CFGR3 peripheral MDF1

LL_GTZC1_GRP3_CORDIC GTZC_CFGR3_CORDIC_Msk

LL GTZC1 CFGR3 peripheral CORDIC

LL_GTZC1_GRP3_FMAC GTZC_CFGR3_FMAC_Msk

LL GTZC1 CFGR3 peripheral FMAC

LL_GTZC1_GRP3_CRC GTZC_CFGR3_CRC_Msk

LL GTZC1 CFGR3 peripheral CRC

LL_GTZC1_GRP3_TSC GTZC_CFGR3_TSC_Msk

LL GTZC1 CFGR3 peripheral TSC

LL_GTZC1_GRP3_DMA2D GTZC_CFGR3_DMA2D_Msk

LL GTZC1 CFGR3 peripheral DMAD2

LL_GTZC1_GRP3_ICACHE_REG GTZC_CFGR3_ICACHE_REG_Msk

LL GTZC1 CFGR3 peripheral ICACHE_REG

LL_GTZC1_GRP3_DCACHE1_REG GTZC_CFGR3_DCACHE1_REG_Msk

LL GTZC1 CFGR3 peripheral DCACHE_REG

LL_GTZC1_GRP3_ADC12 GTZC_CFGR3_ADC12_Msk

LL GTZC1 CFGR3 peripheral ADC12

LL_GTZC1_GRP3_DCMI GTZC_CFGR3_DCMI_Msk

LL GTZC1 CFGR3 peripheral DCMI_PSSI

LL_GTZC1_GRP3_OTG GTZC_CFGR3_OTG_Msk

LL GTZC1 CFGR3 peripheral OTG

LL_GTZC1_GRP3_AES GTZC_CFGR3_AES_Msk

LL GTZC1 CFGR3 peripheral AES

LL_GTZC1_GRP3_HASH GTZC_CFGR3_HASH_Msk

LL GTZC1 CFGR3 peripheral HASH

LL_GTZC1_GRP3_RNG GTZC_CFGR3_RNG_Msk

LL GTZC1 CFGR3 peripheral RNG

LL_GTZC1_GRP3_PKA GTZC_CFGR3_PKA_Msk

LL GTZC1 CFGR3 peripheral PKA

LL_GTZC1_GRP3_SAES GTZC_CFGR3_SAES_Msk

LL GTZC1 CFGR3 peripheral SAES

LL_GTZC1_GRP3_OCTOSPIM GTZC_CFGR3_OCTOSPIM_Msk

LL GTZC1 CFGR3 peripheral OCTOSPIM

LL_GTZC1_GRP3_SDMMC1 GTZC_CFGR3_SDMMC1_Msk

LL GTZC1 CFGR3 peripheral SDMMC1

LL_GTZC1_GRP3_SDMMC2 GTZC_CFGR3_SDMMC2_Msk

LL GTZC1 CFGR3 peripheral SDMMC2

LL_GTZC1_GRP3_FSMC_REG GTZC_CFGR3_FSMC_REG_Msk

LL GTZC1 CFGR3 peripheral FSMC_REG

LL_GTZC1_GRP3_OCTOSPI1_REG GTZC_CFGR3_OCTOSPI1_REG_Msk

LL GTZC1 CFGR3 peripheral OCTOSPI1_REG

LL_GTZC1_GRP3_OCTOSPI2_REG GTZC_CFGR3_OCTOSPI2_REG_Msk

LL GTZC1 CFGR3 peripheral OCTOSPI2_REG

LL_GTZC1_GRP3_RAMCFG GTZC_CFGR3_RAMCFG_Msk

LL GTZC1 CFGR3 peripheral RAMCFG

LL_GTZC1_GRP3_GPU2D GTZC_CFGR3_GPU2D_Msk

LL GTZC1 CFGR3 peripheral GPU2D

LL_GTZC1_GRP3_GFXMMU GTZC_CFGR3_GFXMMU_Msk

LL GTZC1 CFGR3 peripheral GFXMMU

LL_GTZC1_GRP3_GFXMMU_REG GTZC_CFGR3_GFXMMU_REG_Msk

LL GTZC1 CFGR3 peripheral GFXMMU_REG

LL_GTZC1_GRP3_HSPI1_REG GTZC_CFGR3_HSPI1_REG_Msk

LL GTZC1 CFGR3 peripheral HSPI1_REG

LL_GTZC1_GRP3_DCACHE2_REG GTZC_CFGR3_DCACHE2_REG_Msk

LL GTZC1 CFGR3 peripheral DCACHE2_REG

LL_GTZC1_GRP3_JPEG GTZC_CFGR3_JPEG_Msk

LL GTZC1 CFGR3 peripheral JPEG

LL_GTZC1_GRP3_ALL 0x1FFFFFFFU

LL GTZC1 CFGR3 ALL peripherals

LL_GTZC1_GRP4_GPDMA1 GTZC_CFGR4_GPDMA1_Msk

GTZC1 (ILAC)CFGR4 peripheral selection.

LL GTZC1 CFGR4 peripheral GPDMA1

LL_GTZC1_GRP4_FLASH_REG GTZC_CFGR4_FLASH_REG_Msk

LL GTZC1 CFGR4 peripheral FLASH_REG

LL_GTZC1_GRP4_FLASH GTZC_CFGR4_FLASH_Msk

LL GTZC1 CFGR4 peripheral FLASH

LL_GTZC1_GRP4_OTFDEC1 GTZC_CFGR4_OTFDEC1_Msk

LL GTZC1 CFGR4 peripheral OTFDEC2

LL_GTZC1_GRP4_OTFDEC2 GTZC_CFGR4_OTFDEC2_Msk

LL GTZC1 CFGR4 peripheral OTFDEC1

LL_GTZC1_GRP4_TZSC1 GTZC_CFGR4_TZSC1_Msk

LL GTZC1 CFGR4 peripheral TZSC1

LL_GTZC1_GRP4_TZIC1 GTZC_CFGR4_TZIC1_Msk

LL GTZC1 CFGR4 peripheral TZIC1

LL_GTZC1_GRP4_OCTOSPI1_MEM GTZC_CFGR4_OCTOSPI1_MEM_Msk

LL GTZC1 CFGR4 peripheral OCTOSPI_MEM

LL_GTZC1_GRP4_FSMC_MEM GTZC_CFGR4_FSMC_MEM_Msk

LL GTZC1 CFGR4 peripheral FSMC_MEM

LL_GTZC1_GRP4_BKPSRAM GTZC_CFGR4_BKPSRAM_Msk

LL GTZC1 CFGR4 peripheral BKPSRAM

LL_GTZC1_GRP4_OCTOSPI2_MEM GTZC_CFGR4_OCTOSPI2_MEM_Msk

LL GTZC1 CFGR4 peripheral OCTOSPI2_MEM

LL_GTZC1_GRP4_HSPI1_MEM GTZC_CFGR4_HSPI1_MEM_Msk

LL GTZC1 CFGR4 peripheral HSPI1_MEM

LL_GTZC1_GRP4_SRAM1 GTZC_CFGR4_SRAM1_Msk

LL GTZC1 CFGR4 peripheral SRAM1

LL_GTZC1_GRP4_MPCBB1_REG GTZC_CFGR4_MPCBB1_REG_Msk

LL GTZC1 CFGR4 peripheral MPCBB1_REG

LL_GTZC1_GRP4_SRAM2 GTZC_CFGR4_SRAM2_Msk

LL GTZC1 CFGR4 peripheral SRAM2

LL_GTZC1_GRP4_MPCBB2_REG GTZC_CFGR4_MPCBB2_REG_Msk

LL GTZC1 CFGR4 peripheral MPCBB2_REG

LL_GTZC1_GRP4_SRAM3 GTZC_CFGR4_SRAM3_Msk

LL GTZC1 CFGR4 peripheral SRAM3

LL_GTZC1_GRP4_MPCBB3_REG GTZC_CFGR4_MPCBB3_REG_Msk

LL GTZC1 CFGR4 peripheral MPCBB3_REG

LL_GTZC1_GRP4_SRAM5 GTZC_CFGR4_SRAM5_Msk

LL GTZC1 CFGR4 peripheral SRAM5

LL_GTZC1_GRP4_MPCBB5_REG GTZC_CFGR4_MPCBB5_REG_Msk

LL GTZC1 CFGR4 peripheral MPCBB5_REG

LL_GTZC1_GRP4_ALL 0xFF1FC01FU

LL GTZC1 CFGR4 ALL peripherals

LL_GTZC2_GRP1_SPI3 GTZC_CFGR1_SPI3_Msk

GTZC2 (ILAC/SEC/PRIV)CFGR2 peripheral selection.

LL GTZC2 CFGR1 peripheral SPI3

LL_GTZC2_GRP1_LPUART1 GTZC_CFGR1_LPUART1_Msk

LL GTZC2 CFGR1 peripheral LPUART1

LL_GTZC2_GRP1_I2C3 GTZC_CFGR1_I2C3_Msk

LL GTZC2 CFGR1 peripheral I2C3

LL_GTZC2_GRP1_LPTIM1 GTZC_CFGR1_LPTIM1_Msk

LL GTZC2 CFGR1 peripheral LPTIM1

LL_GTZC2_GRP1_LPTIM3 GTZC_CFGR1_LPTIM3_Msk

LL GTZC2 CFGR1 peripheral LPTIM3

LL_GTZC2_GRP1_LPTIM4 GTZC_CFGR1_LPTIM4_Msk

LL GTZC2 CFGR1 peripheral LPTIM4

LL_GTZC2_GRP1_OPAMP GTZC_CFGR1_OPAMP_Msk

LL GTZC2 CFGR1 peripheral OPAMP

LL_GTZC2_GRP1_COMP GTZC_CFGR1_COMP_Msk

LL GTZC2 CFGR1 peripheral COMP

LL_GTZC2_GRP1_ADC4 GTZC_CFGR1_ADC4_Msk

LL GTZC2 CFGR1 peripheral ADC4

LL_GTZC2_GRP1_VREFBUF GTZC_CFGR1_VREFBUF_Msk

LL GTZC2 CFGR1 peripheral VREFBUF

LL_GTZC2_GRP1_DAC1 GTZC_CFGR1_DAC1_Msk

LL GTZC2 CFGR1 peripheral DAC1

LL_GTZC2_GRP1_ADF1 GTZC_CFGR1_ADF1_Msk

LL GTZC2 CFGR1 peripheral ADF1

LL_GTZC2_GRP1_ALL 0x00001BFFU

LL GTZC2 CFGR2 ALL peripherals

LL_GTZC2_GRP2_SYSCFG GTZC_CFGR2_SYSCFG_Msk

GTZC2 (ILAC)CFGR2 peripheral selection.

LL GTZC2 CFGR2 peripheral SYSCFG

LL_GTZC2_GRP2_RTC GTZC_CFGR2_RTC_Msk

LL GTZC2 CFGR2 peripheral RTC

LL_GTZC2_GRP2_TAMP GTZC_CFGR2_TAMP_Msk

LL GTZC2 CFGR2 peripheral TAMP

LL_GTZC2_GRP2_PWR GTZC_CFGR2_PWR_Msk

LL GTZC2 CFGR2 peripheral PWR

LL_GTZC2_GRP2_RCC GTZC_CFGR2_RCC_Msk

LL GTZC2 CFGR2 peripheral RCC

LL_GTZC2_GRP2_LPDMA1 GTZC_CFGR2_LPDMA1_Msk

LL GTZC2 CFGR2 peripheral LPDMA1

LL_GTZC2_GRP2_EXTI GTZC_CFGR2_EXTI_Msk

LL GTZC2 CFGR2 peripheral EXTI

LL_GTZC2_GRP2_TZSC2 GTZC_CFGR2_TZSC2_Msk

LL GTZC2 CFGR2 peripheral TZSC2

LL_GTZC2_GRP2_TZIC2 GTZC_CFGR2_TZIC2_Msk

LL GTZC2 CFGR2 peripheral TZIC2

LL_GTZC2_GRP2_SRAM4 GTZC_CFGR2_SRAM4_Msk

LL GTZC2 CFGR2 peripheral SRAM4

LL_GTZC2_GRP2_MPCBB4_REG GTZC_CFGR2_MPCBB4_REG_Msk

LL GTZC2 CFGR2 peripheral MPCBB4_REG

LL_GTZC2_GRP2_ALL 0x0300C07FU

LL GTZC2 CFGR2 ALL peripherals

Watermark Subregion Selection

group GTZC_LL_EC_WatermarkSubRegionSelection

Defines

LL_GTZC_TZSC_MPCWM_SUBREGION_A 0x00U

LL GTZC TZSC Watermark subregion A

LL_GTZC_TZSC_MPCWM_SUBREGION_B 0x01U

LL GTZC TZSC Watermark subregion B

Privilege Attributes Selection

group GTZC_LL_EC_PrivilegeAttributesSelection

Defines

LL_GTZC_ATTR_NPRIV 0x00U

LL GTZC Attribute non-privilege

LL_GTZC_ATTR_PRIV 0x01U

LL GTZC Attribute privilege

Security Attributes Selection

group GTZC_LL_EC_SecurityAttributesSelection

Defines

LL_GTZC_ATTR_NSEC 0x00U

LL GTZC Attribute non-secure

LL_GTZC_ATTR_SEC 0x01U

LL GTZC Attribute secure

Clock Security Inversion

group GTZC_LL_EC_ClockSecurityInversion

Defines

LL_GTZC_MPCBB_CLK_SEC_NOT_INVERTED 0x00U

LL GTZC MPCBB Clock security not inverted

LL_GTZC_MPCBB_CLK_SEC_INVERTED 0x01U

LL GTZC MPCBB Clock security inverted

Secure Access State

group GTZC_LL_EC_SecureAccessState

Defines

LL_GTZC_MPCBB_SEC_ACCESS_NOT_ALLOWED 0x00

LL GTZC MPCBB SECURE ACCESS NOT ALLOWED

LL_GTZC_MPCBB_SEC_ACCESS_ALLOWED 0x01

LL GTZC MPCBB SECURE ACCESS ALLOWED

MPCBB Super Block Attr Selection

group GTZC_LL_EC_MPCBB_Super_Block_Attr_Selection

Defines

LL_GTZC_MPCBB_SUPERBLK_ATTR_0 0U

LL GTZC MPCBB SUPER BLOCK ATTR 0

LL_GTZC_MPCBB_SUPERBLK_ATTR_1 1U

LL GTZC MPCBB SUPER BLOCK ATTR 1

LL_GTZC_MPCBB_SUPERBLK_ATTR_2 2U

LL GTZC MPCBB SUPER BLOCK ATTR 2

LL_GTZC_MPCBB_SUPERBLK_ATTR_3 3U

LL GTZC MPCBB SUPER BLOCK ATTR 3

LL_GTZC_MPCBB_SUPERBLK_ATTR_4 4U

LL GTZC MPCBB SUPER BLOCK ATTR 4

LL_GTZC_MPCBB_SUPERBLK_ATTR_5 5U

LL GTZC MPCBB SUPER BLOCK ATTR 5

LL_GTZC_MPCBB_SUPERBLK_ATTR_6 6U

LL GTZC MPCBB SUPER BLOCK ATTR 6

LL_GTZC_MPCBB_SUPERBLK_ATTR_7 7U

LL GTZC MPCBB SUPER BLOCK ATTR 7

LL_GTZC_MPCBB_SUPERBLK_ATTR_8 8U

LL GTZC MPCBB SUPER BLOCK ATTR 8

LL_GTZC_MPCBB_SUPERBLK_ATTR_9 9U

LL GTZC MPCBB SUPER BLOCK ATTR 9

LL_GTZC_MPCBB_SUPERBLK_ATTR_10 10U

LL GTZC MPCBB SUPER BLOCK ATTR 10

LL_GTZC_MPCBB_SUPERBLK_ATTR_11 11U

LL GTZC MPCBB SUPER BLOCK ATTR 11

LL_GTZC_MPCBB_SUPERBLK_ATTR_12 12U

LL GTZC MPCBB SUPER BLOCK ATTR 12

LL_GTZC_MPCBB_SUPERBLK_ATTR_13 13U

LL GTZC MPCBB SUPER BLOCK ATTR 13

LL_GTZC_MPCBB_SUPERBLK_ATTR_14 14U

LL GTZC MPCBB SUPER BLOCK ATTR 14

LL_GTZC_MPCBB_SUPERBLK_ATTR_15 15U

LL GTZC MPCBB SUPER BLOCK ATTR 15

LL_GTZC_MPCBB_SUPERBLK_ATTR_16 16U

LL GTZC MPCBB SUPER BLOCK ATTR 16

LL_GTZC_MPCBB_SUPERBLK_ATTR_17 17U

LL GTZC MPCBB SUPER BLOCK ATTR 17

LL_GTZC_MPCBB_SUPERBLK_ATTR_18 18U

LL GTZC MPCBB SUPER BLOCK ATTR 18

LL_GTZC_MPCBB_SUPERBLK_ATTR_19 19U

LL GTZC MPCBB SUPER BLOCK ATTR 19

LL_GTZC_MPCBB_SUPERBLK_ATTR_20 20U

LL GTZC MPCBB SUPER BLOCK ATTR 20

LL_GTZC_MPCBB_SUPERBLK_ATTR_21 21U

LL GTZC MPCBB SUPER BLOCK ATTR 21

LL_GTZC_MPCBB_SUPERBLK_ATTR_22 22U

LL GTZC MPCBB SUPER BLOCK ATTR 22

LL_GTZC_MPCBB_SUPERBLK_ATTR_23 23U

LL GTZC MPCBB SUPER BLOCK ATTR 23

LL_GTZC_MPCBB_SUPERBLK_ATTR_24 24U

LL GTZC MPCBB SUPER BLOCK ATTR 24

LL_GTZC_MPCBB_SUPERBLK_ATTR_25 25U

LL GTZC MPCBB SUPER BLOCK ATTR 25

LL_GTZC_MPCBB_SUPERBLK_ATTR_26 26U

LL GTZC MPCBB SUPER BLOCK ATTR 26

LL_GTZC_MPCBB_SUPERBLK_ATTR_27 27U

LL GTZC MPCBB SUPER BLOCK ATTR 27

LL_GTZC_MPCBB_SUPERBLK_ATTR_28 28U

LL GTZC MPCBB SUPER BLOCK ATTR 28

LL_GTZC_MPCBB_SUPERBLK_ATTR_29 29U

LL GTZC MPCBB SUPER BLOCK ATTR 29

LL_GTZC_MPCBB_SUPERBLK_ATTR_30 30U

LL GTZC MPCBB SUPER BLOCK ATTR 30

LL_GTZC_MPCBB_SUPERBLK_ATTR_31 31U

LL GTZC MPCBB SUPER BLOCK ATTR 31

LL_GTZC_MPCBB_SUPERBLK_ATTR_32 32U

LL GTZC MPCBB SUPER BLOCK ATTR 32

LL_GTZC_MPCBB_SUPERBLK_ATTR_33 33U

LL GTZC MPCBB SUPER BLOCK ATTR 33

LL_GTZC_MPCBB_SUPERBLK_ATTR_34 34U

LL GTZC MPCBB SUPER BLOCK ATTR 34

LL_GTZC_MPCBB_SUPERBLK_ATTR_35 35U

LL GTZC MPCBB SUPER BLOCK ATTR 35

LL_GTZC_MPCBB_SUPERBLK_ATTR_36 36U

LL GTZC MPCBB SUPER BLOCK ATTR 36

LL_GTZC_MPCBB_SUPERBLK_ATTR_37 37U

LL GTZC MPCBB SUPER BLOCK ATTR 37

LL_GTZC_MPCBB_SUPERBLK_ATTR_38 38U

LL GTZC MPCBB SUPER BLOCK ATTR 38

LL_GTZC_MPCBB_SUPERBLK_ATTR_39 39U

LL GTZC MPCBB SUPER BLOCK ATTR 39

LL_GTZC_MPCBB_SUPERBLK_ATTR_40 40U

LL GTZC MPCBB SUPER BLOCK ATTR 40

LL_GTZC_MPCBB_SUPERBLK_ATTR_41 41U

LL GTZC MPCBB SUPER BLOCK ATTR 41

LL_GTZC_MPCBB_SUPERBLK_ATTR_42 42U

LL GTZC MPCBB SUPER BLOCK ATTR 42

LL_GTZC_MPCBB_SUPERBLK_ATTR_43 43U

LL GTZC MPCBB SUPER BLOCK ATTR 43

LL_GTZC_MPCBB_SUPERBLK_ATTR_44 44U

LL GTZC MPCBB SUPER BLOCK ATTR 44

LL_GTZC_MPCBB_SUPERBLK_ATTR_45 45U

LL GTZC MPCBB SUPER BLOCK ATTR 45

LL_GTZC_MPCBB_SUPERBLK_ATTR_46 46U

LL GTZC MPCBB SUPER BLOCK ATTR 46

LL_GTZC_MPCBB_SUPERBLK_ATTR_47 47U

LL GTZC MPCBB SUPER BLOCK ATTR 47

LL_GTZC_MPCBB_SUPERBLK_ATTR_48 48U

LL GTZC MPCBB SUPER BLOCK ATTR 48

LL_GTZC_MPCBB_SUPERBLK_ATTR_49 49U

LL GTZC MPCBB SUPER BLOCK ATTR 49

LL_GTZC_MPCBB_SUPERBLK_ATTR_50 50U

LL GTZC MPCBB SUPER BLOCK ATTR 50

LL_GTZC_MPCBB_SUPERBLK_ATTR_51 51U

LL GTZC MPCBB SUPER BLOCK ATTR 51

MPCBB Super Block Lock Selection

group GTZC_LL_EC_MPCBB_Super_Block_Lock_Selection

Defines

LL_GTZC_MPCBB_SUPERBLK_LOCK_0 GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 0

LL_GTZC_MPCBB_SUPERBLK_LOCK_1 GTZC_MPCBB_CFGLOCKR1_SPLCK1_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 1

LL_GTZC_MPCBB_SUPERBLK_LOCK_2 GTZC_MPCBB_CFGLOCKR1_SPLCK2_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 2

LL_GTZC_MPCBB_SUPERBLK_LOCK_3 GTZC_MPCBB_CFGLOCKR1_SPLCK3_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 3

LL_GTZC_MPCBB_SUPERBLK_LOCK_4 GTZC_MPCBB_CFGLOCKR1_SPLCK4_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 4

LL_GTZC_MPCBB_SUPERBLK_LOCK_5 GTZC_MPCBB_CFGLOCKR1_SPLCK5_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 5

LL_GTZC_MPCBB_SUPERBLK_LOCK_6 GTZC_MPCBB_CFGLOCKR1_SPLCK6_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 6

LL_GTZC_MPCBB_SUPERBLK_LOCK_7 GTZC_MPCBB_CFGLOCKR1_SPLCK7_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 7

LL_GTZC_MPCBB_SUPERBLK_LOCK_8 GTZC_MPCBB_CFGLOCKR1_SPLCK8_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 8

LL_GTZC_MPCBB_SUPERBLK_LOCK_9 GTZC_MPCBB_CFGLOCKR1_SPLCK9_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 9

LL_GTZC_MPCBB_SUPERBLK_LOCK_10 GTZC_MPCBB_CFGLOCKR1_SPLCK10_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 10

LL_GTZC_MPCBB_SUPERBLK_LOCK_11 GTZC_MPCBB_CFGLOCKR1_SPLCK11_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 11

LL_GTZC_MPCBB_SUPERBLK_LOCK_12 GTZC_MPCBB_CFGLOCKR1_SPLCK12_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 12

LL_GTZC_MPCBB_SUPERBLK_LOCK_13 GTZC_MPCBB_CFGLOCKR1_SPLCK13_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 13

LL_GTZC_MPCBB_SUPERBLK_LOCK_14 GTZC_MPCBB_CFGLOCKR1_SPLCK14_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 14

LL_GTZC_MPCBB_SUPERBLK_LOCK_15 GTZC_MPCBB_CFGLOCKR1_SPLCK15_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 15

LL_GTZC_MPCBB_SUPERBLK_LOCK_16 GTZC_MPCBB_CFGLOCKR1_SPLCK16_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 16

LL_GTZC_MPCBB_SUPERBLK_LOCK_17 GTZC_MPCBB_CFGLOCKR1_SPLCK17_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 17

LL_GTZC_MPCBB_SUPERBLK_LOCK_18 GTZC_MPCBB_CFGLOCKR1_SPLCK18_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 18

LL_GTZC_MPCBB_SUPERBLK_LOCK_19 GTZC_MPCBB_CFGLOCKR1_SPLCK19_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 19

LL_GTZC_MPCBB_SUPERBLK_LOCK_20 GTZC_MPCBB_CFGLOCKR1_SPLCK20_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 20

LL_GTZC_MPCBB_SUPERBLK_LOCK_21 GTZC_MPCBB_CFGLOCKR1_SPLCK21_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 21

LL_GTZC_MPCBB_SUPERBLK_LOCK_22 GTZC_MPCBB_CFGLOCKR1_SPLCK22_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 22

LL_GTZC_MPCBB_SUPERBLK_LOCK_23 GTZC_MPCBB_CFGLOCKR1_SPLCK23_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 23

LL_GTZC_MPCBB_SUPERBLK_LOCK_24 GTZC_MPCBB_CFGLOCKR1_SPLCK24_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 24

LL_GTZC_MPCBB_SUPERBLK_LOCK_25 GTZC_MPCBB_CFGLOCKR1_SPLCK25_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 25

LL_GTZC_MPCBB_SUPERBLK_LOCK_26 GTZC_MPCBB_CFGLOCKR1_SPLCK26_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 26

LL_GTZC_MPCBB_SUPERBLK_LOCK_27 GTZC_MPCBB_CFGLOCKR1_SPLCK27_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 27

LL_GTZC_MPCBB_SUPERBLK_LOCK_28 GTZC_MPCBB_CFGLOCKR1_SPLCK28_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 28

LL_GTZC_MPCBB_SUPERBLK_LOCK_29 GTZC_MPCBB_CFGLOCKR1_SPLCK29_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 29

LL_GTZC_MPCBB_SUPERBLK_LOCK_30 GTZC_MPCBB_CFGLOCKR1_SPLCK30_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 30

LL_GTZC_MPCBB_SUPERBLK_LOCK_31 GTZC_MPCBB_CFGLOCKR1_SPLCK31_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 31

LL_GTZC_MPCBB_SUPERBLK_LOCK_32 GTZC_MPCBB_CFGLOCKR2_SPLCK32_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 32

LL_GTZC_MPCBB_SUPERBLK_LOCK_33 GTZC_MPCBB_CFGLOCKR2_SPLCK33_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 33

LL_GTZC_MPCBB_SUPERBLK_LOCK_34 GTZC_MPCBB_CFGLOCKR2_SPLCK34_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 34

LL_GTZC_MPCBB_SUPERBLK_LOCK_35 GTZC_MPCBB_CFGLOCKR2_SPLCK35_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 35

LL_GTZC_MPCBB_SUPERBLK_LOCK_36 GTZC_MPCBB_CFGLOCKR2_SPLCK36_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 36

LL_GTZC_MPCBB_SUPERBLK_LOCK_37 GTZC_MPCBB_CFGLOCKR2_SPLCK37_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 37

LL_GTZC_MPCBB_SUPERBLK_LOCK_38 GTZC_MPCBB_CFGLOCKR2_SPLCK38_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 38

LL_GTZC_MPCBB_SUPERBLK_LOCK_39 GTZC_MPCBB_CFGLOCKR2_SPLCK39_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 39

LL_GTZC_MPCBB_SUPERBLK_LOCK_40 GTZC_MPCBB_CFGLOCKR2_SPLCK40_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 40

LL_GTZC_MPCBB_SUPERBLK_LOCK_41 GTZC_MPCBB_CFGLOCKR2_SPLCK41_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 41

LL_GTZC_MPCBB_SUPERBLK_LOCK_42 GTZC_MPCBB_CFGLOCKR2_SPLCK42_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 42

LL_GTZC_MPCBB_SUPERBLK_LOCK_43 GTZC_MPCBB_CFGLOCKR2_SPLCK43_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 43

LL_GTZC_MPCBB_SUPERBLK_LOCK_44 GTZC_MPCBB_CFGLOCKR2_SPLCK44_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 44

LL_GTZC_MPCBB_SUPERBLK_LOCK_45 GTZC_MPCBB_CFGLOCKR2_SPLCK45_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 45

LL_GTZC_MPCBB_SUPERBLK_LOCK_46 GTZC_MPCBB_CFGLOCKR2_SPLCK46_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 46

LL_GTZC_MPCBB_SUPERBLK_LOCK_47 GTZC_MPCBB_CFGLOCKR2_SPLCK47_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 47

LL_GTZC_MPCBB_SUPERBLK_LOCK_48 GTZC_MPCBB_CFGLOCKR2_SPLCK48_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 48

LL_GTZC_MPCBB_SUPERBLK_LOCK_49 GTZC_MPCBB_CFGLOCKR2_SPLCK49_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 49

LL_GTZC_MPCBB_SUPERBLK_LOCK_50 GTZC_MPCBB_CFGLOCKR2_SPLCK50_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 50

LL_GTZC_MPCBB_SUPERBLK_LOCK_51 GTZC_MPCBB_CFGLOCKR2_SPLCK51_Msk

LL GTZC MPCBB SUPER BLOCK LOCK 51

MPCBB Block Selection

group GTZC_LL_EC_MPCBB_Block_Selection

Defines

LL_GTZC_MPCBB_BLK_0 0x00000001U

LL GTZC MPCBB BLOCK 0

LL_GTZC_MPCBB_BLK_1 0x00000002U

LL GTZC MPCBB BLOCK 1

LL_GTZC_MPCBB_BLK_2 0x00000004U

LL GTZC MPCBB BLOCK 2

LL_GTZC_MPCBB_BLK_3 0x00000008U

LL GTZC MPCBB BLOCK 3

LL_GTZC_MPCBB_BLK_4 0x00000010U

LL GTZC MPCBB BLOCK 4

LL_GTZC_MPCBB_BLK_5 0x00000020U

LL GTZC MPCBB BLOCK 5

LL_GTZC_MPCBB_BLK_6 0x00000040U

LL GTZC MPCBB BLOCK 6

LL_GTZC_MPCBB_BLK_7 0x00000080U

LL GTZC MPCBB BLOCK 7

LL_GTZC_MPCBB_BLK_8 0x00000100U

LL GTZC MPCBB BLOCK 8

LL_GTZC_MPCBB_BLK_9 0x00000200U

LL GTZC MPCBB BLOCK 9

LL_GTZC_MPCBB_BLK_10 0x00000400U

LL GTZC MPCBB BLOCK 10

LL_GTZC_MPCBB_BLK_11 0x00000800U

LL GTZC MPCBB BLOCK 11

LL_GTZC_MPCBB_BLK_12 0x00001000U

LL GTZC MPCBB BLOCK 12

LL_GTZC_MPCBB_BLK_13 0x00002000U

LL GTZC MPCBB BLOCK 13

LL_GTZC_MPCBB_BLK_14 0x00004000U

LL GTZC MPCBB BLOCK 14

LL_GTZC_MPCBB_BLK_15 0x00008000U

LL GTZC MPCBB BLOCK 15

LL_GTZC_MPCBB_BLK_16 0x00010000U

LL GTZC MPCBB BLOCK 16

LL_GTZC_MPCBB_BLK_17 0x00020000U

LL GTZC MPCBB BLOCK 17

LL_GTZC_MPCBB_BLK_18 0x00040000U

LL GTZC MPCBB BLOCK 18

LL_GTZC_MPCBB_BLK_19 0x00080000U

LL GTZC MPCBB BLOCK 19

LL_GTZC_MPCBB_BLK_20 0x00100000U

LL GTZC MPCBB BLOCK 20

LL_GTZC_MPCBB_BLK_21 0x00200000U

LL GTZC MPCBB BLOCK 21

LL_GTZC_MPCBB_BLK_22 0x00400000U

LL GTZC MPCBB BLOCK 22

LL_GTZC_MPCBB_BLK_23 0x00800000U

LL GTZC MPCBB BLOCK 23

LL_GTZC_MPCBB_BLK_24 0x01000000U

LL GTZC MPCBB BLOCK 24

LL_GTZC_MPCBB_BLK_25 0x02000000U

LL GTZC MPCBB BLOCK 25

LL_GTZC_MPCBB_BLK_26 0x04000000U

LL GTZC MPCBB BLOCK 26

LL_GTZC_MPCBB_BLK_27 0x08000000U

LL GTZC MPCBB BLOCK 27

LL_GTZC_MPCBB_BLK_28 0x10000000U

LL GTZC MPCBB BLOCK 28

LL_GTZC_MPCBB_BLK_29 0x20000000U

LL GTZC MPCBB BLOCK 29

LL_GTZC_MPCBB_BLK_30 0x40000000U

LL GTZC MPCBB BLOCK 30

LL_GTZC_MPCBB_BLK_31 0x80000000U

LL GTZC MPCBB BLOCK 31