Reference Manual to LL API cross reference

The following table provides the mapping between the registers and bits, as they appear inside product reference manual, and the functions provided by the Low Layer interface.

This table gives the correlation for I2C registers

Register

Bit

Function

AUTOCR

TRIGEN

AUTOCR

TRIGPOL

AUTOCR

TRIGSEL

CR1

ADDRACLR

CR1

ADDRIE

CR1

ALERTEN

CR1

ANFOFF

CR1

DNF

CR1

ERRIE

CR1

FMP

CR1

GCEN

CR1

NACKIE

CR1

NOSTRETCH

CR1

PE

CR1

PECEN

CR1

RXDMAEN

CR1

RXIE

CR1

SBC

CR1

SMBDEN

CR1

SMBHEN

CR1

STOPFACLR

CR1

STOPIE

CR1

TCIE

CR1

TXDMAEN

CR1

TXIE

CR1

WUPEN

CR2

ADD10

CR2

AUTOEND

CR2

HEAD10R

CR2

NACK

CR2

NBYTES

CR2

PECBYTE

CR2

RD_WRN

CR2

RELOAD

CR2

SADD

CR2

START

CR2

STOP

ICR

ADDRCF

ICR

ALERTCF

ICR

ARLOCF

ICR

BERRCF

ICR

NACKCF

ICR

OVRCF

ICR

PECCF

ICR

STOPCF

ICR

TIMOUTCF

ISR

ADDCODE

ISR

ADDR

ISR

ALERT

ISR

ARLO

ISR

BERR

ISR

BUSY

ISR

DIR

ISR

I2C_ISR_ADDR

ISR

I2C_ISR_ALERT

ISR

I2C_ISR_ARLO

ISR

I2C_ISR_BERR

ISR

I2C_ISR_BUSY

ISR

I2C_ISR_DIR

ISR

I2C_ISR_NACKF

ISR

I2C_ISR_OVR

ISR

I2C_ISR_PECERR

ISR

I2C_ISR_RXNE

ISR

I2C_ISR_STOPF

ISR

I2C_ISR_TC

ISR

I2C_ISR_TCR

ISR

I2C_ISR_TIMEOUT

ISR

I2C_ISR_TXE

ISR

I2C_ISR_TXIS

ISR

NACKF

ISR

OVR

ISR

PECERR

ISR

RXNE

ISR

STOPF

ISR

TC

ISR

TCR

ISR

TIMEOUT

ISR

TXE

ISR

TXIS

OAR1

OA1

OAR1

OA1EN

OAR1

OA1MODE

OAR2

OA2

OAR2

OA2EN

OAR2

OA2MSK

PECR

PEC

RXDR

RXDATA

TIMEOUTR

TEXTEN

TIMEOUTR

TIDLE

TIMEOUTR

TIMEOUTA

TIMEOUTR

TIMEOUTB

TIMEOUTR

TIMOUTEN

TIMINGR

PRESC

TIMINGR

SCLDEL

TIMINGR

SCLH

TIMINGR

SCLL

TIMINGR

SDADEL

TIMINGR

TIMINGR

TXDR

TXDATA