LL PWR Constants

Clear flags defines

group PWR_LL_EC_CLEAR_FLAG

Flags defines which can be used with LL_PWR_WRITE_REG function.

Defines

LL_PWR_SR_CSSF PWR_SR_CSSF

Clear Stop and Standby flags

LL_PWR_WUSCR_CWUF1 PWR_WUSCR_CWUF1

Clear Wakeup flag 1

LL_PWR_WUSCR_CWUF2 PWR_WUSCR_CWUF2

Clear Wakeup flag 2

LL_PWR_WUSCR_CWUF3 PWR_WUSCR_CWUF3

Clear Wakeup flag 3

LL_PWR_WUSCR_CWUF4 PWR_WUSCR_CWUF4

Clear Wakeup flag 4

LL_PWR_WUSCR_CWUF5 PWR_WUSCR_CWUF5

Clear Wakeup flag 5

LL_PWR_WUSCR_CWUF6 PWR_WUSCR_CWUF6

Clear Wakeup flag 6

LL_PWR_WUSCR_CWUF7 PWR_WUSCR_CWUF7

Clear Wakeup flag 7

LL_PWR_WUSCR_CWUF8 PWR_WUSCR_CWUF8

Clear Wakeup flag 8

LL_PWR_WUSCR_CWUF_ALL PWR_WUSCR_CWUF

Clear all Wakeup flags

Get flags defines

group PWR_LL_EC_GET_FLAG

Flags defines which can be used with LL_PWR_READ_REG function.

Defines

LL_PWR_FLAG_VOSRDY PWR_VOSR_VOSRDY

Voltage scaling ready flag

LL_PWR_FLAG_BOOSTRDY PWR_VOSR_BOOSTRDY

VOS EPOD booster ready flag

LL_PWR_FLAG_USBBOOSTRDY PWR_VOSR_USBBOOSTRDY

USB EPOD booster ready flag

LL_PWR_FLAG_STOPF PWR_SR_STOPF

Stop flag

LL_PWR_FLAG_SBF PWR_SR_SBF

Standby flag

LL_PWR_FLAG_VDDA2RDY PWR_SVMSR_VDDA2RDY

VDDA ready flag (versus 1.8 V threshold)

LL_PWR_FLAG_VDDA1RDY PWR_SVMSR_VDDA1RDY

VDDA ready flag (versus 1.6 V threshold)

LL_PWR_FLAG_VDDIO2RDY PWR_SVMSR_VDDIO2RDY

VDDIO2 ready flag

LL_PWR_FLAG_VDDUSBRDY PWR_SVMSR_VDDUSBRDY

VDDUSB ready flag

LL_PWR_FLAG_ACTVOSRDY PWR_SVMSR_ACTVOSRDY

Currently applied VOS ready flag

LL_PWR_FLAG_PVDO PWR_SVMSR_PVDO

VDD voltage detector output flag

LL_PWR_FLAG_REGS PWR_SVMSR_REGS

Regulator selection flag

LL_PWR_FLAG_TEMPH PWR_BDSR_TEMPH

Temperature level flag (versus high threshold)

LL_PWR_FLAG_TEMPL PWR_BDSR_TEMPL

Temperature level flag (versus low threshold)

LL_PWR_FLAG_VBATH PWR_BDSR_VBATH

Backup domain voltage level flag (versus high threshold)

LL_PWR_WAKEUP_FLAG1 PWR_WUSR_WUF1

Wakeup flag 1

LL_PWR_WAKEUP_FLAG2 PWR_WUSR_WUF2

Wakeup flag 2

LL_PWR_WAKEUP_FLAG3 PWR_WUSR_WUF3

Wakeup flag 3

LL_PWR_WAKEUP_FLAG4 PWR_WUSR_WUF4

Wakeup flag 4

LL_PWR_WAKEUP_FLAG5 PWR_WUSR_WUF5

Wakeup flag 5

LL_PWR_WAKEUP_FLAG6 PWR_WUSR_WUF6

Wakeup flag 6

LL_PWR_WAKEUP_FLAG7 PWR_WUSR_WUF7

Wakeup flag 7

LL_PWR_WAKEUP_FLAG8 PWR_WUSR_WUF8

Wakeup flag 8

Low power mode selection

group PWR_LL_EC_LOW_POWER_MODE_SELCTION

Defines

LL_PWR_STOP0_MODE 0U

Stop 0 mode

LL_PWR_STOP1_MODE PWR_CR1_LPMS_0

Stop 1 mode

LL_PWR_STOP2_MODE PWR_CR1_LPMS_1

Stop 2 mode

LL_PWR_STOP3_MODE (PWR_CR1_LPMS_0 | PWR_CR1_LPMS_1)

Stop 3 mode

LL_PWR_STANDBY_MODE PWR_CR1_LPMS_2

Standby mode

LL_PWR_SHUTDOWN_MODE (PWR_CR1_LPMS_2 | PWR_CR1_LPMS_1)

Shutdown mode

PWR Mode selection

group PWR_LL_EC_MODE_SELECTION

Defines

LL_PWR_MEMORIES_RUN_MODE ((uint32_t)&(PWR->CR1))

Memories Run mode

LL_PWR_MEMORIES_LP_MODE ((uint32_t)&(PWR->CR2))

Memories Low Power mode

Core sleep mode

group PWR_LL_EC_CORE_SLEEP_MODE

Defines

LL_PWR_CORE_SLEEP 0U

Core sleep mode

LL_PWR_CORE_DEEP_SLEEP SCB_SCR_SLEEPDEEP_Msk

Core deep sleep mode

PWR SRAM2 Content retention in Standby mode

group PWR_LL_EC_SRAM2_SB_CONTENTS_RETENTION

Note

For some products of the U5 family (please see the Reference Manual), the SRAM2 content is preserved based on the same defines in Stop 3 mode.

Defines

LL_PWR_SRAM2_SB_NO_RETENTION 0U

SRAM2 no retention in Stop 3 and Standby mode

LL_PWR_SRAM2_SB_PAGE1_RETENTION PWR_CR1_RRSB1

SRAM2 page 1 (8 KB) retention in Stop 3 and Standby mode

LL_PWR_SRAM2_SB_PAGE2_RETENTION PWR_CR1_RRSB2

SRAM2 page 2 (54 KB) retention in Stop 3 and Standby mode

LL_PWR_SRAM2_SB_FULL_RETENTION (PWR_CR1_RRSB1 | PWR_CR1_RRSB2)

SRAM2 all pages retention in Stop 3 and Standby mode

Brownout reset in Standby mode

group PWR_LL_EC_BOR_MODE_STANDBY

Defines

LL_PWR_BOR_CONTINUOUS_MODE 0U

BOR continuous mode

LL_PWR_BOR_DISCONTINUOUS_MODE PWR_CR1_ULPMEN

BOR discontinuous mode

PWR SRAM1 Content retention in Stop mode

group PWR_LL_EC_SRAM1_STOP_CONTENTS_RETENTION

Defines

LL_PWR_SRAM1_STOP_NO_RETENTION 0U

SRAM1 no retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM1_STOP_PAGE1_RETENTION PWR_CR2_SRAM1PDS1

SRAM1 page 1 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM1_STOP_PAGE2_RETENTION PWR_CR2_SRAM1PDS2

SRAM1 page 2 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM1_STOP_PAGE3_RETENTION PWR_CR2_SRAM1PDS3

SRAM1 page 3 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM1_STOP_PAGE4_RETENTION PWR_CR4_SRAM1PDS4

SRAM1 page 4 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM1_STOP_PAGE5_RETENTION PWR_CR4_SRAM1PDS5

SRAM1 page 5 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM1_STOP_PAGE6_RETENTION PWR_CR4_SRAM1PDS6

SRAM1 page 6 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM1_STOP_PAGE7_RETENTION PWR_CR4_SRAM1PDS7

SRAM1 page 7 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM1_STOP_PAGE8_RETENTION PWR_CR4_SRAM1PDS8

SRAM1 page 8 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM1_STOP_PAGE9_RETENTION PWR_CR4_SRAM1PDS9

SRAM1 page 9 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM1_STOP_PAGE10_RETENTION PWR_CR4_SRAM1PDS10

SRAM1 page 10 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM1_STOP_PAGE11_RETENTION PWR_CR4_SRAM1PDS11

SRAM1 page 11 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM1_STOP_PAGE12_RETENTION PWR_CR4_SRAM1PDS12

SRAM1 page 12 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM1_STOP_1_3_RETENTION

(PWR_CR2_SRAM1PDS1 | PWR_CR2_SRAM1PDS2 | \

PWR_CR2_SRAM1PDS3)


SRAM1 pages (1 to 3) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM1_STOP_4_12_RETENTION

(PWR_CR4_SRAM1PDS4 | PWR_CR4_SRAM1PDS5 | \

PWR_CR4_SRAM1PDS6 | PWR_CR4_SRAM1PDS7 | \

PWR_CR4_SRAM1PDS8 | PWR_CR4_SRAM1PDS9 | \

PWR_CR4_SRAM1PDS10 | PWR_CR4_SRAM1PDS11 | \

PWR_CR4_SRAM1PDS12)


SRAM1 pages (4 to 12) retention in Stop mode (Stop 0, 1, 2, 3)

PWR SRAM2 Content retention in Stop mode

group PWR_LL_EC_SRAM2_STOP_CONTENTS_RETENTION

Defines

LL_PWR_SRAM2_STOP_NO_RETENTION 0U

SRAM2 no retention in Stop mode (Stop 0, 1, 2)

LL_PWR_SRAM2_STOP_PAGE1_RETENTION PWR_CR2_SRAM2PDS1

SRAM2 page 1 (8 KB) retention in Stop mode (Stop 0, 1, 2)

LL_PWR_SRAM2_STOP_PAGE2_RETENTION PWR_CR2_SRAM2PDS2

SRAM2 page 2 (54 KB) retention in Stop mode (Stop 0, 1, 2)

LL_PWR_SRAM2_STOP_FULL_RETENTION (PWR_CR2_SRAM2PDS1 | PWR_CR2_SRAM2PDS2)

SRAM2 all pages retention in Stop mode (Stop 0, 1, 2)

PWR SRAM3 Content retention in Stop mode

group PWR_LL_EC_SRAM3_STOP_CONTENTS_RETENTION

Defines

LL_PWR_SRAM3_STOP_NO_RETENTION 0U

SRAM3 no retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM3_STOP_PAGE1_RETENTION PWR_CR2_SRAM3PDS1

SRAM3 page 1 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM3_STOP_PAGE2_RETENTION PWR_CR2_SRAM3PDS2

SRAM3 page 2 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM3_STOP_PAGE3_RETENTION PWR_CR2_SRAM3PDS3

SRAM3 page 3 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM3_STOP_PAGE4_RETENTION PWR_CR2_SRAM3PDS4

SRAM3 page 4 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM3_STOP_PAGE5_RETENTION PWR_CR2_SRAM3PDS5

SRAM3 page 5 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM3_STOP_PAGE6_RETENTION PWR_CR2_SRAM3PDS6

SRAM3 page 6 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM3_STOP_PAGE7_RETENTION PWR_CR2_SRAM3PDS7

SRAM3 page 7 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM3_STOP_PAGE8_RETENTION PWR_CR2_SRAM3PDS8

SRAM3 page 8 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM3_STOP_PAGE9_RETENTION PWR_CR4_SRAM3PDS9

SRAM3 page 9 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM3_STOP_PAGE10_RETENTION PWR_CR4_SRAM3PDS10

SRAM3 page 10 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM3_STOP_PAGE11_RETENTION PWR_CR4_SRAM3PDS11

SRAM3 page 11 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM3_STOP_PAGE12_RETENTION PWR_CR4_SRAM3PDS12

SRAM3 page 12 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM3_STOP_PAGE13_RETENTION PWR_CR4_SRAM3PDS13

SRAM3 page 13 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM3_STOP_1_8_RETENTION

(PWR_CR2_SRAM3PDS1 | PWR_CR2_SRAM3PDS2 | PWR_CR2_SRAM3PDS3 | \

PWR_CR2_SRAM3PDS4 | PWR_CR2_SRAM3PDS5 | PWR_CR2_SRAM3PDS6 | \

PWR_CR2_SRAM3PDS7 | PWR_CR2_SRAM3PDS8)


SRAM3 pages (1 to 8) retention in Stop modes (Stop 0, 1, 2, 3)

LL_PWR_SRAM3_STOP_9_13_RETENTION

(PWR_CR4_SRAM3PDS9 | PWR_CR4_SRAM3PDS10 | PWR_CR4_SRAM3PDS11 | \

PWR_CR4_SRAM3PDS12 | PWR_CR4_SRAM3PDS13)


SRAM3 pages (9 to 13) retention in Stop modes (Stop 0, 1, 2, 3)

PWR SRAM4 Content retention in Stop mode

group PWR_LL_EC_SRAM4_STOP_CONTENTS_RETENTION

Defines

LL_PWR_SRAM4_STOP_NO_RETENTION 0U

SRAM4 no retention in Stop mode (Stop 0, 1, 2)

LL_PWR_SRAM4_STOP_FULL_RETENTION PWR_CR2_SRAM4PDS

SRAM4 retention in Stop mode (Stop 0, 1, 2)

PWR SRAM5 Content retention in Stop mode

group PWR_LL_EC_SRAM5_STOP_CONTENTS_RETENTION

Defines

LL_PWR_SRAM5_STOP_NO_RETENTION 0U

SRAM5 no retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM5_STOP_PAGE1_RETENTION PWR_CR4_SRAM5PDS1

SRAM5 page 1 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM5_STOP_PAGE2_RETENTION PWR_CR4_SRAM5PDS2

SRAM5 page 2 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM5_STOP_PAGE3_RETENTION PWR_CR4_SRAM5PDS3

SRAM5 page 3 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM5_STOP_PAGE4_RETENTION PWR_CR4_SRAM5PDS4

SRAM5 page 4 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM5_STOP_PAGE5_RETENTION PWR_CR4_SRAM5PDS5

SRAM5 page 5 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM5_STOP_PAGE6_RETENTION PWR_CR4_SRAM5PDS6

SRAM5 page 6 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM5_STOP_PAGE7_RETENTION PWR_CR4_SRAM5PDS7

SRAM5 page 7 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM5_STOP_PAGE8_RETENTION PWR_CR4_SRAM5PDS8

SRAM5 page 8 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM5_STOP_PAGE9_RETENTION PWR_CR4_SRAM5PDS9

SRAM5 page 4 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM5_STOP_PAGE10_RETENTION PWR_CR4_SRAM5PDS10

SRAM5 page 5 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM5_STOP_PAGE11_RETENTION PWR_CR4_SRAM5PDS11

SRAM5 page 6 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM5_STOP_PAGE12_RETENTION PWR_CR4_SRAM5PDS12

SRAM5 page 7 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM5_STOP_PAGE13_RETENTION PWR_CR4_SRAM5PDS13

SRAM5 page 8 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM5_STOP_FULL_RETENTION

(PWR_CR4_SRAM5PDS1 | PWR_CR4_SRAM5PDS2 | PWR_CR4_SRAM5PDS3 | \

PWR_CR4_SRAM5PDS4 | PWR_CR4_SRAM5PDS5 | PWR_CR4_SRAM5PDS6 | \

PWR_CR4_SRAM5PDS7 | PWR_CR4_SRAM5PDS8 | PWR_CR4_SRAM5PDS9 | \

PWR_CR4_SRAM5PDS10 | PWR_CR4_SRAM5PDS11 | PWR_CR4_SRAM5PDS12 | \

PWR_CR4_SRAM5PDS13)


SRAM5 pages (1 to 13) retention in Stop modes (Stop 0, 1, 2, 3)

PWR SRAM6 Content retention in Stop mode

group PWR_LL_EC_SRAM6_STOP_CONTENTS_RETENTION

Defines

LL_PWR_SRAM6_STOP_NO_RETENTION 0U

SRAM6 no retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM6_STOP_PAGE1_RETENTION PWR_CR5_SRAM6PDS1

SRAM6 page 1 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM6_STOP_PAGE2_RETENTION PWR_CR5_SRAM6PDS2

SRAM6 page 2 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM6_STOP_PAGE3_RETENTION PWR_CR5_SRAM6PDS3

SRAM6 page 3 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM6_STOP_PAGE4_RETENTION PWR_CR5_SRAM6PDS4

SRAM6 page 4 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM6_STOP_PAGE5_RETENTION PWR_CR5_SRAM6PDS5

SRAM6 page 5 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM6_STOP_PAGE6_RETENTION PWR_CR5_SRAM6PDS6

SRAM6 page 6 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM6_STOP_PAGE7_RETENTION PWR_CR5_SRAM6PDS7

SRAM6 page 7 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM6_STOP_PAGE8_RETENTION PWR_CR5_SRAM6PDS8

SRAM6 page 8 (64 KB) retention in Stop mode (Stop 0, 1, 2, 3)

LL_PWR_SRAM6_STOP_FULL_RETENTION

(PWR_CR5_SRAM6PDS1 | PWR_CR5_SRAM6PDS2 | PWR_CR5_SRAM6PDS3 | \

PWR_CR5_SRAM6PDS4 | PWR_CR5_SRAM6PDS5 | PWR_CR5_SRAM6PDS6 | \

PWR_CR5_SRAM6PDS7 | PWR_CR5_SRAM6PDS8)


SRAM6 pages (1 to 8) retention in Stop modes (Stop 0, 1, 2, 3)

PWR ICACHE Content retention in Stop mode

group PWR_LL_EC_ICACHERAM_STOP_CONTENTS_RETENTION

Defines

LL_PWR_ICACHERAM_STOP_NO_RETENTION 0U

ICACHE SRAM no retention in Stop mode (Stop 0, 1, 2)

LL_PWR_ICACHERAM_STOP_FULL_RETENTION PWR_CR2_ICRAMPDS

ICACHE SRAM retention in Stop mode (Stop 0, 1, 2)

PWR DCACHE1 Content retention in Stop mode

group PWR_LL_EC_DCACHE1RAM_STOP_CONTENTS_RETENTION

Defines

LL_PWR_DCACHE1RAM_STOP_NO_RETENTION 0U

DCACHE1 SRAM no retention in Stop mode (Stop 0, 1, 2)

LL_PWR_DCACHE1RAM_STOP_FULL_RETENTION PWR_CR2_DC1RAMPDS

DCACHE1 SRAM retention in Stop mode (Stop 0, 1, 2)

PWR DCACHE2 Content retention in Stop mode

group PWR_LL_EC_DCACHE2RAM_STOP_CONTENTS_RETENTION

Defines

LL_PWR_DCACHE2RAM_STOP_NO_RETENTION 0U

DCACHE2 SRAM no retention in Stop mode (Stop 0, 1, 2)

LL_PWR_DCACHE2RAM_STOP_FULL_RETENTION PWR_CR2_DC2RAMPDS

DCACHE2 SRAM retention in Stop mode (Stop 0, 1, 2)

PWR DMA2DRAM Content retention in Stop mode

group PWR_LL_EC_DMA2DRAM_STOP_CONTENTS_RETENTION

Defines

LL_PWR_DMA2DRAM_STOP_NO_RETENTION 0U

DMA2D SRAM no retention in Stop mode (Stop 0, 1, 2)

LL_PWR_DMA2DRAM_STOP_FULL_RETENTION PWR_CR2_DMA2DRAMPDS

DMA2D SRAM retention in Stop mode (Stop 0, 1, 2)

PWR PERIPHRAM Content retention in Stop mode

group PWR_LL_EC_PERIPHRAM_STOP_CONTENTS_RETENTION

Defines

LL_PWR_PERIPHRAM_STOP_NO_RETENTION 0U

FMAC, FDCAN and USB SRAM no retention in Stop mode (Stop 0, 1, 2)

LL_PWR_PERIPHRAM_STOP_FULL_RETENTION PWR_CR2_PRAMPDS

FMAC, FDCAN and USB SRAM retention in Stop mode (Stop 0, 1, 2)

PWR PKARAM Content retention in Stop mode

group PWR_LL_EC_PKARAM_STOP_CONTENTS_RETENTION

Defines

LL_PWR_PKARAM_STOP_NO_RETENTION 0U

PKA32 SRAM no retention in Stop mode (Stop 0, 1, 2)

LL_PWR_PKARAM_STOP_FULL_RETENTION PWR_CR2_PKARAMPDS

PKA32 SRAM retention in Stop mode (Stop 0, 1, 2)

PWR GPRAM Content retention in Stop mode

group PWR_LL_EC_GPRAM_STOP_CONTENTS_RETENTION

Defines

LL_PWR_GRAPHICPERIPHRAM_STOP_NO_RETENTION 0U

Graphic peripherals (LTDC, GFXMMU) SRAM no retention in Stop mode (Stop 0, 1, 2)

LL_PWR_GRAPHICPERIPHRAM_STOP_FULL_RETENTION PWR_CR2_GPRAMPDS

Graphic peripherals (LTDC, GFXMMU) SRAM retention in Stop mode (Stop 0, 1, 2)

PWR DSI RAM Content retention in Stop mode

group PWR_LL_EC_DSIRAM_STOP_CONTENTS_RETENTION

Defines

LL_PWR_DSIRAM_STOP_NO_RETENTION 0U

DSI SRAM no retention in Stop mode (Stop 0, 1, 2)

LL_PWR_DSIRAM_STOP_FULL_RETENTION PWR_CR2_DSIRAMPDS

DSI SRAM retention in Stop mode (Stop 0, 1, 2)

PWR JPEG RAM Content retention in Stop mode

group PWR_LL_EC_JPEGRAM_STOP_CONTENTS_RETENTION

Defines

LL_PWR_JPEGRAM_STOP_NO_RETENTION 0U

JPEG SRAM no retention in Stop mode (Stop 0, 1, 2)

LL_PWR_JPEGRAM_STOP_FULL_RETENTION PWR_CR2_JPEGRAMPDS

JPEG SRAM retention in Stop mode (Stop 0, 1, 2)

PWR SRAM1 Content retention in Run mode

group PWR_LL_EC_SRAM1_RUN_CONTENTS_RETENTION

Defines

LL_PWR_SRAM1_RUN_NO_RETENTION 0U

SRAM1 no retention in Run mode

LL_PWR_SRAM1_RUN_FULL_RETENTION PWR_CR1_SRAM1PD

SRAM1 retention in Run mode

PWR SRAM2 Content retention in Run mode

group PWR_LL_EC_SRAM2_RUN_CONTENTS_RETENTION

Defines

LL_PWR_SRAM2_RUN_NO_RETENTION 0U

SRAM2 no retention in Run mode

LL_PWR_SRAM2_RUN_FULL_RETENTION PWR_CR1_SRAM2PD

SRAM2 retention in Run mode

PWR SRAM3 Content retention in Run mode

group PWR_LL_EC_SRAM3_RUN_CONTENTS_RETENTION

Defines

LL_PWR_SRAM3_RUN_NO_RETENTION 0U

SRAM3 no retention in Run mode

LL_PWR_SRAM3_RUN_FULL_RETENTION PWR_CR1_SRAM3PD

SRAM3 retention in Run mode

PWR SRAM4 Content retention in Run mode

group PWR_LL_EC_SRAM4_RUN_CONTENTS_RETENTION

Defines

LL_PWR_SRAM4_RUN_NO_RETENTION 0U

SRAM4 no retention in Run mode

LL_PWR_SRAM4_RUN_FULL_RETENTION PWR_CR1_SRAM4PD

SRAM4 retention in Run mode

PWR SRAM5 Content retention in Run mode

group PWR_LL_EC_SRAM5_RUN_CONTENTS_RETENTION

Defines

LL_PWR_SRAM5_RUN_NO_RETENTION 0U

SRAM5 no retention in Run mode

LL_PWR_SRAM5_RUN_FULL_RETENTION PWR_CR1_SRAM5PD

SRAM5 retention in Run mode

PWR SRAM6 Content retention in Run mode

group PWR_LL_EC_SRAM6_RUN_CONTENTS_RETENTION

Defines

LL_PWR_SRAM6_RUN_NO_RETENTION 0U

SRAM6 no retention in Run mode

LL_PWR_SRAM6_RUN_FULL_RETENTION PWR_CR1_SRAM6PD

SRAM6 retention in Run mode

PWR flash and SRAM4 memory fast Wakeup

group PWR_LL_EC_FLASH_SRAM4_FAST_WAKEUP

Defines

LL_PWR_FLASHFWU PWR_CR2_FLASHFWU

Flash memory fast wakeup from Stop modes (Stop 0, 1)

LL_PWR_SRAM4FWU PWR_CR2_SRAM4FWU

SRAM4 memory fast wakeup from Stop modes (Stop 0, 1, 2)

LL_PWR_MEMORIESFWU (PWR_CR2_FLASHFWU | PWR_CR2_SRAM4FWU)

All memories fast wakeup from Stop modes

PWR Smart Run Domain mode

group PWR_LL_EC_SRD_MODE

Defines

LL_PWR_SRD_STOP_MODE 0U

SmartRun domain AHB3 and APB3 clocks disabled by default in Stop mode (Stop 0, 1, 2)

LL_PWR_SRD_RUN_MODE PWR_CR2_SRDRUN

SmartRun domain AHB3 and APB3 clocks kept enabled in Stop mode (Stop 0, 1, 2)

PWR Regulator supply selection

group PWR_LL_EC_REGULATOR_SUPPLY_SELECTION

Defines

LL_PWR_MAIN_REGU_LDO_SUPPLY 0U

LDO regulator supply

LL_PWR_MAIN_REGU_SMPS_SUPPLY PWR_CR3_REGSEL

SMPS regulator supply

PWR Regulator startup mode

group PWR_LL_EC_REGULATOR_STARTUP_MODE

Defines

LL_PWR_MAIN_REGU_SLOW_STARTUP 0U

Main regulator slow startup

LL_PWR_MAIN_REGU_FAST_STARTUP PWR_CR3_FSTEN

Main regulator fast startup

PWR Voltage scaling range selection

group PWR_LL_EC_VOLTAGE_SCALING_RANGE_SELECTION

Defines

LL_PWR_REGU_VOLT_SCALE_1 PWR_VOSR_VOS

Voltage scaling range 1

LL_PWR_REGU_VOLT_SCALE_2 PWR_VOSR_VOS_1

Voltage scaling range 2

LL_PWR_REGU_VOLT_SCALE_3 PWR_VOSR_VOS_0

Voltage scaling range 3

LL_PWR_REGU_VOLT_SCALE_4 (0x0U)

Voltage scaling range 4

PWR Programmable voltage detector level selection

group PWR_LL_EC_PVD_LEVEL_SELECTION

Defines

LL_PWR_PVDLEVEL_0 0U

Voltage threshold detected by PVD 2.0 V

LL_PWR_PVDLEVEL_1 PWR_SVMCR_PVDLS_0

Voltage threshold detected by PVD 2.2 V

LL_PWR_PVDLEVEL_2 PWR_SVMCR_PVDLS_1

Voltage threshold detected by PVD 2.4 V

LL_PWR_PVDLEVEL_3 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_1)

Voltage threshold detected by PVD 2.5 V

LL_PWR_PVDLEVEL_4 PWR_SVMCR_PVDLS_2

Voltage threshold detected by PVD 2.6 V

LL_PWR_PVDLEVEL_5 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_2)

Voltage threshold detected by PVD 2.8 V

LL_PWR_PVDLEVEL_6 (PWR_SVMCR_PVDLS_1 | PWR_SVMCR_PVDLS_2)

Voltage threshold detected by PVD 2.9 V

LL_PWR_PVDLEVEL_7 PWR_SVMCR_PVDLS

External input analog voltage on PVD_IN pin, compared to internal VREFINT level

PWR independent analog supply voltage monitor

group PWR_LL_EC_PVM_PRIPHERAL_ANALOG_VOLTAGE_MONITOR

Defines

LL_PWR_ANALOG_VOLTAGE_MONITOR_1 PWR_SVMCR_AVM1EN

VddA1 voltage monitor versus 1.6 V

LL_PWR_ANALOG_VOLTAGE_MONITOR_2 PWR_SVMCR_AVM2EN

VddA2 voltage monitor versus 1.8 V

PWR Wakeup pin polarity

group PWR_LL_EC_WAKEUP_PIN_POLARITY

Defines

LL_PWR_WAKEUP_PIN_POLARITY_HIGH 0U

Wakeup pin polarity high

LL_PWR_WAKEUP_PIN_POLARITY_LOW 1U

Wakeup pin polarity low

PWR Wakeup pin

group PWR_LL_EC_WAKEUP_PIN

Defines

LL_PWR_WAKEUP_PIN1 PWR_WUCR1_WUPEN1

Wakeup pin 1 enable

LL_PWR_WAKEUP_PIN2 PWR_WUCR1_WUPEN2

Wakeup pin 2 enable

LL_PWR_WAKEUP_PIN3 PWR_WUCR1_WUPEN3

Wakeup pin 3 enable

LL_PWR_WAKEUP_PIN4 PWR_WUCR1_WUPEN4

Wakeup pin 4 enable

LL_PWR_WAKEUP_PIN5 PWR_WUCR1_WUPEN5

Wakeup pin 5 enable

LL_PWR_WAKEUP_PIN6 PWR_WUCR1_WUPEN6

Wakeup pin 6 enable

LL_PWR_WAKEUP_PIN7 PWR_WUCR1_WUPEN7

Wakeup pin 7 enable

LL_PWR_WAKEUP_PIN8 PWR_WUCR1_WUPEN8

Wakeup pin 8 enable

LL_PWR_WAKEUP_PIN_ALL (0xFFU)

Wakeup all pin enable

PWR Wakeup pin selection

group PWR_LL_EC_WAKEUP_PIN_SELECTION

Defines

LL_PWR_WAKEUP_PIN_SELECTION_0 0UL

Wakeup pin selection 0

LL_PWR_WAKEUP_PIN_SELECTION_1 PWR_WUCR3_WUSEL1_0

Wakeup pin selection 1

LL_PWR_WAKEUP_PIN_SELECTION_2 PWR_WUCR3_WUSEL1_1

Wakeup pin selection 2

LL_PWR_WAKEUP_PIN_SELECTION_3 PWR_WUCR3_WUSEL1

Wakeup pin selection 3

PWR Vbat charging resistor selection

group PWR_LL_EC_CHARGING_RESISTOR_SELECTION

Defines

LL_PWR_BATT_CHARG_RESISTOR_5K 0U

Charge the battery through a 5 kO resistor

LL_PWR_BATT_CHARG_RESISTOR_1_5K PWR_BDCR2_VBRS

Charge the battery through a 1.5 kO resistor

PWR GPIO port selection

group PWR_LL_EC_GPIO_PORT_SELECTION

Defines

LL_PWR_GPIO_PORTA ((uint32_t)&(PWR->PUCRA))

GPIO port A

LL_PWR_GPIO_PORTB ((uint32_t)&(PWR->PUCRB))

GPIO port B

LL_PWR_GPIO_PORTC ((uint32_t)&(PWR->PUCRC))

GPIO port C

LL_PWR_GPIO_PORTD ((uint32_t)&(PWR->PUCRD))

GPIO port D

LL_PWR_GPIO_PORTE ((uint32_t)&(PWR->PUCRE))

GPIO port E

LL_PWR_GPIO_PORTF ((uint32_t)&(PWR->PUCRF))

GPIO port F

LL_PWR_GPIO_PORTG ((uint32_t)&(PWR->PUCRG))

GPIO port G

LL_PWR_GPIO_PORTH ((uint32_t)&(PWR->PUCRH))

GPIO port H

LL_PWR_GPIO_PORTI ((uint32_t)&(PWR->PUCRI))

GPIO port I

LL_PWR_GPIO_PORTJ ((uint32_t)&(PWR->PUCRJ))

GPIO port J

PWR GPIO pin mask

group PWR_LL_EC_GPIO_PIN_MASK

Defines

LL_PWR_GPIO_PIN_0 0x0001U

GPIO port I/O pin 0

LL_PWR_GPIO_PIN_1 0x0002U

GPIO port I/O pin 1

LL_PWR_GPIO_PIN_2 0x0004U

GPIO port I/O pin 2

LL_PWR_GPIO_PIN_3 0x0008U

GPIO port I/O pin 3

LL_PWR_GPIO_PIN_4 0x0010U

GPIO port I/O pin 4

LL_PWR_GPIO_PIN_5 0x0020U

GPIO port I/O pin 5

LL_PWR_GPIO_PIN_6 0x0040U

GPIO port I/O pin 6

LL_PWR_GPIO_PIN_7 0x0080U

GPIO port I/O pin 7

LL_PWR_GPIO_PIN_8 0x0100U

GPIO port I/O pin 8

LL_PWR_GPIO_PIN_9 0x0200U

GPIO port I/O pin 9

LL_PWR_GPIO_PIN_10 0x0400U

GPIO port I/O pin 10

LL_PWR_GPIO_PIN_11 0x0800U

GPIO port I/O pin 11

LL_PWR_GPIO_PIN_12 0x1000U

GPIO port I/O pin 12

LL_PWR_GPIO_PIN_13 0x2000U

GPIO port I/O pin 13

LL_PWR_GPIO_PIN_14 0x4000U

GPIO port I/O pin 14

LL_PWR_GPIO_PIN_15 0x8000U

GPIO port I/O pin 15

PWR Items secure attribute

group PWR_LL_EC_ITEMS_SECURE_ATTRIBUTE

Defines

LL_PWR_WAKEUP_PIN1_NSEC 0U

Wake up pin 1 nsecure mode

LL_PWR_WAKEUP_PIN1_SEC PWR_SECCFGR_WUP1SEC

Wake up pin 1 secure mode

LL_PWR_WAKEUP_PIN2_NSEC 0U

Wake up pin 2 nsecure mode

LL_PWR_WAKEUP_PIN2_SEC PWR_SECCFGR_WUP2SEC

Wake up pin 2 secure mode

LL_PWR_WAKEUP_PIN3_NSEC 0U

Wake up pin 3 nsecure mode

LL_PWR_WAKEUP_PIN3_SEC PWR_SECCFGR_WUP3SEC

Wake up pin 3 secure mode

LL_PWR_WAKEUP_PIN4_NSEC 0U

Wake up pin 4 nsecure mode

LL_PWR_WAKEUP_PIN4_SEC PWR_SECCFGR_WUP4SEC

Wake up pin 4 secure mode

LL_PWR_WAKEUP_PIN5_NSEC 0U

Wake up pin 5 nsecure mode

LL_PWR_WAKEUP_PIN5_SEC PWR_SECCFGR_WUP5SEC

Wake up pin 5 secure mode

LL_PWR_WAKEUP_PIN6_NSEC 0U

Wake up pin 6 nsecure mode

LL_PWR_WAKEUP_PIN6_SEC PWR_SECCFGR_WUP6SEC

Wake up pin 6 secure mode

LL_PWR_WAKEUP_PIN7_NSEC 0U

Wake up pin 7 nsecure mode

LL_PWR_WAKEUP_PIN7_SEC PWR_SECCFGR_WUP7SEC

Wake up pin 7 secure mode

LL_PWR_WAKEUP_PIN8_NSEC 0U

Wake up pin 8 nsecure mode

LL_PWR_WAKEUP_PIN8_SEC PWR_SECCFGR_WUP8SEC

Wake up pin 8 secure mode

LL_PWR_LPM_NSEC 0U

Low-power modes nsecure mode

LL_PWR_LPM_SEC PWR_SECCFGR_LPMSEC

Low-power modes secure mode

LL_PWR_VDM_NSEC 0U

Voltage detection and monitoring nsecure mode

LL_PWR_VDM_SEC PWR_SECCFGR_VDMSEC

Voltage detection and monitoring secure mode

LL_PWR_VB_NSEC 0U

Backup domain nsecure mode

LL_PWR_VB_SEC PWR_SECCFGR_VBSEC

Backup domain secure mode

LL_PWR_APC_NSEC 0U

Pull-up/pull-down nsecure mode

LL_PWR_APC_SEC PWR_SECCFGR_APCSEC

Pull-up/pull-down secure mode