Reference Manual to LL API cross reference

The following table provides the mapping between the registers and bits, as they appear inside product reference manual, and the functions provided by the Low Layer interface.

This table gives the correlation for SYSCFG registers

Register

Bit

Function

CCCR

NCC1

CCCR

NCC2

CCCR

NCC3

CCCR

PCC1

CCCR

PCC2

CCCR

PCC3

CCCSR

CS1

CCCSR

CS2

CCCSR

CS3

CCCSR

EN1

CCCSR

EN2

CCCSR

EN3

CCCSR

RDY1

CCCSR

RDY2

CCCSR

RDY3

CCVR

NCV1

CCVR

NCV2

CCVR

NCV3

CCVR

PCV1

CCVR

PCV2

CCVR

PCV3

CNSLCKR

LOCKNSMPU

CNSLCKR

LOCKNSVTAIRCR

CNSLCKR

LOCKNSVTOR

CSLCKR

LOCKSAU

CSLCKR

LOCKSMPU

CSLCKR

LOCKSVTAIRCR

MESR

IPMEE

MESR

MCLR

OTGHSPHYCR

CLKSEL

OTGHSPHYCR

EN

OTGHSPHYCR

PDCTRL

OTGHSPHYTUNER2

COMPDISTUNE

OTGHSPHYTUNER2

SQRXTUNE

OTGHSPHYTUNER2

TXPREEMPAMPTUNE

SECCFGR

CLASSBSEC

SECCFGR

FPUSEC

SECCFGR

SYSCFGSEC

SYSCFG_CCCSR

CS1

LL_SYSCFG_GetCompensationCellCode()

SYSCFG_CCCSR

CS2

LL_SYSCFG_GetCompensationCellCode()

SYSCFG_CCCSR

CS3

LL_SYSCFG_GetCompensationCellCode()

SYSCFG_CFGR1

ANASWVDD

SYSCFG_CFGR1

BOOSTEN

SYSCFG_CFGR1

ENDCAP

SYSCFG_CFGR1

PB6_FMP

SYSCFG_CFGR1

PB7_FMP

SYSCFG_CFGR1

PB8_FMP

SYSCFG_CFGR1

PB9_FMP

SYSCFG_CFGR1

PBx_FMP

SYSCFG_CFGR1

SRAMCACHED

SYSCFG_CFGR2

CLL

SYSCFG_CFGR2

ECCL

SYSCFG_CFGR2

PVDL

SYSCFG_CFGR2

SPL

SYSCFG_FPUIMR

FPU_IE_0

SYSCFG_FPUIMR

FPU_IE_1

SYSCFG_FPUIMR

FPU_IE_2

SYSCFG_FPUIMR

FPU_IE_3

SYSCFG_FPUIMR

FPU_IE_4

SYSCFG_FPUIMR

FPU_IE_5