HAL DCACHE How to Use ¶

group DCACHE_How_To_Use

#Main features The main features of DCACHE are described below:

• Bus interface

  • one 32-Bit AHB slave port, the system port (input from Cortex-M33 S-AHB system Interface)

  • one 32-bit AHB master port (output to main AHB bus matrix)

  • one 32-bit AHB slave port for control (input from AHB peripherals interconnect, for DCACHE registers access)

• Cache access

  • 0 wait-state on hits

  • Hit-under-miss capability: ability to serve processor requests (access to cached data) during an ongoing line refill due to a previous cache miss

  • Optimized cache line refill thanks to WRAP bursts of the size of the cache line (such as WRAP4 for 128-bit cache line)

  • 2-ways set-associative

  • Supports both write-back and write-through policies (selectable with AHB bufferable attribute)

  • Read and write-back always allocate

  • Write-through always non-allocate (write-around)

  • Supports byte, half-word, and word writes

• Replacement and refill

  • pLRU-t replacement policy (pseudo-least-recently-used, based on binary tree), algorithm with best complexity/performance balance

  • Critical-word-first refill policy for read transactions, minimizing processor stalls

  • Possibility to configure burst type of all AHB memory transactions: INCRw or WRAPw (size w aligned on cache line size)

• Performance counters DCACHE implements four performance counters:

  • Two hit monitor counters (32-bit): number of read hits, number of write hits

  • Two miss monitor counters (16-bit): number of read misses, number of write misses

• Error management

  • Possibility to detect error for master port request initiated by DCACHE itself (a cache line written back into main memory, because of an eviction or a clean operation), to flag this error, and optionally to raise an interrupt

• Trust Zone security support

• Maintenance operations

  • Cache invalidate: full cache invalidation

  • Cache invalidates range: invalidates cache lines

  • Cache clean range: cleans cache lines

  • Cache clean and invalidate range: cleans and invalidates cache lines

How to use the HAL DCACHE driver ¶

The HAL DCACHE driver can be used as follows: ¶

Main use ¶

• Initialize the DCACHE according to the associated handle with HAL_DCACHE_Init() . DCACHE Clock is disabled by default but can be enabled in setting USE_HAL_DCACHE_CLK_ENABLE_MODEL to HAL_CLK_ENABLE_PERIPH_ONLY.

• Set the configuration of the DCACHE to choose the Read Burst Type with HAL_DCACHE_SetReadBurstType() . This operation is optional, the user can keep the default configuration which is DCACHE_READ_BURST_WRAP.

• Then Start the DCACHE driver with HAL_DCACHE_Start() . You can enable the Error interrupt detection and allow to receive callbacks in case of eviction or clean fails error.

• Execute the DCACHE maintenance operations if necessary :

  • Use HAL_DCACHE_Invalidate() to invalidate the full cache content:

    • Cache content is lost, and reloaded when needed.

    • Used for complete invalidate of the DCACHE in case.

    • Blocking call until operation is done.

  • Use HAL_DCACHE_InvalidateByAddr() to invalidate cache content for specific range:

    • Cache content for specific range is lost, and reloaded when needed.

    • Used when excepting a buffer to be updated by a peripheral (typically DMA transfer).

    • Blocking call until operation is done.

  • Use HAL_DCACHE_CleanByAddr() to clean cache content for a specific range:

    • Cache content for specific range is written back to memory.

    • Used when buffer is updated by CPU before usage by a peripheral (typically DMA transfer).

    • Blocking call until operation is done.

  • Use HAL_DCACHE_CleanInvalidByAddr() to clean and invalidate cache content for a specific range:

    • Cache content for specific range is written back to memory, and reloaded when needed.

    • Used when sharing buffer between CPU and other peripheral.

    • Recommended to use for MPU reprogramming.

    • Blocking call until operation is done.

Monitoring performance ¶

• The performance monitoring Read Hit, Read Miss, Write Hit and Write Miss counters can be used as follows : HAL_DCACHE_EnableMonitors() and HAL_DCACHE_DisableMonitors() respectively enable and disable any monitors. To retrieve the counters value use HAL_DCACHE_GetMonitorReadHitValue() , HAL_DCACHE_GetMonitorReadMissValue() , HAL_DCACHE_GetMonitorWriteHitValue() or HAL_DCACHE_GetMonitorWriteMissValue() functions. HAL_DCACHE_ResetMonitors() function allows to clear any monitors value.

Interrupt Mode ¶

• The DCACHE provides three sources of interrupt :

  • The error interrupt.

  • The invalidate completion interrupt.

  • The cache command completion interrupt.

• For each interrupt, there is a corresponding callback launched in the HAL_DCACHE_IRQHandler() function.

• In case of interrupt, depending which registering callback method used, it either triggers the weak callback or the register one.

• Error :

  • Override weak definition for following callbacks:

    • HAL_DCACHE_ErrorCallback()

  • Or use register callbacks (USE_HAL_DCACHE_REGISTER_CALLBACKS = 1):

    • HAL_DCACHE_RegisterErrorCallback()

  • Start the DCACHE driver with HAL_DCACHE_Start(hdcache,HAL_DCACHE_IT_ERROR) as explain above.

• Maintenance operation:

  • Override weak definition for following callbacks:

    • HAL_DCACHE_InvalidateCompleteCallback()

    • HAL_DCACHE_CleanInvalidByAddrCallback()

    • HAL_DCACHE_InvalidateByAddrCallback()

    • HAL_DCACHE_CleanByAddrCallback()

  • Or use register callbacks (USE_HAL_DCACHE_REGISTER_CALLBACKS = 1):

    • HAL_DCACHE_RegisterInvalidateCompleteCallback()

    • HAL_DCACHE_RegisterCleanInvalidByAddrCallback()

    • HAL_DCACHE_RegisterInvalidateByAddrCallback()

    • HAL_DCACHE_RegisterCleanByAddrCallback()

  • Launch a maintenance operation with Interrupt: HAL_DCACHE_Invalidate_IT() , HAL_DCACHE_InvalidateByAddr_IT() , HAL_DCACHE_CleanByAddr_IT() or HAL_DCACHE_CleanInvalidByAddr_IT() .

HAL DCACHE Driver State ¶

• Use HAL_DCACHE_GetState() function to return the HAL DCACHE state.