HAL DCACHE Overview ¶
Introducing DCACHE ¶
- group DCACHE_Introduction
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This introduction is under development.
DCACHE Introduction ¶
The data cache (DCACHE) is introduced on S-AHB system bus of the Cortex-M33 processor to improve the performance of data traffic to/from external memories. Some specific features like hit-under-miss and critical-word-first refill policy allow optimum performance on external memories data accesses.
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Module and files ¶
The following diagram illustrates the DCACHE module and its associated files.
Component diagram ¶
The following diagram illustrates the software components involved in the DCACHE module. It shows the interactions between the user application, HAL drivers, low-level drivers, and the hardware components.
Configuration table ¶
The following table lists the configuration defines for the HAL DCACHE module, specifying their locations, default values, and descriptions:
- group DCACHE_Configuration_Table
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Configuration inside the DCACHE driver: ¶
Config defines
Description
Default value
Note
USE_HAL_ICACHE_MODULE
From hal_conf.h
1
Allows to use HAL ICACHE module.
USE_HAL_ICACHE_REGISTER_CALLBACKS
From hal_conf.h
0
Allows to use the register callbacks.
USE_HAL_CHECK_PARAM
From hal_conf.h
0
Allows to use the run-time checks parameters.
USE_ASSERT_DBG_PARAM
From IDE
NA
Allows to use the assert check parameters.
USE_ASSERT_DBG_STATE
From IDE
NA
Allows to use the assert check states.
USE_HAL_DCACHE_CLK_ENABLE_MODEL
from hal_conf.h
HAL_CLK_ENABLE_NO
Enable the gating of the peripheral clock.
USE_HAL_ICACHE_GET_LAST_ERRORS
From hal_conf.h
1
Allow to use error code mechanism.
USE_HAL_ICACHE_USER_DATA
From hal_conf.h
0
Allows to use user data.