HAL FDCAN Constants ¶
FDCAN Error Codes ¶
- group FDCAN_Error_Codes
-
Defines
-
HAL_FDCAN_ERROR_NONE
(0UL)
¶
-
No error
-
HAL_FDCAN_ERROR_LOG_OVERFLOW
(1UL
<<
0U)
¶
-
Overflow of CAN Error Logging Counter
-
HAL_FDCAN_ERROR_RAM_WDG
(1UL
<<
1U)
¶
-
Message RAM Watchdog event occurred
-
HAL_FDCAN_ERROR_PROTOCOL_ARBT
(1UL
<<
2U)
¶
-
Protocol Error in Arbitration Phase (Nominal Bit Time)
-
HAL_FDCAN_ERROR_PROTOCOL_DATA
(1UL
<<
3U)
¶
-
Protocol Error in Data Phase (Data Bit Time)
-
HAL_FDCAN_ERROR_RESERVED_AREA
(1UL
<<
4U)
¶
-
Access to Reserved Address
-
HAL_FDCAN_ERROR_TIMEOUT_OCCURRED
(1UL
<<
5U)
¶
-
Timeout Occurred
-
HAL_FDCAN_ERROR_RAM_ACCESS_FAILURE
(1UL
<<
6U)
¶
-
Message RAM access failure occurred
-
HAL_FDCAN_ERROR_BUS_FAULT_OFF
(1UL
<<
7U)
¶
-
Bus_Off status changed
-
HAL_FDCAN_ERROR_BUS_FAULT_PASSIVE
(1UL
<<
8U)
¶
-
Error_Passive status changed
-
HAL_FDCAN_ERROR_BUS_FAULT_WARNING
(1UL
<<
9U)
¶
-
Error_Warning status changed
-
HAL_FDCAN_ERROR_NONE
(0UL)
¶
- group FDCAN_Error_Codes
-
Defines
-
HAL_FDCAN_ERROR_NONE
(0UL)
-
No error
-
HAL_FDCAN_ERROR_LOG_OVERFLOW
(1UL
<<
0U)
-
Overflow of CAN Error Logging Counter
-
HAL_FDCAN_ERROR_RAM_WDG
(1UL
<<
1U)
-
Message RAM Watchdog event occurred
-
HAL_FDCAN_ERROR_PROTOCOL_ARBT
(1UL
<<
2U)
-
Protocol Error in Arbitration Phase (Nominal Bit Time)
-
HAL_FDCAN_ERROR_PROTOCOL_DATA
(1UL
<<
3U)
-
Protocol Error in Data Phase (Data Bit Time)
-
HAL_FDCAN_ERROR_RESERVED_AREA
(1UL
<<
4U)
-
Access to Reserved Address
-
HAL_FDCAN_ERROR_TIMEOUT_OCCURRED
(1UL
<<
5U)
-
Timeout Occurred
-
HAL_FDCAN_ERROR_RAM_ACCESS_FAILURE
(1UL
<<
6U)
-
Message RAM access failure occurred
-
HAL_FDCAN_ERROR_BUS_FAULT_OFF
(1UL
<<
7U)
-
Bus_Off status changed
-
HAL_FDCAN_ERROR_BUS_FAULT_PASSIVE
(1UL
<<
8U)
-
Error_Passive status changed
-
HAL_FDCAN_ERROR_BUS_FAULT_WARNING
(1UL
<<
9U)
-
Error_Warning status changed
-
HAL_FDCAN_ERROR_NONE
(0UL)
- group FDCAN_Error_Codes
-
Defines
-
HAL_FDCAN_ERROR_NONE
(0UL)
-
No error
-
HAL_FDCAN_ERROR_LOG_OVERFLOW
(1UL
<<
0U)
-
Overflow of CAN Error Logging Counter
-
HAL_FDCAN_ERROR_RAM_WDG
(1UL
<<
1U)
-
Message RAM Watchdog event occurred
-
HAL_FDCAN_ERROR_PROTOCOL_ARBT
(1UL
<<
2U)
-
Protocol Error in Arbitration Phase (Nominal Bit Time)
-
HAL_FDCAN_ERROR_PROTOCOL_DATA
(1UL
<<
3U)
-
Protocol Error in Data Phase (Data Bit Time)
-
HAL_FDCAN_ERROR_RESERVED_AREA
(1UL
<<
4U)
-
Access to Reserved Address
-
HAL_FDCAN_ERROR_TIMEOUT_OCCURRED
(1UL
<<
5U)
-
Timeout Occurred
-
HAL_FDCAN_ERROR_RAM_ACCESS_FAILURE
(1UL
<<
6U)
-
Message RAM access failure occurred
-
HAL_FDCAN_ERROR_BUS_FAULT_OFF
(1UL
<<
7U)
-
Bus_Off status changed
-
HAL_FDCAN_ERROR_BUS_FAULT_PASSIVE
(1UL
<<
8U)
-
Error_Passive status changed
-
HAL_FDCAN_ERROR_BUS_FAULT_WARNING
(1UL
<<
9U)
-
Error_Warning status changed
-
HAL_FDCAN_ERROR_NONE
(0UL)
FDCAN Interrupt Groups ¶
- group FDCAN_Interrupt_Groups
-
Defines
-
HAL_FDCAN_IT_GROUP_RX_FIFO0
(FDCAN_ILS_RXFIFO0)
¶
-
Rx FIFO0 group. This group contains the following interrupts:
-
Rx FIFO0 new message
-
Rx FIFO0 full
-
Rx FIFO0 message lost
-
-
HAL_FDCAN_IT_GROUP_RX_FIFO1
(FDCAN_ILS_RXFIFO1)
¶
-
Rx FIFO1 group. This group contains the following interrupts:
-
Rx FIFO1 new message
-
Rx FIFO1 full
-
Rx FIFO1 message lost
-
-
HAL_FDCAN_IT_GROUP_STATUS_MSG
(FDCAN_ILS_SMSG)
¶
-
Status message group. This group contains the following interrupts:
-
Rx high priority message
-
Tx complete
-
Tx abort complete
-
-
HAL_FDCAN_IT_GROUP_TX_FIFO_ERROR
(FDCAN_ILS_TFERR)
¶
-
Tx FIFO error group. This group contains the following interrupts:
-
Tx FIFO empty
-
Tx event FIFO new data
-
Tx event FIFO full
-
Tx event FIFO element lost
-
-
HAL_FDCAN_IT_GROUP_MISC
(FDCAN_ILS_MISC)
¶
-
Miscellaneous group. This group contains the following interrupts:
-
Timestamp wraparound
-
Message RAM access failure
-
Timeout occurred
-
-
HAL_FDCAN_IT_GROUP_BIT_LINE_ERROR
(FDCAN_ILS_BERR)
¶
-
Bit and line error group. This group contains the following interrupts:
-
Error logging overflow
-
Error passive
-
-
HAL_FDCAN_IT_GROUP_PROTOCOL_ERROR
(FDCAN_ILS_PERR)
¶
-
Protocol error group. This group contains the following interrupts:
-
Error warning
-
Bus off
-
Message RAM watchdog
-
Protocol error in arbitration phase
-
Protocol error in data phase
-
Reserved address access error
-
-
HAL_FDCAN_IT_GROUP_RX_FIFO0
(FDCAN_ILS_RXFIFO0)
¶
- group FDCAN_Interrupt_Groups
-
Defines
-
HAL_FDCAN_IT_GROUP_RX_FIFO0
(FDCAN_ILS_RXFIFO0)
-
Rx FIFO0 group. This group contains the following interrupts:
-
Rx FIFO0 new message
-
Rx FIFO0 full
-
Rx FIFO0 message lost
-
-
HAL_FDCAN_IT_GROUP_RX_FIFO1
(FDCAN_ILS_RXFIFO1)
-
Rx FIFO1 group. This group contains the following interrupts:
-
Rx FIFO1 new message
-
Rx FIFO1 full
-
Rx FIFO1 message lost
-
-
HAL_FDCAN_IT_GROUP_STATUS_MSG
(FDCAN_ILS_SMSG)
-
Status message group. This group contains the following interrupts:
-
Rx high priority message
-
Tx complete
-
Tx abort complete
-
-
HAL_FDCAN_IT_GROUP_TX_FIFO_ERROR
(FDCAN_ILS_TFERR)
-
Tx FIFO error group. This group contains the following interrupts:
-
Tx FIFO empty
-
Tx event FIFO new data
-
Tx event FIFO full
-
Tx event FIFO element lost
-
-
HAL_FDCAN_IT_GROUP_MISC
(FDCAN_ILS_MISC)
-
Miscellaneous group. This group contains the following interrupts:
-
Timestamp wraparound
-
Message RAM access failure
-
Timeout occurred
-
-
HAL_FDCAN_IT_GROUP_BIT_LINE_ERROR
(FDCAN_ILS_BERR)
-
Bit and line error group. This group contains the following interrupts:
-
Error logging overflow
-
Error passive
-
-
HAL_FDCAN_IT_GROUP_PROTOCOL_ERROR
(FDCAN_ILS_PERR)
-
Protocol error group. This group contains the following interrupts:
-
Error warning
-
Bus off
-
Message RAM watchdog
-
Protocol error in arbitration phase
-
Protocol error in data phase
-
Reserved address access error
-
-
HAL_FDCAN_IT_GROUP_RX_FIFO0
(FDCAN_ILS_RXFIFO0)
- group FDCAN_Interrupt_Groups
-
Defines
-
HAL_FDCAN_IT_GROUP_RX_FIFO0
(FDCAN_ILS_RXFIFO0)
-
Rx FIFO0 group. This group contains the following interrupts:
-
Rx FIFO0 new message
-
Rx FIFO0 full
-
Rx FIFO0 message lost
-
-
HAL_FDCAN_IT_GROUP_RX_FIFO1
(FDCAN_ILS_RXFIFO1)
-
Rx FIFO1 group. This group contains the following interrupts:
-
Rx FIFO1 new message
-
Rx FIFO1 full
-
Rx FIFO1 message lost
-
-
HAL_FDCAN_IT_GROUP_STATUS_MSG
(FDCAN_ILS_SMSG)
-
Status message group. This group contains the following interrupts:
-
Rx high priority message
-
Tx complete
-
Tx abort complete
-
-
HAL_FDCAN_IT_GROUP_TX_FIFO_ERROR
(FDCAN_ILS_TFERR)
-
Tx FIFO error group. This group contains the following interrupts:
-
Tx FIFO empty
-
Tx event FIFO new data
-
Tx event FIFO full
-
Tx event FIFO element lost
-
-
HAL_FDCAN_IT_GROUP_MISC
(FDCAN_ILS_MISC)
-
Miscellaneous group. This group contains the following interrupts:
-
Timestamp wraparound
-
Message RAM access failure
-
Timeout occurred
-
-
HAL_FDCAN_IT_GROUP_BIT_LINE_ERROR
(FDCAN_ILS_BERR)
-
Bit and line error group. This group contains the following interrupts:
-
Error logging overflow
-
Error passive
-
-
HAL_FDCAN_IT_GROUP_PROTOCOL_ERROR
(FDCAN_ILS_PERR)
-
Protocol error group. This group contains the following interrupts:
-
Error warning
-
Bus off
-
Message RAM watchdog
-
Protocol error in arbitration phase
-
Protocol error in data phase
-
Reserved address access error
-
-
HAL_FDCAN_IT_GROUP_RX_FIFO0
(FDCAN_ILS_RXFIFO0)
FDCAN Interrupt Sources ¶
- group FDCAN_Interrupt_Sources
-
Defines
-
HAL_FDCAN_IT_RX_FIFO0_NEW_MSG
FDCAN_IE_RF0NE
¶
-
Rx FIFO0 new message interrupt
-
HAL_FDCAN_IT_RX_FIFO0_FULL
FDCAN_IE_RF0FE
¶
-
Rx FIFO0 full interrupt
-
HAL_FDCAN_IT_RX_FIFO0_MSG_LOST
FDCAN_IE_RF0LE
¶
-
Rx FIFO0 message lost interrupt
-
HAL_FDCAN_IT_RX_FIFO1_NEW_MSG
FDCAN_IE_RF1NE
¶
-
Rx FIFO1 new message interrupt
-
HAL_FDCAN_IT_RX_FIFO1_FULL
FDCAN_IE_RF1FE
¶
-
Rx FIFO1 full interrupt
-
HAL_FDCAN_IT_RX_FIFO1_MSG_LOST
FDCAN_IE_RF1LE
¶
-
Rx FIFO1 message lost interrupt
-
HAL_FDCAN_IT_RX_HIGH_PRIORITY_MSG
FDCAN_IE_HPME
¶
-
High priority message received
-
HAL_FDCAN_IT_TX_COMPLETE
FDCAN_IE_TCE
¶
-
Transmission Completed
-
HAL_FDCAN_IT_TX_ABORT_COMPLETE
FDCAN_IE_TCFE
¶
-
Transmission Cancellation Finished
-
HAL_FDCAN_IT_TX_FIFO_EMPTY
FDCAN_IE_TFEE
¶
-
Tx FIFO Empty
-
HAL_FDCAN_IT_TX_EVT_FIFO_NEW_DATA
FDCAN_IE_TEFNE
¶
-
Tx Handler wrote Tx Event FIFO element
-
HAL_FDCAN_IT_TX_EVT_FIFO_FULL
FDCAN_IE_TEFFE
¶
-
Tx Event FIFO full
-
HAL_FDCAN_IT_TX_EVT_FIFO_ELT_LOST
FDCAN_IE_TEFLE
¶
-
Tx Event FIFO element lost
-
HAL_FDCAN_IT_TIMESTAMP_WRAPAROUND
FDCAN_IE_TSWE
¶
-
Timestamp counter wrapped around
-
HAL_FDCAN_IT_RAM_ACCESS_FAILURE
FDCAN_IE_MRAFE
¶
-
Message RAM access failure occurred
-
HAL_FDCAN_IT_TIMEOUT_OCCURRED
FDCAN_IE_TOOE
¶
-
Timeout reached
-
HAL_FDCAN_IT_ERROR_LOGGING_OVERFLOW
FDCAN_IE_ELOE
¶
-
Overflow of FDCAN Error Logging Counter occurred
-
HAL_FDCAN_IT_ERROR_PASSIVE
FDCAN_IE_EPE
¶
-
Error_Passive status changed
-
HAL_FDCAN_IT_ERROR_WARNING
FDCAN_IE_EWE
¶
-
Error_Warning status changed
-
HAL_FDCAN_IT_BUS_OFF
FDCAN_IE_BOE
¶
-
Bus_Off status changed
-
HAL_FDCAN_IT_RAM_WATCHDOG
FDCAN_IE_WDIE
¶
-
Message RAM Watchdog event due to missing READY
-
HAL_FDCAN_IT_ARB_PROTOCOL_ERROR
FDCAN_IE_PEAE
¶
-
Protocol error in arbitration phase detected
-
HAL_FDCAN_IT_DATA_PROTOCOL_ERROR
FDCAN_IE_PEDE
¶
-
Protocol error in data phase detected
-
HAL_FDCAN_IT_RESERVED_ADDRESS_ACCESS
FDCAN_IE_ARAE
¶
-
Access to reserved address occurred
-
HAL_FDCAN_IT_RX_FIFO0_NEW_MSG
FDCAN_IE_RF0NE
¶
- group FDCAN_Interrupt_Sources
-
Defines
-
HAL_FDCAN_IT_RX_FIFO0_NEW_MSG
FDCAN_IE_RF0NE
-
Rx FIFO0 new message interrupt
-
HAL_FDCAN_IT_RX_FIFO0_FULL
FDCAN_IE_RF0FE
-
Rx FIFO0 full interrupt
-
HAL_FDCAN_IT_RX_FIFO0_MSG_LOST
FDCAN_IE_RF0LE
-
Rx FIFO0 message lost interrupt
-
HAL_FDCAN_IT_RX_FIFO1_NEW_MSG
FDCAN_IE_RF1NE
-
Rx FIFO1 new message interrupt
-
HAL_FDCAN_IT_RX_FIFO1_FULL
FDCAN_IE_RF1FE
-
Rx FIFO1 full interrupt
-
HAL_FDCAN_IT_RX_FIFO1_MSG_LOST
FDCAN_IE_RF1LE
-
Rx FIFO1 message lost interrupt
-
HAL_FDCAN_IT_RX_HIGH_PRIORITY_MSG
FDCAN_IE_HPME
-
High priority message received
-
HAL_FDCAN_IT_TX_COMPLETE
FDCAN_IE_TCE
-
Transmission Completed
-
HAL_FDCAN_IT_TX_ABORT_COMPLETE
FDCAN_IE_TCFE
-
Transmission Cancellation Finished
-
HAL_FDCAN_IT_TX_FIFO_EMPTY
FDCAN_IE_TFEE
-
Tx FIFO Empty
-
HAL_FDCAN_IT_TX_EVT_FIFO_NEW_DATA
FDCAN_IE_TEFNE
-
Tx Handler wrote Tx Event FIFO element
-
HAL_FDCAN_IT_TX_EVT_FIFO_FULL
FDCAN_IE_TEFFE
-
Tx Event FIFO full
-
HAL_FDCAN_IT_TX_EVT_FIFO_ELT_LOST
FDCAN_IE_TEFLE
-
Tx Event FIFO element lost
-
HAL_FDCAN_IT_TIMESTAMP_WRAPAROUND
FDCAN_IE_TSWE
-
Timestamp counter wrapped around
-
HAL_FDCAN_IT_RAM_ACCESS_FAILURE
FDCAN_IE_MRAFE
-
Message RAM access failure occurred
-
HAL_FDCAN_IT_TIMEOUT_OCCURRED
FDCAN_IE_TOOE
-
Timeout reached
-
HAL_FDCAN_IT_ERROR_LOGGING_OVERFLOW
FDCAN_IE_ELOE
-
Overflow of FDCAN Error Logging Counter occurred
-
HAL_FDCAN_IT_ERROR_PASSIVE
FDCAN_IE_EPE
-
Error_Passive status changed
-
HAL_FDCAN_IT_ERROR_WARNING
FDCAN_IE_EWE
-
Error_Warning status changed
-
HAL_FDCAN_IT_BUS_OFF
FDCAN_IE_BOE
-
Bus_Off status changed
-
HAL_FDCAN_IT_RAM_WATCHDOG
FDCAN_IE_WDIE
-
Message RAM Watchdog event due to missing READY
-
HAL_FDCAN_IT_ARB_PROTOCOL_ERROR
FDCAN_IE_PEAE
-
Protocol error in arbitration phase detected
-
HAL_FDCAN_IT_DATA_PROTOCOL_ERROR
FDCAN_IE_PEDE
-
Protocol error in data phase detected
-
HAL_FDCAN_IT_RESERVED_ADDRESS_ACCESS
FDCAN_IE_ARAE
-
Access to reserved address occurred
-
HAL_FDCAN_IT_RX_FIFO0_NEW_MSG
FDCAN_IE_RF0NE
- group FDCAN_Interrupt_Sources
-
Defines
-
HAL_FDCAN_IT_RX_FIFO0_NEW_MSG
FDCAN_IE_RF0NE
-
Rx FIFO0 new message interrupt
-
HAL_FDCAN_IT_RX_FIFO0_FULL
FDCAN_IE_RF0FE
-
Rx FIFO0 full interrupt
-
HAL_FDCAN_IT_RX_FIFO0_MSG_LOST
FDCAN_IE_RF0LE
-
Rx FIFO0 message lost interrupt
-
HAL_FDCAN_IT_RX_FIFO1_NEW_MSG
FDCAN_IE_RF1NE
-
Rx FIFO1 new message interrupt
-
HAL_FDCAN_IT_RX_FIFO1_FULL
FDCAN_IE_RF1FE
-
Rx FIFO1 full interrupt
-
HAL_FDCAN_IT_RX_FIFO1_MSG_LOST
FDCAN_IE_RF1LE
-
Rx FIFO1 message lost interrupt
-
HAL_FDCAN_IT_RX_HIGH_PRIORITY_MSG
FDCAN_IE_HPME
-
High priority message received
-
HAL_FDCAN_IT_TX_COMPLETE
FDCAN_IE_TCE
-
Transmission Completed
-
HAL_FDCAN_IT_TX_ABORT_COMPLETE
FDCAN_IE_TCFE
-
Transmission Cancellation Finished
-
HAL_FDCAN_IT_TX_FIFO_EMPTY
FDCAN_IE_TFEE
-
Tx FIFO Empty
-
HAL_FDCAN_IT_TX_EVT_FIFO_NEW_DATA
FDCAN_IE_TEFNE
-
Tx Handler wrote Tx Event FIFO element
-
HAL_FDCAN_IT_TX_EVT_FIFO_FULL
FDCAN_IE_TEFFE
-
Tx Event FIFO full
-
HAL_FDCAN_IT_TX_EVT_FIFO_ELT_LOST
FDCAN_IE_TEFLE
-
Tx Event FIFO element lost
-
HAL_FDCAN_IT_TIMESTAMP_WRAPAROUND
FDCAN_IE_TSWE
-
Timestamp counter wrapped around
-
HAL_FDCAN_IT_RAM_ACCESS_FAILURE
FDCAN_IE_MRAFE
-
Message RAM access failure occurred
-
HAL_FDCAN_IT_TIMEOUT_OCCURRED
FDCAN_IE_TOOE
-
Timeout reached
-
HAL_FDCAN_IT_ERROR_LOGGING_OVERFLOW
FDCAN_IE_ELOE
-
Overflow of FDCAN Error Logging Counter occurred
-
HAL_FDCAN_IT_ERROR_PASSIVE
FDCAN_IE_EPE
-
Error_Passive status changed
-
HAL_FDCAN_IT_ERROR_WARNING
FDCAN_IE_EWE
-
Error_Warning status changed
-
HAL_FDCAN_IT_BUS_OFF
FDCAN_IE_BOE
-
Bus_Off status changed
-
HAL_FDCAN_IT_RAM_WATCHDOG
FDCAN_IE_WDIE
-
Message RAM Watchdog event due to missing READY
-
HAL_FDCAN_IT_ARB_PROTOCOL_ERROR
FDCAN_IE_PEAE
-
Protocol error in arbitration phase detected
-
HAL_FDCAN_IT_DATA_PROTOCOL_ERROR
FDCAN_IE_PEDE
-
Protocol error in data phase detected
-
HAL_FDCAN_IT_RESERVED_ADDRESS_ACCESS
FDCAN_IE_ARAE
-
Access to reserved address occurred
-
HAL_FDCAN_IT_RX_FIFO0_NEW_MSG
FDCAN_IE_RF0NE
FDCAN Interrupt Flags ¶
- group FDCAN_Interrupt_Flags
-
FDCAN interrupt register (FDCAN_IR): The flags are set when one of the listed conditions is detected.
Defines
-
HAL_FDCAN_FLAG_RX_FIFO0_MSG_LOST
FDCAN_IR_RF0L
¶
-
Rx FIFO 0 message lost
-
HAL_FDCAN_FLAG_RX_FIFO0_FULL
FDCAN_IR_RF0F
¶
-
Rx FIFO 0 full
-
HAL_FDCAN_FLAG_RX_FIFO0_NEW_MSG
FDCAN_IR_RF0N
¶
-
New message written to Rx FIFO 0
-
HAL_FDCAN_FLAG_RX_FIFO1_MSG_LOST
FDCAN_IR_RF1L
¶
-
Rx FIFO 1 message lost
-
HAL_FDCAN_FLAG_RX_FIFO1_FULL
FDCAN_IR_RF1F
¶
-
Rx FIFO 1 full
-
HAL_FDCAN_FLAG_RX_FIFO1_NEW_MSG
FDCAN_IR_RF1N
¶
-
New message written to Rx FIFO 1
-
HAL_FDCAN_FLAG_RX_HIGH_PRIORITY_MSG
FDCAN_IR_HPM
¶
-
High priority message received
-
HAL_FDCAN_FLAG_TX_COMPLETE
FDCAN_IR_TC
¶
-
Transmission Completed
-
HAL_FDCAN_FLAG_TX_ABORT_COMPLETE
FDCAN_IR_TCF
¶
-
Transmission Cancellation Finished
-
HAL_FDCAN_FLAG_TX_FIFO_EMPTY
FDCAN_IR_TFE
¶
-
Tx FIFO Empty
-
HAL_FDCAN_FLAG_TX_EVT_FIFO_ELT_LOST
FDCAN_IR_TEFL
¶
-
Tx Event FIFO element lost
-
HAL_FDCAN_FLAG_TX_EVT_FIFO_FULL
FDCAN_IR_TEFF
¶
-
Tx Event FIFO full
-
HAL_FDCAN_FLAG_TX_EVT_FIFO_NEW_DATA
FDCAN_IR_TEFN
¶
-
Tx Handler wrote Tx Event FIFO element
-
HAL_FDCAN_FLAG_RAM_ACCESS_FAILURE
FDCAN_IR_MRAF
¶
-
Message RAM access failure occurred
-
HAL_FDCAN_FLAG_ERROR_LOGGING_OVERFLOW
FDCAN_IR_ELO
¶
-
Overflow of FDCAN Error Logging Counter occurred
-
HAL_FDCAN_FLAG_ERROR_PASSIVE
FDCAN_IR_EP
¶
-
Error_Passive status changed
-
HAL_FDCAN_FLAG_ERROR_WARNING
FDCAN_IR_EW
¶
-
Error_Warning status changed
-
HAL_FDCAN_FLAG_BUS_OFF
FDCAN_IR_BO
¶
-
Bus_Off status changed
-
HAL_FDCAN_FLAG_RAM_WATCHDOG
FDCAN_IR_WDI
¶
-
Message RAM Watchdog event due to missing READY
-
HAL_FDCAN_FLAG_ARB_PROTOCOL_ERROR
FDCAN_IR_PEA
¶
-
Protocol error in arbitration phase detected
-
HAL_FDCAN_FLAG_DATA_PROTOCOL_ERROR
FDCAN_IR_PED
¶
-
Protocol error in data phase detected
-
HAL_FDCAN_FLAG_RESERVED_ADDRESS_ACCESS
FDCAN_IR_ARA
¶
-
Access to reserved address occurred
-
HAL_FDCAN_FLAG_TIMESTAMP_WRAPAROUND
FDCAN_IR_TSW
¶
-
Timestamp counter wrapped around
-
HAL_FDCAN_FLAG_TIMEOUT_OCCURRED
FDCAN_IR_TOO
¶
-
Timeout reached
-
HAL_FDCAN_FLAG_RX_FIFO0_MSG_LOST
FDCAN_IR_RF0L
¶
- group FDCAN_Interrupt_Flags
-
FDCAN interrupt register (FDCAN_IR): The flags are set when one of the listed conditions is detected.
Defines
-
HAL_FDCAN_FLAG_RX_FIFO0_MSG_LOST
FDCAN_IR_RF0L
-
Rx FIFO 0 message lost
-
HAL_FDCAN_FLAG_RX_FIFO0_FULL
FDCAN_IR_RF0F
-
Rx FIFO 0 full
-
HAL_FDCAN_FLAG_RX_FIFO0_NEW_MSG
FDCAN_IR_RF0N
-
New message written to Rx FIFO 0
-
HAL_FDCAN_FLAG_RX_FIFO1_MSG_LOST
FDCAN_IR_RF1L
-
Rx FIFO 1 message lost
-
HAL_FDCAN_FLAG_RX_FIFO1_FULL
FDCAN_IR_RF1F
-
Rx FIFO 1 full
-
HAL_FDCAN_FLAG_RX_FIFO1_NEW_MSG
FDCAN_IR_RF1N
-
New message written to Rx FIFO 1
-
HAL_FDCAN_FLAG_RX_HIGH_PRIORITY_MSG
FDCAN_IR_HPM
-
High priority message received
-
HAL_FDCAN_FLAG_TX_COMPLETE
FDCAN_IR_TC
-
Transmission Completed
-
HAL_FDCAN_FLAG_TX_ABORT_COMPLETE
FDCAN_IR_TCF
-
Transmission Cancellation Finished
-
HAL_FDCAN_FLAG_TX_FIFO_EMPTY
FDCAN_IR_TFE
-
Tx FIFO Empty
-
HAL_FDCAN_FLAG_TX_EVT_FIFO_ELT_LOST
FDCAN_IR_TEFL
-
Tx Event FIFO element lost
-
HAL_FDCAN_FLAG_TX_EVT_FIFO_FULL
FDCAN_IR_TEFF
-
Tx Event FIFO full
-
HAL_FDCAN_FLAG_TX_EVT_FIFO_NEW_DATA
FDCAN_IR_TEFN
-
Tx Handler wrote Tx Event FIFO element
-
HAL_FDCAN_FLAG_RAM_ACCESS_FAILURE
FDCAN_IR_MRAF
-
Message RAM access failure occurred
-
HAL_FDCAN_FLAG_ERROR_LOGGING_OVERFLOW
FDCAN_IR_ELO
-
Overflow of FDCAN Error Logging Counter occurred
-
HAL_FDCAN_FLAG_ERROR_PASSIVE
FDCAN_IR_EP
-
Error_Passive status changed
-
HAL_FDCAN_FLAG_ERROR_WARNING
FDCAN_IR_EW
-
Error_Warning status changed
-
HAL_FDCAN_FLAG_BUS_OFF
FDCAN_IR_BO
-
Bus_Off status changed
-
HAL_FDCAN_FLAG_RAM_WATCHDOG
FDCAN_IR_WDI
-
Message RAM Watchdog event due to missing READY
-
HAL_FDCAN_FLAG_ARB_PROTOCOL_ERROR
FDCAN_IR_PEA
-
Protocol error in arbitration phase detected
-
HAL_FDCAN_FLAG_DATA_PROTOCOL_ERROR
FDCAN_IR_PED
-
Protocol error in data phase detected
-
HAL_FDCAN_FLAG_RESERVED_ADDRESS_ACCESS
FDCAN_IR_ARA
-
Access to reserved address occurred
-
HAL_FDCAN_FLAG_TIMESTAMP_WRAPAROUND
FDCAN_IR_TSW
-
Timestamp counter wrapped around
-
HAL_FDCAN_FLAG_TIMEOUT_OCCURRED
FDCAN_IR_TOO
-
Timeout reached
-
HAL_FDCAN_FLAG_RX_FIFO0_MSG_LOST
FDCAN_IR_RF0L
- group FDCAN_Interrupt_Flags
-
FDCAN interrupt register (FDCAN_IR): The flags are set when one of the listed conditions is detected.
Defines
-
HAL_FDCAN_FLAG_RX_FIFO0_MSG_LOST
FDCAN_IR_RF0L
-
Rx FIFO 0 message lost
-
HAL_FDCAN_FLAG_RX_FIFO0_FULL
FDCAN_IR_RF0F
-
Rx FIFO 0 full
-
HAL_FDCAN_FLAG_RX_FIFO0_NEW_MSG
FDCAN_IR_RF0N
-
New message written to Rx FIFO 0
-
HAL_FDCAN_FLAG_RX_FIFO1_MSG_LOST
FDCAN_IR_RF1L
-
Rx FIFO 1 message lost
-
HAL_FDCAN_FLAG_RX_FIFO1_FULL
FDCAN_IR_RF1F
-
Rx FIFO 1 full
-
HAL_FDCAN_FLAG_RX_FIFO1_NEW_MSG
FDCAN_IR_RF1N
-
New message written to Rx FIFO 1
-
HAL_FDCAN_FLAG_RX_HIGH_PRIORITY_MSG
FDCAN_IR_HPM
-
High priority message received
-
HAL_FDCAN_FLAG_TX_COMPLETE
FDCAN_IR_TC
-
Transmission Completed
-
HAL_FDCAN_FLAG_TX_ABORT_COMPLETE
FDCAN_IR_TCF
-
Transmission Cancellation Finished
-
HAL_FDCAN_FLAG_TX_FIFO_EMPTY
FDCAN_IR_TFE
-
Tx FIFO Empty
-
HAL_FDCAN_FLAG_TX_EVT_FIFO_ELT_LOST
FDCAN_IR_TEFL
-
Tx Event FIFO element lost
-
HAL_FDCAN_FLAG_TX_EVT_FIFO_FULL
FDCAN_IR_TEFF
-
Tx Event FIFO full
-
HAL_FDCAN_FLAG_TX_EVT_FIFO_NEW_DATA
FDCAN_IR_TEFN
-
Tx Handler wrote Tx Event FIFO element
-
HAL_FDCAN_FLAG_RAM_ACCESS_FAILURE
FDCAN_IR_MRAF
-
Message RAM access failure occurred
-
HAL_FDCAN_FLAG_ERROR_LOGGING_OVERFLOW
FDCAN_IR_ELO
-
Overflow of FDCAN Error Logging Counter occurred
-
HAL_FDCAN_FLAG_ERROR_PASSIVE
FDCAN_IR_EP
-
Error_Passive status changed
-
HAL_FDCAN_FLAG_ERROR_WARNING
FDCAN_IR_EW
-
Error_Warning status changed
-
HAL_FDCAN_FLAG_BUS_OFF
FDCAN_IR_BO
-
Bus_Off status changed
-
HAL_FDCAN_FLAG_RAM_WATCHDOG
FDCAN_IR_WDI
-
Message RAM Watchdog event due to missing READY
-
HAL_FDCAN_FLAG_ARB_PROTOCOL_ERROR
FDCAN_IR_PEA
-
Protocol error in arbitration phase detected
-
HAL_FDCAN_FLAG_DATA_PROTOCOL_ERROR
FDCAN_IR_PED
-
Protocol error in data phase detected
-
HAL_FDCAN_FLAG_RESERVED_ADDRESS_ACCESS
FDCAN_IR_ARA
-
Access to reserved address occurred
-
HAL_FDCAN_FLAG_TIMESTAMP_WRAPAROUND
FDCAN_IR_TSW
-
Timestamp counter wrapped around
-
HAL_FDCAN_FLAG_TIMEOUT_OCCURRED
FDCAN_IR_TOO
-
Timeout reached
-
HAL_FDCAN_FLAG_RX_FIFO0_MSG_LOST
FDCAN_IR_RF0L
FDCAN Interrupt Tx Complete Buffers select ¶
- group FDCAN_IT_Tx_Complete_Buffers_select
-
Defines
-
HAL_FDCAN_IT_TX_CPLT_BUFFER_0
(0x01UL
<<
FDCAN_TXBTIE_TIE_Pos)
¶
-
Tx complete interrupt on Tx buffer 0
-
HAL_FDCAN_IT_TX_CPLT_BUFFER_1
(0x02UL
<<
FDCAN_TXBTIE_TIE_Pos)
¶
-
Tx complete interrupt on Tx buffer 1
-
HAL_FDCAN_IT_TX_CPLT_BUFFER_2
(0x04UL
<<
FDCAN_TXBTIE_TIE_Pos)
¶
-
Tx complete interrupt on Tx buffer 2
-
HAL_FDCAN_IT_TX_CPLT_BUFFER_ALL
(
HAL_FDCAN_IT_TX_CPLT_BUFFER_0
\
|
HAL_FDCAN_IT_TX_CPLT_BUFFER_1\
|
HAL_FDCAN_IT_TX_CPLT_BUFFER_2 ) ¶
-
Tx complete interrupt on all Tx buffers
-
HAL_FDCAN_IT_TX_CPLT_BUFFER_0
(0x01UL
<<
FDCAN_TXBTIE_TIE_Pos)
¶
- group FDCAN_IT_Tx_Complete_Buffers_select
-
Defines
-
HAL_FDCAN_IT_TX_CPLT_BUFFER_0
(0x01UL
<<
FDCAN_TXBTIE_TIE_Pos)
-
Tx complete interrupt on Tx buffer 0
-
HAL_FDCAN_IT_TX_CPLT_BUFFER_1
(0x02UL
<<
FDCAN_TXBTIE_TIE_Pos)
-
Tx complete interrupt on Tx buffer 1
-
HAL_FDCAN_IT_TX_CPLT_BUFFER_2
(0x04UL
<<
FDCAN_TXBTIE_TIE_Pos)
-
Tx complete interrupt on Tx buffer 2
-
HAL_FDCAN_IT_TX_CPLT_BUFFER_ALL
(
HAL_FDCAN_IT_TX_CPLT_BUFFER_0
\
|
HAL_FDCAN_IT_TX_CPLT_BUFFER_1\
|
HAL_FDCAN_IT_TX_CPLT_BUFFER_2 )
-
Tx complete interrupt on all Tx buffers
-
HAL_FDCAN_IT_TX_CPLT_BUFFER_0
(0x01UL
<<
FDCAN_TXBTIE_TIE_Pos)
- group FDCAN_IT_Tx_Complete_Buffers_select
-
Defines
-
HAL_FDCAN_IT_TX_CPLT_BUFFER_0
(0x01UL
<<
FDCAN_TXBTIE_TIE_Pos)
-
Tx complete interrupt on Tx buffer 0
-
HAL_FDCAN_IT_TX_CPLT_BUFFER_1
(0x02UL
<<
FDCAN_TXBTIE_TIE_Pos)
-
Tx complete interrupt on Tx buffer 1
-
HAL_FDCAN_IT_TX_CPLT_BUFFER_2
(0x04UL
<<
FDCAN_TXBTIE_TIE_Pos)
-
Tx complete interrupt on Tx buffer 2
-
HAL_FDCAN_IT_TX_CPLT_BUFFER_ALL
(
HAL_FDCAN_IT_TX_CPLT_BUFFER_0
\
|
HAL_FDCAN_IT_TX_CPLT_BUFFER_1\
|
HAL_FDCAN_IT_TX_CPLT_BUFFER_2 )
-
Tx complete interrupt on all Tx buffers
-
HAL_FDCAN_IT_TX_CPLT_BUFFER_0
(0x01UL
<<
FDCAN_TXBTIE_TIE_Pos)
FDCAN Interrupt Tx Abort Buffer select ¶
- group FDCAN_IT_Tx_Abort_Buffers_select
-
Defines
-
HAL_FDCAN_IT_TX_ABORT_BUFFER_0
(0x01UL
<<
FDCAN_TXBCIE_CFIE_Pos)
¶
-
Tx abort interrupt on Tx buffer 0
-
HAL_FDCAN_IT_TX_ABORT_BUFFER_1
(0x02UL
<<
FDCAN_TXBCIE_CFIE_Pos)
¶
-
Tx abort interrupt on Tx buffer 1
-
HAL_FDCAN_IT_TX_ABORT_BUFFER_2
(0x04UL
<<
FDCAN_TXBCIE_CFIE_Pos)
¶
-
Tx abort interrupt on Tx buffer 2
-
HAL_FDCAN_IT_TX_ABORT_BUFFER_ALL
(
HAL_FDCAN_IT_TX_ABORT_BUFFER_0
\
|
HAL_FDCAN_IT_TX_ABORT_BUFFER_1\
|
HAL_FDCAN_IT_TX_ABORT_BUFFER_2 ) ¶
-
Tx abort interrupt on all Tx buffers
-
HAL_FDCAN_IT_TX_ABORT_BUFFER_0
(0x01UL
<<
FDCAN_TXBCIE_CFIE_Pos)
¶
- group FDCAN_IT_Tx_Abort_Buffers_select
-
Defines
-
HAL_FDCAN_IT_TX_ABORT_BUFFER_0
(0x01UL
<<
FDCAN_TXBCIE_CFIE_Pos)
-
Tx abort interrupt on Tx buffer 0
-
HAL_FDCAN_IT_TX_ABORT_BUFFER_1
(0x02UL
<<
FDCAN_TXBCIE_CFIE_Pos)
-
Tx abort interrupt on Tx buffer 1
-
HAL_FDCAN_IT_TX_ABORT_BUFFER_2
(0x04UL
<<
FDCAN_TXBCIE_CFIE_Pos)
-
Tx abort interrupt on Tx buffer 2
-
HAL_FDCAN_IT_TX_ABORT_BUFFER_ALL
(
HAL_FDCAN_IT_TX_ABORT_BUFFER_0
\
|
HAL_FDCAN_IT_TX_ABORT_BUFFER_1\
|
HAL_FDCAN_IT_TX_ABORT_BUFFER_2 )
-
Tx abort interrupt on all Tx buffers
-
HAL_FDCAN_IT_TX_ABORT_BUFFER_0
(0x01UL
<<
FDCAN_TXBCIE_CFIE_Pos)
- group FDCAN_IT_Tx_Abort_Buffers_select
-
Defines
-
HAL_FDCAN_IT_TX_ABORT_BUFFER_0
(0x01UL
<<
FDCAN_TXBCIE_CFIE_Pos)
-
Tx abort interrupt on Tx buffer 0
-
HAL_FDCAN_IT_TX_ABORT_BUFFER_1
(0x02UL
<<
FDCAN_TXBCIE_CFIE_Pos)
-
Tx abort interrupt on Tx buffer 1
-
HAL_FDCAN_IT_TX_ABORT_BUFFER_2
(0x04UL
<<
FDCAN_TXBCIE_CFIE_Pos)
-
Tx abort interrupt on Tx buffer 2
-
HAL_FDCAN_IT_TX_ABORT_BUFFER_ALL
(
HAL_FDCAN_IT_TX_ABORT_BUFFER_0
\
|
HAL_FDCAN_IT_TX_ABORT_BUFFER_1\
|
HAL_FDCAN_IT_TX_ABORT_BUFFER_2 )
-
Tx abort interrupt on all Tx buffers
-
HAL_FDCAN_IT_TX_ABORT_BUFFER_0
(0x01UL
<<
FDCAN_TXBCIE_CFIE_Pos)
HAL FDCAN Tx Location ¶
- group FDCAN_Tx_Buffer_location
-
Defines
-
HAL_FDCAN_TX_NO_BUFFER
0U
¶
-
No selected Tx Buffer
-
HAL_FDCAN_TX_BUFFER0
(1U
<<
0U)
¶
-
Tx Buffer 0
-
HAL_FDCAN_TX_BUFFER1
(1U
<<
1U)
¶
-
Tx Buffer 1
-
HAL_FDCAN_TX_BUFFER2
(1U
<<
2U)
¶
-
Tx Buffer 2
-
HAL_FDCAN_TX_BUFFER_ALL
(
HAL_FDCAN_TX_BUFFER0
\
|
HAL_FDCAN_TX_BUFFER1\
|
HAL_FDCAN_TX_BUFFER2 ) ¶
-
All Tx Buffers
-
HAL_FDCAN_TX_NO_BUFFER
0U
¶
- group FDCAN_Tx_Buffer_location
-
Defines
-
HAL_FDCAN_TX_NO_BUFFER
0U
-
No selected Tx Buffer
-
HAL_FDCAN_TX_BUFFER0
(1U
<<
0U)
-
Tx Buffer 0
-
HAL_FDCAN_TX_BUFFER1
(1U
<<
1U)
-
Tx Buffer 1
-
HAL_FDCAN_TX_BUFFER2
(1U
<<
2U)
-
Tx Buffer 2
-
HAL_FDCAN_TX_BUFFER_ALL
(
HAL_FDCAN_TX_BUFFER0
\
|
HAL_FDCAN_TX_BUFFER1\
|
HAL_FDCAN_TX_BUFFER2 )
-
All Tx Buffers
-
HAL_FDCAN_TX_NO_BUFFER
0U
- group FDCAN_Tx_Buffer_location
-
Defines
-
HAL_FDCAN_TX_NO_BUFFER
0U
-
No selected Tx Buffer
-
HAL_FDCAN_TX_BUFFER0
(1U
<<
0U)
-
Tx Buffer 0
-
HAL_FDCAN_TX_BUFFER1
(1U
<<
1U)
-
Tx Buffer 1
-
HAL_FDCAN_TX_BUFFER2
(1U
<<
2U)
-
Tx Buffer 2
-
HAL_FDCAN_TX_BUFFER_ALL
(
HAL_FDCAN_TX_BUFFER0
\
|
HAL_FDCAN_TX_BUFFER1\
|
HAL_FDCAN_TX_BUFFER2 )
-
All Tx Buffers
-
HAL_FDCAN_TX_NO_BUFFER
0U
FDCAN Timeout Select Configuration ¶
- group FDCAN_TIMEOUT_SELECT
-
Defines
-
HAL_FDCAN_TOCC_TOS_TX_FIFO
(1UL
<<
1U)
¶
-
Timeout controlled by Tx event FIFO
-
HAL_FDCAN_TOCC_TOS_RX_FIFO0
(1UL
<<
2U)
¶
-
Timeout controlled by Rx FIFO 0
-
HAL_FDCAN_TOCC_TOS_RX_FIFO1
(
HAL_FDCAN_TOCC_TOS_TX_FIFO
\
|
HAL_FDCAN_TOCC_TOS_RX_FIFO0 ) ¶
-
Timeout controlled by Rx FIFO 1
-
HAL_FDCAN_TOCC_TOS_TX_FIFO
(1UL
<<
1U)
¶
- group FDCAN_TIMEOUT_SELECT
-
Defines
-
HAL_FDCAN_TOCC_TOS_TX_FIFO
(1UL
<<
1U)
-
Timeout controlled by Tx event FIFO
-
HAL_FDCAN_TOCC_TOS_RX_FIFO0
(1UL
<<
2U)
-
Timeout controlled by Rx FIFO 0
-
HAL_FDCAN_TOCC_TOS_RX_FIFO1
(
HAL_FDCAN_TOCC_TOS_TX_FIFO
\
|
HAL_FDCAN_TOCC_TOS_RX_FIFO0 )
-
Timeout controlled by Rx FIFO 1
-
HAL_FDCAN_TOCC_TOS_TX_FIFO
(1UL
<<
1U)
- group FDCAN_TIMEOUT_SELECT
-
Defines
-
HAL_FDCAN_TOCC_TOS_TX_FIFO
(1UL
<<
1U)
-
Timeout controlled by Tx event FIFO
-
HAL_FDCAN_TOCC_TOS_RX_FIFO0
(1UL
<<
2U)
-
Timeout controlled by Rx FIFO 0
-
HAL_FDCAN_TOCC_TOS_RX_FIFO1
(
HAL_FDCAN_TOCC_TOS_TX_FIFO
\
|
HAL_FDCAN_TOCC_TOS_RX_FIFO0 )
-
Timeout controlled by Rx FIFO 1
-
HAL_FDCAN_TOCC_TOS_TX_FIFO
(1UL
<<
1U)
FDCAN Interrupt Lines ¶
- group FDCAN_Interrupt_Lines
-
FDCAN Interrupt lines.
- group FDCAN_Interrupt_Lines
-
FDCAN Interrupt lines.
Defines
-
HAL_FDCAN_IT_LINE_0
(1U
<<
0U)
-
Interrupt line 0
-
HAL_FDCAN_IT_LINE_1
(1U
<<
1U)
-
Interrupt line 1
-
HAL_FDCAN_IT_LINE_0
(1U
<<
0U)
- group FDCAN_Interrupt_Lines
-
FDCAN Interrupt lines.
Defines
-
HAL_FDCAN_IT_LINE_0
(1U
<<
0U)
-
Interrupt line 0
-
HAL_FDCAN_IT_LINE_1
(1U
<<
1U)
-
Interrupt line 1
-
HAL_FDCAN_IT_LINE_0
(1U
<<
0U)
FDCAN Frame Type ¶
- group FDCAN_frame_type
- group FDCAN_frame_type
-
Defines
-
HAL_FDCAN_FRAME_DATA
0U
-
Data frame type
-
HAL_FDCAN_FRAME_REMOTE
1U
-
Remote frame type
-
HAL_FDCAN_FRAME_DATA
0U
- group FDCAN_frame_type
-
Defines
-
HAL_FDCAN_FRAME_DATA
0U
-
Data frame type
-
HAL_FDCAN_FRAME_REMOTE
1U
-
Remote frame type
-
HAL_FDCAN_FRAME_DATA
0U
FDCAN ID type ¶
- group FDCAN_id_type
- group FDCAN_id_type
-
Defines
-
HAL_FDCAN_ID_STANDARD
0U
-
Standard ID type
-
HAL_FDCAN_ID_EXTENDED
1U
-
Extended ID type
-
HAL_FDCAN_ID_STANDARD
0U
- group FDCAN_id_type
-
Defines
-
HAL_FDCAN_ID_STANDARD
0U
-
Standard ID type
-
HAL_FDCAN_ID_EXTENDED
1U
-
Extended ID type
-
HAL_FDCAN_ID_STANDARD
0U
FDCAN error state indicator ¶
- group FDCAN_error_state_indicator
- group FDCAN_error_state_indicator
-
Defines
-
HAL_FDCAN_ERROR_STATE_IND_ACTIVE
0U
-
Active error state indicator
-
HAL_FDCAN_ERROR_STATE_IND_PASSIVE
1U
-
Passive error state indicator
-
HAL_FDCAN_ERROR_STATE_IND_ACTIVE
0U
- group FDCAN_error_state_indicator
-
Defines
-
HAL_FDCAN_ERROR_STATE_IND_ACTIVE
0U
-
Active error state indicator
-
HAL_FDCAN_ERROR_STATE_IND_PASSIVE
1U
-
Passive error state indicator
-
HAL_FDCAN_ERROR_STATE_IND_ACTIVE
0U
FDCAN bit rate switching ¶
- group FDCAN_bit_rate_switching
- group FDCAN_bit_rate_switching
-
Defines
-
HAL_FDCAN_BIT_RATE_SWITCH_OFF
0U
-
Bit rate switching OFF
-
HAL_FDCAN_BIT_RATE_SWITCH_ON
1U
-
Bit rate switching ON
-
HAL_FDCAN_BIT_RATE_SWITCH_OFF
0U
- group FDCAN_bit_rate_switching
-
Defines
-
HAL_FDCAN_BIT_RATE_SWITCH_OFF
0U
-
Bit rate switching OFF
-
HAL_FDCAN_BIT_RATE_SWITCH_ON
1U
-
Bit rate switching ON
-
HAL_FDCAN_BIT_RATE_SWITCH_OFF
0U
FDCAN header frame format ¶
- group FDCAN_header_frame_format
- group FDCAN_header_frame_format
-
Defines
-
HAL_FDCAN_FRAME_FORMAT_CAN
0U
-
Standard frame format
-
HAL_FDCAN_FRAME_FORMAT_FD_CAN
1U
-
FDCAN frame format (new DLC-coding and CRC)
-
HAL_FDCAN_FRAME_FORMAT_CAN
0U
- group FDCAN_header_frame_format
-
Defines
-
HAL_FDCAN_FRAME_FORMAT_CAN
0U
-
Standard frame format
-
HAL_FDCAN_FRAME_FORMAT_FD_CAN
1U
-
FDCAN frame format (new DLC-coding and CRC)
-
HAL_FDCAN_FRAME_FORMAT_CAN
0U
FDCAN event FIFO ¶
- group FDCAN_event_FIFO
- group FDCAN_event_FIFO
-
Defines
-
HAL_FDCAN_FIFO_NO_TX_EVENTS
0U
-
Do not store Tx event in FIFO
-
HAL_FDCAN_FIFO_STORE_TX_EVENTS
1U
-
Store Tx event in FIFO
-
HAL_FDCAN_FIFO_NO_TX_EVENTS
0U
- group FDCAN_event_FIFO
-
Defines
-
HAL_FDCAN_FIFO_NO_TX_EVENTS
0U
-
Do not store Tx event in FIFO
-
HAL_FDCAN_FIFO_STORE_TX_EVENTS
1U
-
Store Tx event in FIFO
-
HAL_FDCAN_FIFO_NO_TX_EVENTS
0U
FDCAN Tx event type ¶
- group FDCAN_Tx_event_type
- group FDCAN_Tx_event_type
-
Defines
-
HAL_FDCAN_TX_EVENT
1U
-
Tx event
-
HAL_FDCAN_TX_EVENT_IN_SPITE_OF_ABORT
2U
-
Transmission in spite of cancellation
-
HAL_FDCAN_TX_EVENT
1U
- group FDCAN_Tx_event_type
-
Defines
-
HAL_FDCAN_TX_EVENT
1U
-
Tx event
-
HAL_FDCAN_TX_EVENT_IN_SPITE_OF_ABORT
2U
-
Transmission in spite of cancellation
-
HAL_FDCAN_TX_EVENT
1U
FDCAN Data Length Code ¶
- group FDCAN_data_length_code
-
The definition is the following one:
-
0 to 8: classic CAN & CAN FD: received frame has 0 to 8 data bytes
-
9 to 15: classic CAN: received frame has 8 data bytes (max)
-
9 to 15: CAN FD: received frame has 12/16/20/24/32/48/64 data bytes
Defines
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_0BYTE
0x0U
¶
-
0 byte data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_1BYTE
0x1U
¶
-
1 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_2BYTE
0x2U
¶
-
2 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_3BYTE
0x3U
¶
-
3 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_4BYTE
0x4U
¶
-
4 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_5BYTE
0x5U
¶
-
5 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_6BYTE
0x6U
¶
-
6 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_7BYTE
0x7U
¶
-
7 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_8BYTE
0x8U
¶
-
8 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_12BYTE
0x9U
¶
-
12 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_16BYTE
0xAU
¶
-
16 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_20BYTE
0xBU
¶
-
20 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_24BYTE
0xCU
¶
-
24 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_32BYTE
0xDU
¶
-
32 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_48BYTE
0xEU
¶
-
48 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_64BYTE
0xFU
¶
-
64 bytes data length code
-
- group FDCAN_data_length_code
-
The definition is the following one:
-
0 to 8: classic CAN & CAN FD: received frame has 0 to 8 data bytes
-
9 to 15: classic CAN: received frame has 8 data bytes (max)
-
9 to 15: CAN FD: received frame has 12/16/20/24/32/48/64 data bytes
Defines
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_0BYTE
0x0U
-
0 byte data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_1BYTE
0x1U
-
1 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_2BYTE
0x2U
-
2 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_3BYTE
0x3U
-
3 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_4BYTE
0x4U
-
4 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_5BYTE
0x5U
-
5 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_6BYTE
0x6U
-
6 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_7BYTE
0x7U
-
7 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_8BYTE
0x8U
-
8 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_12BYTE
0x9U
-
12 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_16BYTE
0xAU
-
16 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_20BYTE
0xBU
-
20 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_24BYTE
0xCU
-
24 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_32BYTE
0xDU
-
32 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_48BYTE
0xEU
-
48 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_64BYTE
0xFU
-
64 bytes data length code
-
- group FDCAN_data_length_code
-
The definition is the following one:
-
0 to 8: classic CAN & CAN FD: received frame has 0 to 8 data bytes
-
9 to 15: classic CAN: received frame has 8 data bytes (max)
-
9 to 15: CAN FD: received frame has 12/16/20/24/32/48/64 data bytes
Defines
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_0BYTE
0x0U
-
0 byte data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_1BYTE
0x1U
-
1 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_2BYTE
0x2U
-
2 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_3BYTE
0x3U
-
3 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_4BYTE
0x4U
-
4 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_5BYTE
0x5U
-
5 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_6BYTE
0x6U
-
6 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_7BYTE
0x7U
-
7 bytes data length code
-
HAL_FDCAN_DATA_LGTH_CAN_FDCAN_8BYTE
0x8U
-
8 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_12BYTE
0x9U
-
12 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_16BYTE
0xAU
-
16 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_20BYTE
0xBU
-
20 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_24BYTE
0xCU
-
24 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_32BYTE
0xDU
-
32 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_48BYTE
0xEU
-
48 bytes data length code
-
HAL_FDCAN_DATA_LGTH_FDCAN_64BYTE
0xFU
-
64 bytes data length code
-