LL TIM APIs ¶
|
API |
Min Code Size (Bytes) |
Default Code Size (Bytes) |
Max Code Size (Bytes) |
Called functions |
|---|---|---|---|---|
|
LL_TIM_CC_DisableChannel |
8 |
8 |
8 |
None |
|
LL_TIM_CC_DisablePreload |
10 |
10 |
10 |
None |
|
LL_TIM_CC_EnableChannel |
8 |
8 |
8 |
None |
|
LL_TIM_CC_EnablePreload |
10 |
10 |
10 |
None |
|
LL_TIM_CC_GetDMAReqTrigger |
8 |
8 |
8 |
None |
|
LL_TIM_CC_GetLockLevel |
8 |
8 |
8 |
None |
|
LL_TIM_CC_GetUpdate |
8 |
8 |
8 |
None |
|
LL_TIM_CC_IsEnabledChannel |
16 |
16 |
16 |
None |
|
LL_TIM_CC_IsEnabledPreload |
8 |
8 |
8 |
None |
|
LL_TIM_CC_SetDMAReqTrigger |
12 |
12 |
12 |
None |
|
LL_TIM_CC_SetLockLevel |
12 |
12 |
12 |
None |
|
LL_TIM_CC_SetUpdate |
12 |
12 |
12 |
None |
|
LL_TIM_ClearFlag_B2G |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_BG |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_BRK |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_BRK2 |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_CC1 |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_CC1OVR |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_CC2 |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_CC2OVR |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_CC3 |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_CC3OVR |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_CC4 |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_CC4OVR |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_CC5 |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_CC6 |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_CC7 |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_COM |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_DIR |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_IDX |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_IERR |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_SYSBRK |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_TERR |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_TRIG |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_UIOVR |
8 |
8 |
8 |
None |
|
LL_TIM_ClearFlag_UPDATE |
8 |
8 |
8 |
None |
|
LL_TIM_ConfigBRK |
26 |
26 |
26 |
None |
|
LL_TIM_ConfigBRK2 |
26 |
26 |
26 |
None |
|
LL_TIM_ConfigDMABurst |
24 |
24 |
24 |
None |
|
LL_TIM_ConfigETR |
22 |
22 |
22 |
None |
|
LL_TIM_ConfigEncoderIndex |
12 |
12 |
12 |
None |
|
LL_TIM_DisableADCSynchronization |
10 |
10 |
10 |
None |
|
LL_TIM_DisableARRPreload |
10 |
10 |
10 |
None |
|
LL_TIM_DisableAllOutputs |
10 |
10 |
10 |
None |
|
LL_TIM_DisableAsymmetricalDeadTime |
10 |
10 |
10 |
None |
|
LL_TIM_DisableAutomaticOutput |
10 |
10 |
10 |
None |
|
LL_TIM_DisableBRK |
20 |
20 |
20 |
None |
|
LL_TIM_DisableBRK2 |
20 |
20 |
20 |
None |
|
LL_TIM_DisableBreakInput |
14 |
14 |
14 |
None |
|
LL_TIM_DisableBreakInputSource |
20 |
20 |
20 |
None |
|
LL_TIM_DisableCounter |
10 |
10 |
10 |
None |
|
LL_TIM_DisableDMAReq |
8 |
8 |
8 |
None |
|
LL_TIM_DisableDMAReq_CC1 |
10 |
10 |
10 |
None |
|
LL_TIM_DisableDMAReq_CC2 |
10 |
10 |
10 |
None |
|
LL_TIM_DisableDMAReq_CC3 |
10 |
10 |
10 |
None |
|
LL_TIM_DisableDMAReq_CC4 |
10 |
10 |
10 |
None |
|
LL_TIM_DisableDMAReq_COM |
10 |
10 |
10 |
None |
|
LL_TIM_DisableDMAReq_TRIG |
10 |
10 |
10 |
None |
|
LL_TIM_DisableDMAReq_UPDATE |
10 |
10 |
10 |
None |
|
LL_TIM_DisableDeadTimePreload |
10 |
10 |
10 |
None |
|
LL_TIM_DisableDithering |
10 |
10 |
10 |
None |
|
LL_TIM_DisableEncoderIndex |
10 |
10 |
10 |
None |
|
LL_TIM_DisableExternalClock |
10 |
10 |
10 |
None |
|
LL_TIM_DisableFirstIndex |
10 |
10 |
10 |
None |
|
LL_TIM_DisableIT |
8 |
8 |
8 |
None |
|
LL_TIM_DisableIT_BRK |
10 |
10 |
10 |
None |
|
LL_TIM_DisableIT_CC1 |
10 |
10 |
10 |
None |
|
LL_TIM_DisableIT_CC2 |
10 |
10 |
10 |
None |
|
LL_TIM_DisableIT_CC3 |
10 |
10 |
10 |
None |
|
LL_TIM_DisableIT_CC4 |
10 |
10 |
10 |
None |
|
LL_TIM_DisableIT_COM |
10 |
10 |
10 |
None |
|
LL_TIM_DisableIT_DIR |
10 |
10 |
10 |
None |
|
LL_TIM_DisableIT_IDX |
10 |
10 |
10 |
None |
|
LL_TIM_DisableIT_IERR |
10 |
10 |
10 |
None |
|
LL_TIM_DisableIT_TERR |
10 |
10 |
10 |
None |
|
LL_TIM_DisableIT_TRIG |
10 |
10 |
10 |
None |
|
LL_TIM_DisableIT_UPDATE |
10 |
10 |
10 |
None |
|
LL_TIM_DisableMasterSlaveMode |
10 |
10 |
10 |
None |
|
LL_TIM_DisableOnePulseMode |
10 |
10 |
10 |
None |
|
LL_TIM_DisableSMSPreload |
10 |
10 |
10 |
None |
|
LL_TIM_DisableUIFRemap |
10 |
10 |
10 |
None |
|
LL_TIM_DisableUpdateEvent |
10 |
10 |
10 |
None |
|
LL_TIM_DisarmBRK |
10 |
10 |
10 |
None |
|
LL_TIM_DisarmBRK2 |
10 |
10 |
10 |
None |
|
LL_TIM_DisarmBreakInput |
14 |
14 |
14 |
None |
|
LL_TIM_EnableADCSynchronization |
10 |
10 |
10 |
None |
|
LL_TIM_EnableARRPreload |
10 |
10 |
10 |
None |
|
LL_TIM_EnableAllOutputs |
10 |
10 |
10 |
None |
|
LL_TIM_EnableAsymmetricalDeadTime |
10 |
10 |
10 |
None |
|
LL_TIM_EnableAutomaticOutput |
10 |
10 |
10 |
None |
|
LL_TIM_EnableBRK |
20 |
20 |
20 |
None |
|
LL_TIM_EnableBRK2 |
20 |
20 |
20 |
None |
|
LL_TIM_EnableBreakInput |
14 |
14 |
14 |
None |
|
LL_TIM_EnableBreakInputSource |
20 |
20 |
20 |
None |
|
LL_TIM_EnableCounter |
10 |
10 |
10 |
None |
|
LL_TIM_EnableDMAReq |
8 |
8 |
8 |
None |
|
LL_TIM_EnableDMAReq_CC1 |
10 |
10 |
10 |
None |
|
LL_TIM_EnableDMAReq_CC2 |
10 |
10 |
10 |
None |
|
LL_TIM_EnableDMAReq_CC3 |
10 |
10 |
10 |
None |
|
LL_TIM_EnableDMAReq_CC4 |
10 |
10 |
10 |
None |
|
LL_TIM_EnableDMAReq_COM |
10 |
10 |
10 |
None |
|
LL_TIM_EnableDMAReq_TRIG |
10 |
10 |
10 |
None |
|
LL_TIM_EnableDMAReq_UPDATE |
10 |
10 |
10 |
None |
|
LL_TIM_EnableDeadTimePreload |
10 |
10 |
10 |
None |
|
LL_TIM_EnableDithering |
10 |
10 |
10 |
None |
|
LL_TIM_EnableEncoderIndex |
10 |
10 |
10 |
None |
|
LL_TIM_EnableExternalClock |
10 |
10 |
10 |
None |
|
LL_TIM_EnableFirstIndex |
10 |
10 |
10 |
None |
|
LL_TIM_EnableIT |
8 |
8 |
8 |
None |
|
LL_TIM_EnableIT_BRK |
10 |
10 |
10 |
None |
|
LL_TIM_EnableIT_CC1 |
10 |
10 |
10 |
None |
|
LL_TIM_EnableIT_CC2 |
10 |
10 |
10 |
None |
|
LL_TIM_EnableIT_CC3 |
10 |
10 |
10 |
None |
|
LL_TIM_EnableIT_CC4 |
10 |
10 |
10 |
None |
|
LL_TIM_EnableIT_COM |
10 |
10 |
10 |
None |
|
LL_TIM_EnableIT_DIR |
10 |
10 |
10 |
None |
|
LL_TIM_EnableIT_IDX |
10 |
10 |
10 |
None |
|
LL_TIM_EnableIT_IERR |
10 |
10 |
10 |
None |
|
LL_TIM_EnableIT_TERR |
10 |
10 |
10 |
None |
|
LL_TIM_EnableIT_TRIG |
10 |
10 |
10 |
None |
|
LL_TIM_EnableIT_UPDATE |
10 |
10 |
10 |
None |
|
LL_TIM_EnableMasterSlaveMode |
10 |
10 |
10 |
None |
|
LL_TIM_EnableOnePulseMode |
10 |
10 |
10 |
None |
|
LL_TIM_EnableSMSPreload |
10 |
10 |
10 |
None |
|
LL_TIM_EnableUIFRemap |
10 |
10 |
10 |
None |
|
LL_TIM_EnableUpdateEvent |
10 |
10 |
10 |
None |
|
LL_TIM_GenerateEvent |
8 |
8 |
8 |
None |
|
LL_TIM_GenerateEvent_BRK |
10 |
10 |
10 |
None |
|
LL_TIM_GenerateEvent_BRK2 |
10 |
10 |
10 |
None |
|
LL_TIM_GenerateEvent_CC1 |
10 |
10 |
10 |
None |
|
LL_TIM_GenerateEvent_CC2 |
10 |
10 |
10 |
None |
|
LL_TIM_GenerateEvent_CC3 |
10 |
10 |
10 |
None |
|
LL_TIM_GenerateEvent_CC4 |
10 |
10 |
10 |
None |
|
LL_TIM_GenerateEvent_COM |
10 |
10 |
10 |
None |
|
LL_TIM_GenerateEvent_TRIG |
10 |
10 |
10 |
None |
|
LL_TIM_GenerateEvent_UPDATE |
10 |
10 |
10 |
None |
|
LL_TIM_GetAutoReload |
4 |
4 |
4 |
None |
|
LL_TIM_GetBreakDelay |
16 |
16 |
16 |
None |
|
LL_TIM_GetBreakInputAFMode |
12 |
12 |
12 |
None |
|
LL_TIM_GetBreakInputFilter |
12 |
12 |
12 |
None |
|
LL_TIM_GetBreakInputPolarity |
12 |
12 |
12 |
None |
|
LL_TIM_GetBreakInputSourcePolarity |
46 |
46 |
46 |
None |
|
LL_TIM_GetCH5CombinedChannels |
8 |
8 |
8 |
None |
|
LL_TIM_GetClockDivision |
8 |
8 |
8 |
None |
|
LL_TIM_GetClockDivision2 |
8 |
8 |
8 |
None |
|
LL_TIM_GetClockSource |
22 |
22 |
22 |
None |
|
LL_TIM_GetConfigBRK |
34 |
34 |
34 |
None |
|
LL_TIM_GetConfigBRK2 |
34 |
34 |
34 |
None |
|
LL_TIM_GetConfigDMABurst |
36 |
36 |
36 |
None |
|
LL_TIM_GetConfigETR |
36 |
36 |
36 |
None |
|
LL_TIM_GetCounter |
4 |
4 |
4 |
None |
|
LL_TIM_GetCounterMode |
22 |
22 |
22 |
None |
|
LL_TIM_GetDMABurstSource |
10 |
10 |
10 |
None |
|
LL_TIM_GetDirection |
8 |
8 |
8 |
None |
|
LL_TIM_GetETRSource |
8 |
8 |
8 |
None |
|
LL_TIM_GetFallingDeadTime |
8 |
8 |
8 |
None |
|
LL_TIM_GetIndexBlanking |
8 |
8 |
8 |
None |
|
LL_TIM_GetIndexDirection |
8 |
8 |
8 |
None |
|
LL_TIM_GetIndexPositionning |
8 |
8 |
8 |
None |
|
LL_TIM_GetOCRefClearInputSource |
18 |
18 |
18 |
None |
|
LL_TIM_GetOffStates |
26 |
26 |
26 |
None |
|
LL_TIM_GetOutputDisableStatus |
8 |
8 |
8 |
None |
|
LL_TIM_GetPrescaler |
4 |
4 |
4 |
None |
|
LL_TIM_GetRepetitionCounter |
4 |
4 |
4 |
None |
|
LL_TIM_GetSMSPreloadSource |
8 |
8 |
8 |
None |
|
LL_TIM_GetSlaveMode |
10 |
10 |
10 |
None |
|
LL_TIM_GetTriggerInput |
10 |
10 |
10 |
None |
|
LL_TIM_GetTriggerOutput |
10 |
10 |
10 |
None |
|
LL_TIM_GetTriggerOutput2 |
8 |
8 |
8 |
None |
|
LL_TIM_GetTriggerOutput2Postscaler |
8 |
8 |
8 |
None |
|
LL_TIM_GetUpdateSource |
8 |
8 |
8 |
None |
|
LL_TIM_IC_Config |
184 |
184 |
184 |
None |
|
LL_TIM_IC_DisableXORCombination |
10 |
10 |
10 |
None |
|
LL_TIM_IC_DisableXORGateInputInversion |
124 |
124 |
124 |
None |
|
LL_TIM_IC_EnableXORCombination |
10 |
10 |
10 |
None |
|
LL_TIM_IC_EnableXORGateInputInversion |
124 |
124 |
124 |
None |
|
LL_TIM_IC_GetActiveInput |
134 |
134 |
134 |
None |
|
LL_TIM_IC_GetCaptureCH1 |
4 |
4 |
4 |
None |
|
LL_TIM_IC_GetCaptureCH2 |
4 |
4 |
4 |
None |
|
LL_TIM_IC_GetCaptureCH3 |
4 |
4 |
4 |
None |
|
LL_TIM_IC_GetCaptureCH4 |
4 |
4 |
4 |
None |
|
LL_TIM_IC_GetCapturedValue |
116 |
116 |
116 |
None |
|
LL_TIM_IC_GetFilter |
134 |
134 |
134 |
None |
|
LL_TIM_IC_GetInputStatus |
124 |
124 |
124 |
None |
|
LL_TIM_IC_GetPolarity |
118 |
118 |
118 |
None |
|
LL_TIM_IC_GetPrescaler |
134 |
134 |
134 |
None |
|
LL_TIM_IC_GetSource |
118 |
118 |
118 |
None |
|
LL_TIM_IC_GetXORGatePosition |
8 |
8 |
8 |
None |
|
LL_TIM_IC_IsEnabledXORCombination |
10 |
10 |
10 |
None |
|
LL_TIM_IC_IsEnabledXORGateInputInversion |
132 |
132 |
132 |
None |
|
LL_TIM_IC_SetActiveInput |
150 |
150 |
150 |
None |
|
LL_TIM_IC_SetFilter |
150 |
150 |
150 |
None |
|
LL_TIM_IC_SetPolarity |
124 |
124 |
124 |
None |
|
LL_TIM_IC_SetPrescaler |
150 |
150 |
150 |
None |
|
LL_TIM_IC_SetSource |
12 |
12 |
12 |
None |
|
LL_TIM_IC_SetXORGatePosition |
12 |
12 |
12 |
None |
|
LL_TIM_IsActiveFlag_B2G |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_BG |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_BRK |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_BRK2 |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_CC1 |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_CC1OVR |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_CC2 |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_CC2OVR |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_CC3 |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_CC3OVR |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_CC4 |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_CC4OVR |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_CC5 |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_CC6 |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_CC7 |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_COM |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_DIR |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_IDX |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_IERR |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_SYSBRK |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_TERR |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_TRIG |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_UIOVR |
10 |
10 |
10 |
None |
|
LL_TIM_IsActiveFlag_UPDATE |
8 |
8 |
8 |
None |
|
LL_TIM_IsActiveUIFCPY |
4 |
4 |
4 |
None |
|
LL_TIM_IsDisarmedBRK |
10 |
10 |
10 |
None |
|
LL_TIM_IsDisarmedBRK2 |
10 |
10 |
10 |
None |
|
LL_TIM_IsDisarmedBreakInput |
22 |
22 |
22 |
None |
|
LL_TIM_IsEnabledADCSynchronization |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledARRPreload |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledAllOutputs |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledAsymmetricalDeadTime |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledAutomaticOutput |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledBreakInput |
22 |
22 |
22 |
None |
|
LL_TIM_IsEnabledBreakInputSource |
24 |
24 |
24 |
None |
|
LL_TIM_IsEnabledCounter |
8 |
8 |
8 |
None |
|
LL_TIM_IsEnabledDMAReq_CC1 |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledDMAReq_CC2 |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledDMAReq_CC3 |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledDMAReq_CC4 |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledDMAReq_COM |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledDMAReq_TRIG |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledDMAReq_UPDATE |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledDeadTimePreload |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledDithering |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledEncoderIndex |
8 |
8 |
8 |
None |
|
LL_TIM_IsEnabledExternalClock |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledFirstIndex |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledIT_BRK |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledIT_CC1 |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledIT_CC2 |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledIT_CC3 |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledIT_CC4 |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledIT_COM |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledIT_DIR |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledIT_IDX |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledIT_IERR |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledIT_TERR |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledIT_TRIG |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledIT_UPDATE |
8 |
8 |
8 |
None |
|
LL_TIM_IsEnabledMasterSlaveMode |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledOnePulseMode |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledSMSPreload |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledUIFRemap |
10 |
10 |
10 |
None |
|
LL_TIM_IsEnabledUpdateEvent |
14 |
14 |
14 |
None |
|
LL_TIM_MASK_TAB_BKxBID |
8 |
8 |
8 |
None |
|
LL_TIM_MASK_TAB_BKxE |
8 |
8 |
8 |
None |
|
LL_TIM_MASK_TAB_BKxF |
8 |
8 |
8 |
None |
|
LL_TIM_MASK_TAB_BKxP |
8 |
8 |
8 |
None |
|
LL_TIM_OC_ConfigOutput |
200 |
200 |
200 |
None |
|
LL_TIM_OC_DisableClear |
124 |
124 |
124 |
None |
|
LL_TIM_OC_DisableFast |
128 |
128 |
128 |
None |
|
LL_TIM_OC_DisableOutputOverride |
14 |
14 |
14 |
None |
|
LL_TIM_OC_DisablePreload |
128 |
128 |
128 |
None |
|
LL_TIM_OC_EnableClear |
124 |
124 |
124 |
None |
|
LL_TIM_OC_EnableFast |
128 |
128 |
128 |
None |
|
LL_TIM_OC_EnableOutputOverride |
14 |
14 |
14 |
None |
|
LL_TIM_OC_EnablePreload |
128 |
128 |
128 |
None |
|
LL_TIM_OC_GetBreakMode |
110 |
110 |
110 |
None |
|
LL_TIM_OC_GetCompareCH1 |
4 |
4 |
4 |
None |
|
LL_TIM_OC_GetCompareCH2 |
4 |
4 |
4 |
None |
|
LL_TIM_OC_GetCompareCH3 |
4 |
4 |
4 |
None |
|
LL_TIM_OC_GetCompareCH4 |
4 |
4 |
4 |
None |
|
LL_TIM_OC_GetCompareCH5 |
8 |
8 |
8 |
None |
|
LL_TIM_OC_GetCompareCH6 |
4 |
4 |
4 |
None |
|
LL_TIM_OC_GetCompareCH7 |
4 |
4 |
4 |
None |
|
LL_TIM_OC_GetCompareValue |
34 |
34 |
34 |
None |
|
LL_TIM_OC_GetDeadTime |
8 |
8 |
8 |
None |
|
LL_TIM_OC_GetIdleState |
120 |
120 |
120 |
None |
|
LL_TIM_OC_GetMode |
134 |
134 |
134 |
None |
|
LL_TIM_OC_GetOverrideState |
108 |
108 |
108 |
None |
|
LL_TIM_OC_GetPolarity |
118 |
118 |
118 |
None |
|
LL_TIM_OC_GetPulseWidth |
8 |
8 |
8 |
None |
|
LL_TIM_OC_GetPulseWidthPrescaler |
8 |
8 |
8 |
None |
|
LL_TIM_OC_IsEnabledClear |
132 |
132 |
132 |
None |
|
LL_TIM_OC_IsEnabledFast |
136 |
136 |
136 |
None |
|
LL_TIM_OC_IsEnabledOutputOverride |
12 |
12 |
12 |
None |
|
LL_TIM_OC_IsEnabledPreload |
136 |
136 |
136 |
None |
|
LL_TIM_OC_SetBreakMode |
122 |
122 |
122 |
None |
|
LL_TIM_OC_SetCompareCH1 |
4 |
4 |
4 |
None |
|
LL_TIM_OC_SetCompareCH2 |
4 |
4 |
4 |
None |
|
LL_TIM_OC_SetCompareCH3 |
4 |
4 |
4 |
None |
|
LL_TIM_OC_SetCompareCH4 |
4 |
4 |
4 |
None |
|
LL_TIM_OC_SetCompareCH5 |
12 |
12 |
12 |
None |
|
LL_TIM_OC_SetCompareCH6 |
4 |
4 |
4 |
None |
|
LL_TIM_OC_SetCompareCH7 |
4 |
4 |
4 |
None |
|
LL_TIM_OC_SetCompareValue |
40 |
40 |
40 |
None |
|
LL_TIM_OC_SetDeadTime |
12 |
12 |
12 |
None |
|
LL_TIM_OC_SetIdleState |
126 |
126 |
126 |
None |
|
LL_TIM_OC_SetMode |
142 |
142 |
142 |
None |
|
LL_TIM_OC_SetOverrideState |
120 |
120 |
120 |
None |
|
LL_TIM_OC_SetPolarity |
124 |
124 |
124 |
None |
|
LL_TIM_OC_SetPulseWidthPrescaler |
12 |
12 |
12 |
None |
|
LL_TIM_OFFSET_TAB_CCMRx |
12 |
12 |
12 |
None |
|
LL_TIM_OFFSET_TAB_CCRx |
8 |
8 |
8 |
None |
|
LL_TIM_SHIFT_TAB_CCxP |
12 |
12 |
12 |
None |
|
LL_TIM_SHIFT_TAB_ICxx |
12 |
12 |
12 |
None |
|
LL_TIM_SHIFT_TAB_OCxx |
12 |
12 |
12 |
None |
|
LL_TIM_SHIFT_TAB_OISx |
12 |
12 |
12 |
None |
|
LL_TIM_SetAutoReload |
4 |
4 |
4 |
None |
|
LL_TIM_SetBreakDelay |
28 |
28 |
28 |
None |
|
LL_TIM_SetBreakInputAFMode |
20 |
20 |
20 |
None |
|
LL_TIM_SetBreakInputFilter |
20 |
20 |
20 |
None |
|
LL_TIM_SetBreakInputPolarity |
20 |
20 |
20 |
None |
|
LL_TIM_SetBreakInputSourcePolarity |
58 |
58 |
58 |
None |
|
LL_TIM_SetCH5CombinedChannels |
12 |
12 |
12 |
None |
|
LL_TIM_SetClockDivision |
12 |
12 |
12 |
None |
|
LL_TIM_SetClockDivision2 |
12 |
12 |
12 |
None |
|
LL_TIM_SetClockSource |
14 |
14 |
14 |
None |
|
LL_TIM_SetCounterMode |
12 |
12 |
12 |
None |
|
LL_TIM_SetETRSource |
12 |
12 |
12 |
None |
|
LL_TIM_SetFallingDeadTime |
12 |
12 |
12 |
None |
|
LL_TIM_SetIndexBlanking |
12 |
12 |
12 |
None |
|
LL_TIM_SetIndexDirection |
12 |
12 |
12 |
None |
|
LL_TIM_SetIndexPositionning |
12 |
12 |
12 |
None |
|
LL_TIM_SetOCRefClearInputSource |
26 |
26 |
26 |
None |
|
LL_TIM_SetOffStates |
14 |
14 |
14 |
None |
|
LL_TIM_SetPrescaler |
4 |
4 |
4 |
None |
|
LL_TIM_SetRepetitionCounter |
4 |
4 |
4 |
None |
|
LL_TIM_SetSMSPreloadSource |
12 |
12 |
12 |
None |
|
LL_TIM_SetSlaveMode |
14 |
14 |
14 |
None |
|
LL_TIM_SetTriggerInput |
14 |
14 |
14 |
None |
|
LL_TIM_SetTriggerOutput |
14 |
14 |
14 |
None |
|
LL_TIM_SetTriggerOutput2 |
12 |
12 |
12 |
None |
|
LL_TIM_SetTriggerOutput2Postscaler |
14 |
14 |
14 |
None |
|
LL_TIM_SetUpdateSource |
12 |
12 |
12 |
None |
HAL TIM APIs ¶
|
API |
Min Code Size (Bytes) |
Default Code Size (Bytes) |
Max Code Size (Bytes) |
Called functions |
|---|---|---|---|---|
|
HAL_TIM_BREAK_DisableAutomaticOutput |
18 |
18 |
98 |
LL_TIM_DisableAutomaticOutput(Min)(Def)(Max) |
|
HAL_TIM_BREAK_DisableInput |
24 |
24 |
172 |
LL_TIM_DisableBreakInput(Min)(Def)(Max) |
|
HAL_TIM_BREAK_DisableInputSource |
28 |
28 |
228 |
LL_TIM_DisableBreakInputSource(Min)(Def)(Max) |
|
HAL_TIM_BREAK_DisableMainOutput |
18 |
18 |
100 |
LL_TIM_DisableAllOutputs(Min)(Def)(Max) |
|
HAL_TIM_BREAK_EnableAutomaticOutput |
18 |
18 |
98 |
LL_TIM_EnableAutomaticOutput(Min)(Def)(Max) |
|
HAL_TIM_BREAK_EnableInput |
24 |
24 |
172 |
LL_TIM_EnableBreakInput(Min)(Def)(Max) |
|
HAL_TIM_BREAK_EnableInputSource |
28 |
28 |
230 |
LL_TIM_EnableBreakInputSource(Min)(Def)(Max) |
|
HAL_TIM_BREAK_EnableMainOutput |
18 |
18 |
100 |
LL_TIM_EnableAllOutputs(Min)(Def)(Max) |
|
HAL_TIM_BREAK_GetBreakDelay |
20 |
20 |
130 |
LL_TIM_GetBreakDelay(Min)(Def)(Max) |
|
HAL_TIM_BREAK_GetConfigInput |
84 |
84 |
254 |
LL_TIM_GetConfigBRK(Min)(Def)(Max), LL_TIM_GetConfigBRK2(Min)(Def)(Max) |
|
HAL_TIM_BREAK_GetInputFilter |
26 |
26 |
184 |
LL_TIM_GetBreakInputFilter(Min)(Def)(Max) |
|
HAL_TIM_BREAK_GetInputMode |
56 |
56 |
214 |
LL_TIM_GetBreakInputAFMode(Min)(Def)(Max) |
|
HAL_TIM_BREAK_GetInputPolarity |
36 |
36 |
182 |
LL_TIM_GetBreakInputPolarity(Min)(Def)(Max) |
|
HAL_TIM_BREAK_GetInputSourcePolarity |
26 |
26 |
236 |
LL_TIM_GetBreakInputSourcePolarity(Min)(Def)(Max) |
|
HAL_TIM_BREAK_GetOutputDisableStatus |
14 |
14 |
98 |
LL_TIM_GetOutputDisableStatus(Min)(Def)(Max) |
|
HAL_TIM_BREAK_GetOutputOffStates |
28 |
28 |
128 |
LL_TIM_GetOffStates(Min)(Def)(Max) |
|
HAL_TIM_BREAK_IsEnabledAutomaticOutput |
16 |
16 |
98 |
LL_TIM_IsEnabledAutomaticOutput(Min)(Def)(Max) |
|
HAL_TIM_BREAK_IsEnabledInput |
22 |
22 |
170 |
LL_TIM_IsEnabledBreakInput(Min)(Def)(Max) |
|
HAL_TIM_BREAK_IsEnabledInputSource |
26 |
26 |
232 |
LL_TIM_IsEnabledBreakInputSource(Min)(Def)(Max) |
|
HAL_TIM_BREAK_IsEnabledMainOutput |
16 |
16 |
104 |
LL_TIM_IsEnabledAllOutputs(Min)(Def)(Max) |
|
HAL_TIM_BREAK_RearmInput |
74 |
74 |
222 |
HAL_GetTick(Min)(Def)(Max), LL_TIM_DisarmBreakInput(Min)(Def)(Max), LL_TIM_IsDisarmedBreakInput(Min)(Def)(Max) |
|
HAL_TIM_BREAK_SetBreakDelay |
28 |
28 |
156 |
LL_TIM_SetBreakDelay(Min)(Def)(Max) |
|
HAL_TIM_BREAK_SetConfigInput |
68 |
78 |
444 |
LL_TIM_ConfigBRK(Min)(Def)(Max), LL_TIM_ConfigBRK2(Min)(Def)(Max) |
|
HAL_TIM_BREAK_SetInputFilter |
34 |
34 |
286 |
LL_TIM_SetBreakInputFilter(Min)(Def)(Max) |
|
HAL_TIM_BREAK_SetInputMode |
34 |
34 |
212 |
LL_TIM_SetBreakInputAFMode(Min)(Def)(Max) |
|
HAL_TIM_BREAK_SetInputPolarity |
46 |
46 |
218 |
LL_TIM_SetBreakInputPolarity(Min)(Def)(Max) |
|
HAL_TIM_BREAK_SetInputSourcePolarity |
40 |
40 |
284 |
LL_TIM_SetBreakInputSourcePolarity(Min)(Def)(Max) |
|
HAL_TIM_BREAK_SetOutputOffStates |
28 |
38 |
194 |
LL_TIM_SetOffStates(Min)(Def)(Max) |
|
HAL_TIM_BRK_TERR_IERR_IRQHandler |
168 |
182 |
198 |
LL_TIM_ClearFlag_B2G(Min)(Def)(Max), LL_TIM_ClearFlag_BG(Min)(Def)(Max), LL_TIM_ClearFlag_BRK(Min)(Def)(Max), LL_TIM_ClearFlag_BRK2(Min)(Def)(Max), LL_TIM_ClearFlag_IERR(Min)(Def)(Max), LL_TIM_ClearFlag_SYSBRK(Min)(Def)(Max), LL_TIM_ClearFlag_TERR(Min)(Def)(Max) |
|
HAL_TIM_Break2Callback |
2 |
2 |
2 |
None |
|
HAL_TIM_BreakCallback |
2 |
2 |
2 |
None |
|
HAL_TIM_CC_IRQHandler |
190 |
198 |
222 |
LL_TIM_ClearFlag_CC1(Min)(Def)(Max), LL_TIM_ClearFlag_CC2(Min)(Def)(Max), LL_TIM_ClearFlag_CC3(Min)(Def)(Max), LL_TIM_ClearFlag_CC4(Min)(Def)(Max), LL_TIM_IC_GetActiveInput(Min)(Def)(Max) |
|
HAL_TIM_ChannelStopCallback |
0 |
2 |
2 |
None |
|
HAL_TIM_CommutationCallback |
2 |
2 |
2 |
None |
|
HAL_TIM_CommutationHalfCpltCallback |
0 |
2 |
2 |
None |
|
HAL_TIM_CompareMatchCallback |
2 |
2 |
2 |
None |
|
HAL_TIM_CompareMatchHalfCpltCallback |
0 |
2 |
2 |
None |
|
HAL_TIM_DeInit |
62 |
62 |
160 |
LL_TIM_CC_DisableChannel(Min)(Def)(Max), LL_TIM_DisableCounter(Min)(Def)(Max) |
|
HAL_TIM_DirectionChangeCallback |
2 |
2 |
2 |
None |
|
HAL_TIM_DisableADCSynchronization |
18 |
18 |
122 |
LL_TIM_DisableADCSynchronization(Min)(Def)(Max) |
|
HAL_TIM_DisableAsymmetricalDeadtime |
18 |
18 |
104 |
LL_TIM_DisableAsymmetricalDeadTime(Min)(Def)(Max) |
|
HAL_TIM_DisableAutoReloadPreload |
16 |
16 |
52 |
LL_TIM_DisableARRPreload(Min)(Def)(Max) |
|
HAL_TIM_DisableCommutation |
18 |
18 |
98 |
LL_TIM_CC_DisablePreload(Min)(Def)(Max) |
|
HAL_TIM_DisableCompareUnitOCRefClear |
30 |
32 |
358 |
LL_TIM_OC_DisableClear(Min)(Def)(Max) |
|
HAL_TIM_DisableDeadtimePreload |
18 |
18 |
100 |
LL_TIM_DisableDeadTimePreload(Min)(Def)(Max) |
|
HAL_TIM_DisableDithering |
16 |
16 |
50 |
LL_TIM_DisableDithering(Min)(Def)(Max) |
|
HAL_TIM_DisableEncoderIndex |
18 |
18 |
96 |
LL_TIM_DisableEncoderIndex(Min)(Def)(Max) |
|
HAL_TIM_DisableMasterSlaveMode |
18 |
18 |
104 |
LL_TIM_DisableMasterSlaveMode(Min)(Def)(Max) |
|
HAL_TIM_DisableOnePulseMode |
16 |
16 |
52 |
LL_TIM_DisableOnePulseMode(Min)(Def)(Max) |
|
HAL_TIM_DisableSlaveModePreload |
18 |
18 |
82 |
LL_TIM_DisableSMSPreload(Min)(Def)(Max) |
|
HAL_TIM_DisableUpdateFlagRemap |
16 |
16 |
52 |
LL_TIM_DisableUIFRemap(Min)(Def)(Max) |
|
HAL_TIM_DisableUpdateGeneration |
16 |
16 |
52 |
LL_TIM_DisableUpdateEvent(Min)(Def)(Max) |
|
HAL_TIM_EnableADCSynchronization |
18 |
18 |
122 |
LL_TIM_EnableADCSynchronization(Min)(Def)(Max) |
|
HAL_TIM_EnableAsymmetricalDeadtime |
18 |
18 |
104 |
LL_TIM_EnableAsymmetricalDeadTime(Min)(Def)(Max) |
|
HAL_TIM_EnableAutoReloadPreload |
16 |
16 |
52 |
LL_TIM_EnableARRPreload(Min)(Def)(Max) |
|
HAL_TIM_EnableCommutation |
30 |
30 |
136 |
LL_TIM_CC_EnablePreload(Min)(Def)(Max), LL_TIM_CC_SetUpdate(Min)(Def)(Max) |
|
HAL_TIM_EnableCompareUnitOCRefClear |
30 |
32 |
390 |
LL_TIM_OC_EnableClear(Min)(Def)(Max) |
|
HAL_TIM_EnableDeadtimePreload |
18 |
18 |
100 |
LL_TIM_EnableDeadTimePreload(Min)(Def)(Max) |
|
HAL_TIM_EnableDithering |
16 |
16 |
50 |
LL_TIM_EnableDithering(Min)(Def)(Max) |
|
HAL_TIM_EnableEncoderIndex |
18 |
18 |
96 |
LL_TIM_EnableEncoderIndex(Min)(Def)(Max) |
|
HAL_TIM_EnableMasterSlaveMode |
18 |
18 |
104 |
LL_TIM_EnableMasterSlaveMode(Min)(Def)(Max) |
|
HAL_TIM_EnableOnePulseMode |
16 |
16 |
52 |
LL_TIM_EnableOnePulseMode(Min)(Def)(Max) |
|
HAL_TIM_EnableSlaveModePreload |
28 |
28 |
112 |
LL_TIM_EnableSMSPreload(Min)(Def)(Max), LL_TIM_SetSMSPreloadSource(Min)(Def)(Max) |
|
HAL_TIM_EnableUpdateFlagRemap |
16 |
16 |
52 |
LL_TIM_EnableUIFRemap(Min)(Def)(Max) |
|
HAL_TIM_EnableUpdateGeneration |
16 |
16 |
52 |
LL_TIM_EnableUpdateEvent(Min)(Def)(Max) |
|
HAL_TIM_EncoderIndexCallback |
2 |
2 |
2 |
None |
|
HAL_TIM_ErrorCallback |
0 |
2 |
2 |
None |
|
HAL_TIM_GenerateEvent |
24 |
24 |
438 |
LL_TIM_GenerateEvent(Min)(Def)(Max) |
|
HAL_TIM_GetCaptureCompareDMAReqSource |
0 |
16 |
110 |
LL_TIM_CC_GetDMAReqTrigger(Def)(Max) |
|
HAL_TIM_GetChannelState |
10 |
10 |
128 |
None |
|
HAL_TIM_GetClockFreq |
12 |
12 |
44 |
HAL_RCC_TIM_GetKernelClkFreq(Min)(Def)(Max) |
|
HAL_TIM_GetClockSource |
16 |
16 |
62 |
TIM_GetClockSource(Min)(Def)(Max) |
|
HAL_TIM_GetCommutationSource |
16 |
16 |
98 |
LL_TIM_CC_GetUpdate(Min)(Def)(Max) |
|
HAL_TIM_GetConfig |
142 |
134 |
194 |
LL_TIM_GetAutoReload(Min)(Def)(Max), LL_TIM_GetCounterMode(Min)(Def)(Max), LL_TIM_GetPrescaler(Min)(Def)(Max), LL_TIM_GetRepetitionCounter(Min)(Def)(Max), TIM_GetClockSource(Min)(Def)(Max) |
|
HAL_TIM_GetConfigDMABurst |
0 |
34 |
152 |
LL_TIM_GetConfigDMABurst(Def)(Max) |
|
HAL_TIM_GetConfigEncoderIndex |
34 |
34 |
130 |
None |
|
HAL_TIM_GetConfigTriggerOutput2 |
26 |
26 |
106 |
LL_TIM_GetTriggerOutput2(Min)(Def)(Max), LL_TIM_GetTriggerOutput2Postscaler(Min)(Def)(Max) |
|
HAL_TIM_GetCounter |
12 |
12 |
48 |
LL_TIM_GetCounter(Min)(Def)(Max) |
|
HAL_TIM_GetCounterMode |
16 |
16 |
110 |
LL_TIM_GetCounterMode(Min)(Def)(Max) |
|
HAL_TIM_GetDTS2Prescaler |
14 |
14 |
114 |
LL_TIM_GetClockDivision2(Min)(Def)(Max) |
|
HAL_TIM_GetDTSPrescaler |
16 |
16 |
122 |
LL_TIM_GetClockDivision(Min)(Def)(Max) |
|
HAL_TIM_GetDeadtime |
28 |
28 |
144 |
LL_TIM_GetFallingDeadTime(Min)(Def)(Max), LL_TIM_OC_GetDeadTime(Min)(Def)(Max) |
|
HAL_TIM_GetDitheredPeriod |
30 |
30 |
66 |
LL_TIM_GetAutoReload(Min)(Def)(Max) |
|
HAL_TIM_GetExternalTriggerInput |
56 |
56 |
136 |
LL_TIM_GetConfigETR(Min)(Def)(Max), LL_TIM_GetETRSource(Min)(Def)(Max) |
|
HAL_TIM_GetLastErrorCodes |
0 |
4 |
22 |
None |
|
HAL_TIM_GetLockLevel |
16 |
16 |
98 |
LL_TIM_CC_GetLockLevel(Min)(Def)(Max) |
|
HAL_TIM_GetOCRefClearSource |
16 |
16 |
118 |
LL_TIM_GetOCRefClearInputSource(Min)(Def)(Max) |
|
HAL_TIM_GetPeriod |
12 |
12 |
48 |
LL_TIM_GetAutoReload(Min)(Def)(Max) |
|
HAL_TIM_GetPrescaler |
12 |
12 |
48 |
LL_TIM_GetPrescaler(Min)(Def)(Max) |
|
HAL_TIM_GetRepetitionCounter |
14 |
14 |
92 |
LL_TIM_GetRepetitionCounter(Min)(Def)(Max) |
|
HAL_TIM_GetState |
4 |
4 |
22 |
None |
|
HAL_TIM_GetSynchroSlave |
26 |
26 |
136 |
LL_TIM_GetSlaveMode(Min)(Def)(Max), LL_TIM_GetTriggerInput(Min)(Def)(Max) |
|
HAL_TIM_GetTriggerOutput |
14 |
14 |
124 |
LL_TIM_GetTriggerOutput(Min)(Def)(Max) |
|
HAL_TIM_GetTriggerOutput2 |
14 |
14 |
68 |
LL_TIM_GetTriggerOutput2(Min)(Def)(Max) |
|
HAL_TIM_GetTriggerOutput2Postscaler |
14 |
14 |
68 |
LL_TIM_GetTriggerOutput2Postscaler(Min)(Def)(Max) |
|
HAL_TIM_GetUpdateSource |
14 |
14 |
50 |
LL_TIM_GetUpdateSource(Min)(Def)(Max) |
|
HAL_TIM_GetUserData |
0 |
4 |
22 |
None |
|
HAL_TIM_IC_DisableXORGate |
48 |
42 |
190 |
LL_TIM_IC_DisableXORCombination(Min)(Def)(Max) |
|
HAL_TIM_IC_DisableXORGateInputInversion |
32 |
30 |
354 |
LL_TIM_IC_DisableXORGateInputInversion(Min)(Def)(Max) |
|
HAL_TIM_IC_EnableXORGate |
48 |
42 |
190 |
LL_TIM_IC_EnableXORCombination(Min)(Def)(Max) |
|
HAL_TIM_IC_EnableXORGateInputInversion |
32 |
30 |
352 |
LL_TIM_IC_EnableXORGateInputInversion(Min)(Def)(Max) |
|
HAL_TIM_IC_GetChannelLevel |
28 |
26 |
262 |
LL_TIM_IC_GetInputStatus(Min)(Def)(Max) |
|
HAL_TIM_IC_GetChannelSource |
28 |
28 |
304 |
LL_TIM_IC_GetSource(Min)(Def)(Max) |
|
HAL_TIM_IC_GetConfigCaptureUnit |
72 |
72 |
306 |
LL_TIM_IC_GetActiveInput(Min)(Def)(Max), LL_TIM_IC_GetPolarity(Min)(Def)(Max), LL_TIM_IC_GetPrescaler(Min)(Def)(Max) |
|
HAL_TIM_IC_GetConfigChannel |
60 |
60 |
350 |
LL_TIM_IC_GetFilter(Min)(Def)(Max), LL_TIM_IC_GetPolarity(Min)(Def)(Max), LL_TIM_IC_GetSource(Min)(Def)(Max) |
|
HAL_TIM_IC_GetXORGatePosition |
14 |
14 |
126 |
LL_TIM_IC_GetXORGatePosition(Min)(Def)(Max) |
|
HAL_TIM_IC_IsEnabledXORGate |
16 |
16 |
94 |
LL_TIM_IC_IsEnabledXORCombination(Min)(Def)(Max) |
|
HAL_TIM_IC_IsEnabledXORGateInputInversion |
30 |
28 |
354 |
LL_TIM_IC_IsEnabledXORGateInputInversion(Min)(Def)(Max) |
|
HAL_TIM_IC_ReadChannelCapturedValue |
28 |
26 |
264 |
LL_TIM_IC_GetCapturedValue(Min)(Def)(Max) |
|
HAL_TIM_IC_SetChannelSource |
28 |
28 |
824 |
TIM_SetRemap(Min)(Def)(Max) |
|
HAL_TIM_IC_SetConfigCaptureUnit |
78 |
88 |
438 |
LL_TIM_IC_SetActiveInput(Min)(Def)(Max), LL_TIM_IC_SetPolarity(Min)(Def)(Max), LL_TIM_IC_SetPrescaler(Min)(Def)(Max) |
|
HAL_TIM_IC_SetConfigChannel |
84 |
94 |
1174 |
LL_TIM_IC_SetFilter(Min)(Def)(Max), LL_TIM_IC_SetPolarity(Min)(Def)(Max), TIM_SetRemap(Min)(Def)(Max) |
|
HAL_TIM_IC_SetXORGatePosition |
22 |
22 |
148 |
LL_TIM_IC_SetXORGatePosition(Min)(Def)(Max) |
|
HAL_TIM_IC_StartChannel |
46 |
92 |
364 |
LL_TIM_CC_EnableChannel(Min)(Def)(Max) |
|
HAL_TIM_IC_StartChannel_DMA |
0 |
104 |
514 |
TIM_IC_StartChannel_DMA_Opt(Def)(Max) |
|
HAL_TIM_IC_StartChannel_DMA_Opt |
0 |
122 |
498 |
TIM_IC_StartChannel_DMA_Opt(Def)(Max) |
|
HAL_TIM_IC_StartChannel_IT |
56 |
102 |
378 |
LL_TIM_CC_EnableChannel(Min)(Def)(Max), LL_TIM_EnableIT(Min)(Def)(Max) |
|
HAL_TIM_IC_StopChannel |
46 |
44 |
318 |
LL_TIM_CC_DisableChannel(Min)(Def)(Max) |
|
HAL_TIM_IC_StopChannel_DMA |
0 |
84 |
416 |
LL_TIM_CC_DisableChannel(Def)(Max), TIM_StopChannel_DMA(Def)(Max) |
|
HAL_TIM_IC_StopChannel_IT |
56 |
54 |
330 |
LL_TIM_CC_DisableChannel(Min)(Def)(Max), LL_TIM_DisableIT(Min)(Def)(Max) |
|
HAL_TIM_IRQHandler |
434 |
462 |
486 |
LL_TIM_ClearFlag_B2G(Min)(Def)(Max), LL_TIM_ClearFlag_BG(Min)(Def)(Max), LL_TIM_ClearFlag_BRK(Min)(Def)(Max), LL_TIM_ClearFlag_BRK2(Min)(Def)(Max), LL_TIM_ClearFlag_CC1(Min)(Def)(Max), LL_TIM_ClearFlag_CC2(Min)(Def)(Max), LL_TIM_ClearFlag_CC3(Min)(Def)(Max), LL_TIM_ClearFlag_CC4(Min)(Def)(Max), LL_TIM_ClearFlag_COM(Min)(Def)(Max), LL_TIM_ClearFlag_DIR(Min)(Def)(Max), LL_TIM_ClearFlag_IDX(Min)(Def)(Max), LL_TIM_ClearFlag_IERR(Min)(Def)(Max), LL_TIM_ClearFlag_SYSBRK(Min)(Def)(Max), LL_TIM_ClearFlag_TERR(Min)(Def)(Max), LL_TIM_ClearFlag_TRIG(Min)(Def)(Max), LL_TIM_ClearFlag_UPDATE(Min)(Def)(Max), LL_TIM_IC_GetActiveInput(Min)(Def)(Max) |
|
HAL_TIM_IndexErrorCallback |
2 |
2 |
2 |
None |
|
HAL_TIM_Init |
182 |
214 |
442 |
HAL_RCC_TIM12_EnableClock(Min)(Max), HAL_RCC_TIM15_EnableClock(Min)(Max), HAL_RCC_TIM16_EnableClock(Min)(Max), HAL_RCC_TIM17_EnableClock(Min)(Max), HAL_RCC_TIM1_EnableClock(Min)(Max), HAL_RCC_TIM2_EnableClock(Min)(Max), HAL_RCC_TIM5_EnableClock(Min)(Max), HAL_RCC_TIM6_EnableClock(Min)(Max), HAL_RCC_TIM7_EnableClock(Min)(Max), HAL_RCC_TIM8_EnableClock(Min)(Max) |
|
HAL_TIM_InputCaptureCallback |
2 |
2 |
2 |
None |
|
HAL_TIM_InputCaptureHalfCpltCallback |
0 |
2 |
2 |
None |
|
HAL_TIM_IsEnabledADCSynchronization |
16 |
16 |
122 |
LL_TIM_IsEnabledADCSynchronization(Min)(Def)(Max) |
|
HAL_TIM_IsEnabledAsymmetricalDeadtime |
16 |
16 |
100 |
LL_TIM_IsEnabledAsymmetricalDeadTime(Min)(Def)(Max) |
|
HAL_TIM_IsEnabledAutoReloadPreload |
14 |
14 |
50 |
LL_TIM_IsEnabledARRPreload(Min)(Def)(Max) |
|
HAL_TIM_IsEnabledCommutation |
16 |
16 |
92 |
LL_TIM_CC_IsEnabledPreload(Min)(Def)(Max) |
|
HAL_TIM_IsEnabledCompareUnitOCRefClear |
28 |
30 |
342 |
LL_TIM_OC_IsEnabledClear(Min)(Def)(Max) |
|
HAL_TIM_IsEnabledDeadtimePreload |
16 |
16 |
104 |
LL_TIM_IsEnabledDeadTimePreload(Min)(Def)(Max) |
|
HAL_TIM_IsEnabledDithering |
14 |
14 |
50 |
LL_TIM_IsEnabledDithering(Min)(Def)(Max) |
|
HAL_TIM_IsEnabledEncoderIndex |
16 |
16 |
94 |
LL_TIM_IsEnabledEncoderIndex(Min)(Def)(Max) |
|
HAL_TIM_IsEnabledMasterSlaveMode |
16 |
16 |
110 |
LL_TIM_IsEnabledMasterSlaveMode(Min)(Def)(Max) |
|
HAL_TIM_IsEnabledOnePulseMode |
14 |
14 |
50 |
LL_TIM_IsEnabledOnePulseMode(Min)(Def)(Max) |
|
HAL_TIM_IsEnabledSlaveModePreload |
16 |
16 |
82 |
LL_TIM_IsEnabledSMSPreload(Min)(Def)(Max) |
|
HAL_TIM_IsEnabledUpdateFlagRemap |
14 |
14 |
50 |
LL_TIM_IsEnabledUIFRemap(Min)(Def)(Max) |
|
HAL_TIM_IsEnabledUpdateGeneration |
14 |
14 |
50 |
LL_TIM_IsEnabledUpdateEvent(Min)(Def)(Max) |
|
HAL_TIM_OC_DisableCompareFastMode |
32 |
32 |
348 |
LL_TIM_OC_DisableFast(Min)(Def)(Max) |
|
HAL_TIM_OC_DisableComparePreload |
32 |
32 |
320 |
LL_TIM_OC_DisablePreload(Min)(Def)(Max) |
|
HAL_TIM_OC_DisableOutputOverride |
18 |
18 |
98 |
LL_TIM_OC_DisableOutputOverride(Min)(Def)(Max) |
|
HAL_TIM_OC_EnableCompareFastMode |
32 |
32 |
356 |
LL_TIM_OC_EnableFast(Min)(Def)(Max) |
|
HAL_TIM_OC_EnableComparePreload |
32 |
32 |
294 |
LL_TIM_OC_EnablePreload(Min)(Def)(Max) |
|
HAL_TIM_OC_EnableOutputOverride |
18 |
18 |
98 |
LL_TIM_OC_EnableOutputOverride(Min)(Def)(Max) |
|
HAL_TIM_OC_GetCompareUnitDitheredPulse |
42 |
42 |
376 |
LL_TIM_OC_GetCompareValue(Min)(Def)(Max) |
|
HAL_TIM_OC_GetCompareUnitPulse |
20 |
20 |
346 |
LL_TIM_OC_GetCompareValue(Min)(Def)(Max) |
|
HAL_TIM_OC_GetConfigChannel |
80 |
80 |
596 |
LL_TIM_OC_GetBreakMode(Min)(Def)(Max), LL_TIM_OC_GetIdleState(Min)(Def)(Max), LL_TIM_OC_GetOverrideState(Min)(Def)(Max), LL_TIM_OC_GetPolarity(Min)(Def)(Max) |
|
HAL_TIM_OC_GetConfigCompareUnit |
44 |
44 |
350 |
LL_TIM_OC_GetCompareValue(Min)(Def)(Max), LL_TIM_OC_GetMode(Min)(Def)(Max) |
|
HAL_TIM_OC_GetGroupChannel |
14 |
14 |
78 |
LL_TIM_GetCH5CombinedChannels(Min)(Def)(Max) |
|
HAL_TIM_OC_GetPulseGenerator |
26 |
26 |
78 |
LL_TIM_OC_GetPulseWidth(Min)(Def)(Max), LL_TIM_OC_GetPulseWidthPrescaler(Min)(Def)(Max) |
|
HAL_TIM_OC_IsEnabledCompareFastMode |
30 |
30 |
348 |
LL_TIM_OC_IsEnabledFast(Min)(Def)(Max) |
|
HAL_TIM_OC_IsEnabledComparePreload |
30 |
30 |
356 |
LL_TIM_OC_IsEnabledPreload(Min)(Def)(Max) |
|
HAL_TIM_OC_IsEnabledOutputOverride |
16 |
16 |
98 |
LL_TIM_OC_IsEnabledOutputOverride(Min)(Def)(Max) |
|
HAL_TIM_OC_SetCompareUnitDitheredPulse |
42 |
42 |
580 |
LL_TIM_OC_SetCompareValue(Min)(Def)(Max) |
|
HAL_TIM_OC_SetCompareUnitPulse |
28 |
28 |
416 |
LL_TIM_OC_SetCompareValue(Min)(Def)(Max) |
|
HAL_TIM_OC_SetConfigChannel |
164 |
178 |
708 |
LL_TIM_OC_SetBreakMode(Min)(Def)(Max), LL_TIM_OC_SetIdleState(Min)(Def)(Max), LL_TIM_OC_SetOverrideState(Min)(Def)(Max), LL_TIM_OC_SetPolarity(Min)(Def)(Max) |
|
HAL_TIM_OC_SetConfigCompareUnit |
48 |
58 |
666 |
LL_TIM_OC_SetCompareValue(Min)(Def)(Max), LL_TIM_OC_SetMode(Min)(Def)(Max) |
|
HAL_TIM_OC_SetGroupChannel |
22 |
22 |
100 |
LL_TIM_SetCH5CombinedChannels(Min)(Def)(Max) |
|
HAL_TIM_OC_SetPulseGenerator |
30 |
40 |
220 |
LL_TIM_OC_SetPulseWidth(Min)(Def)(Max), LL_TIM_OC_SetPulseWidthPrescaler(Min)(Def)(Max) |
|
HAL_TIM_OC_StartChannel |
84 |
140 |
626 |
LL_TIM_CC_EnableChannel(Min)(Def)(Max), LL_TIM_EnableAllOutputs(Min)(Def)(Max) |
|
HAL_TIM_OC_StartChannel_DMA |
0 |
104 |
724 |
TIM_OC_StartChannel_DMA_Opt(Def)(Max) |
|
HAL_TIM_OC_StartChannel_DMA_Opt |
0 |
122 |
788 |
TIM_OC_StartChannel_DMA_Opt(Def)(Max) |
|
HAL_TIM_OC_StartChannel_IT |
108 |
164 |
682 |
LL_TIM_CC_EnableChannel(Min)(Def)(Max), LL_TIM_EnableAllOutputs(Min)(Def)(Max), LL_TIM_EnableIT(Min)(Def)(Max) |
|
HAL_TIM_OC_StopChannel |
96 |
104 |
510 |
LL_TIM_CC_DisableChannel(Min)(Def)(Max), LL_TIM_DisableAllOutputs(Min)(Def)(Max) |
|
HAL_TIM_OC_StopChannel_DMA |
0 |
138 |
678 |
LL_TIM_CC_DisableChannel(Def)(Max), LL_TIM_DisableAllOutputs(Def)(Max), TIM_StopChannel_DMA(Def)(Max) |
|
HAL_TIM_OC_StopChannel_IT |
120 |
126 |
636 |
LL_TIM_CC_DisableChannel(Min)(Def)(Max), LL_TIM_DisableAllOutputs(Min)(Def)(Max), LL_TIM_DisableIT(Min)(Def)(Max) |
|
HAL_TIM_RegisterBreak2Callback |
0 |
24 |
58 |
None |
|
HAL_TIM_RegisterBreakCallback |
0 |
24 |
58 |
None |
|
HAL_TIM_RegisterChannelStopCallback |
0 |
22 |
60 |
None |
|
HAL_TIM_RegisterCommutationCallback |
0 |
24 |
58 |
None |
|
HAL_TIM_RegisterCommutationHalfCpltCallback |
0 |
24 |
58 |
None |
|
HAL_TIM_RegisterCompareMatchCallback |
0 |
24 |
58 |
None |
|
HAL_TIM_RegisterCompareMatchHalfCpltCallback |
0 |
24 |
58 |
None |
|
HAL_TIM_RegisterDirectionChangeCallback |
0 |
24 |
58 |
None |
|
HAL_TIM_RegisterEncoderIndexCallback |
0 |
24 |
58 |
None |
|
HAL_TIM_RegisterErrorCallback |
0 |
22 |
60 |
None |
|
HAL_TIM_RegisterIndexErrorCallback |
0 |
24 |
58 |
None |
|
HAL_TIM_RegisterInputCaptureCallback |
0 |
22 |
60 |
None |
|
HAL_TIM_RegisterInputCaptureHalfCpltCallback |
0 |
22 |
60 |
None |
|
HAL_TIM_RegisterSoftwareBreakCallback |
0 |
24 |
58 |
None |
|
HAL_TIM_RegisterStopCallback |
0 |
22 |
60 |
None |
|
HAL_TIM_RegisterSystemBreakCallback |
0 |
24 |
58 |
None |
|
HAL_TIM_RegisterTransitionErrorCallback |
0 |
24 |
58 |
None |
|
HAL_TIM_RegisterTriggerCallback |
0 |
22 |
60 |
None |
|
HAL_TIM_RegisterTriggerHalfCpltCallback |
0 |
22 |
60 |
None |
|
HAL_TIM_RegisterUpdateCallback |
0 |
22 |
60 |
None |
|
HAL_TIM_RegisterUpdateHalfCpltCallback |
0 |
22 |
60 |
None |
|
HAL_TIM_SetCaptureCompareDMAReqSource |
0 |
24 |
146 |
LL_TIM_CC_SetDMAReqTrigger(Def)(Max) |
|
HAL_TIM_SetClockSource |
20 |
30 |
200 |
TIM_SetClockSource(Min)(Def)(Max) |
|
HAL_TIM_SetConfig |
214 |
216 |
614 |
LL_TIM_GenerateEvent_UPDATE(Min)(Def)(Max), LL_TIM_GetUpdateSource(Min)(Def)(Max), LL_TIM_SetAutoReload(Min)(Def)(Max), LL_TIM_SetCounterMode(Min)(Def)(Max), LL_TIM_SetPrescaler(Min)(Def)(Max), LL_TIM_SetRepetitionCounter(Min)(Def)(Max), LL_TIM_SetUpdateSource(Min)(Def)(Max), TIM_SetClockSource(Min)(Def)(Max) |
|
HAL_TIM_SetConfigDMABurst |
0 |
42 |
978 |
LL_TIM_ConfigDMABurst(Def)(Max) |
|
HAL_TIM_SetConfigEncoderIndex |
36 |
46 |
270 |
LL_TIM_ConfigEncoderIndex(Min)(Def)(Max) |
|
HAL_TIM_SetConfigTriggerOutput2 |
166 |
176 |
474 |
LL_TIM_SetTriggerOutput2(Min)(Def)(Max), LL_TIM_SetTriggerOutput2Postscaler(Min)(Def)(Max) |
|
HAL_TIM_SetCounter |
22 |
22 |
118 |
LL_TIM_SetCounter(Min)(Def)(Max) |
|
HAL_TIM_SetCounterMode |
24 |
24 |
168 |
LL_TIM_SetCounterMode(Min)(Def)(Max) |
|
HAL_TIM_SetDMA |
0 |
30 |
242 |
None |
|
HAL_TIM_SetDTS2Prescaler |
22 |
22 |
196 |
LL_TIM_SetClockDivision2(Min)(Def)(Max) |
|
HAL_TIM_SetDTSPrescaler |
24 |
24 |
184 |
LL_TIM_SetClockDivision(Min)(Def)(Max) |
|
HAL_TIM_SetDeadtime |
32 |
32 |
150 |
LL_TIM_OC_SetDeadTime(Min)(Def)(Max), LL_TIM_SetFallingDeadTime(Min)(Def)(Max) |
|
HAL_TIM_SetDitheredPeriod |
30 |
30 |
284 |
LL_TIM_SetAutoReload(Min)(Def)(Max) |
|
HAL_TIM_SetExternalTriggerInput |
44 |
54 |
682 |
LL_TIM_ConfigETR(Min)(Def)(Max), LL_TIM_SetETRSource(Min)(Def)(Max) |
|
HAL_TIM_SetLockLevel |
24 |
24 |
152 |
LL_TIM_CC_SetLockLevel(Min)(Def)(Max) |
|
HAL_TIM_SetOCRefClearSource |
24 |
24 |
274 |
LL_TIM_SetOCRefClearInputSource(Min)(Def)(Max) |
|
HAL_TIM_SetPeriod |
22 |
22 |
128 |
LL_TIM_SetAutoReload(Min)(Def)(Max) |
|
HAL_TIM_SetPrescaler |
22 |
22 |
76 |
LL_TIM_SetPrescaler(Min)(Def)(Max) |
|
HAL_TIM_SetRepetitionCounter |
22 |
22 |
164 |
LL_TIM_SetRepetitionCounter(Min)(Def)(Max) |
|
HAL_TIM_SetSynchroSlave |
30 |
40 |
724 |
LL_TIM_SetSlaveMode(Min)(Def)(Max), LL_TIM_SetTriggerInput(Min)(Def)(Max) |
|
HAL_TIM_SetTriggerOutput |
22 |
22 |
180 |
LL_TIM_SetTriggerOutput(Min)(Def)(Max) |
|
HAL_TIM_SetTriggerOutput2 |
22 |
22 |
238 |
LL_TIM_SetTriggerOutput2(Min)(Def)(Max) |
|
HAL_TIM_SetTriggerOutput2Postscaler |
22 |
22 |
88 |
LL_TIM_SetTriggerOutput2Postscaler(Min)(Def)(Max) |
|
HAL_TIM_SetUpdateSource |
22 |
22 |
86 |
LL_TIM_SetUpdateSource(Min)(Def)(Max) |
|
HAL_TIM_SetUserData |
0 |
4 |
24 |
None |
|
HAL_TIM_SoftwareBreakCallback |
2 |
2 |
2 |
None |
|
HAL_TIM_Start |
88 |
124 |
154 |
LL_TIM_EnableCounter(Min)(Def)(Max), LL_TIM_GetSlaveMode(Min)(Def)(Max) |
|
HAL_TIM_StartDMABurst |
0 |
250 |
676 |
HAL_DMA_StartPeriphXfer_IT_Opt(Def)(Max), LL_TIM_EnableDMAReq(Def)(Max), LL_TIM_IC_GetActiveInput(Def)(Max) |
|
HAL_TIM_StartDMABurst::dma_burst_cb |
0 |
56 |
56 |
None |
|
HAL_TIM_Start_DMA |
0 |
78 |
228 |
TIM_Start_DMA_Opt(Def)(Max) |
|
HAL_TIM_Start_DMA_Opt |
0 |
90 |
232 |
TIM_Start_DMA_Opt(Def)(Max) |
|
HAL_TIM_Start_IT |
20 |
58 |
92 |
TIM_Start_IT_Opt(Min)(Def)(Max) |
|
HAL_TIM_Start_IT_Opt |
22 |
60 |
332 |
TIM_Start_IT_Opt(Min)(Def)(Max) |
|
HAL_TIM_Stop |
24 |
24 |
58 |
LL_TIM_DisableCounter(Min)(Def)(Max) |
|
HAL_TIM_StopCallback |
0 |
2 |
2 |
None |
|
HAL_TIM_StopDMABurst |
0 |
58 |
434 |
HAL_DMA_Abort_IT(Def)(Max), LL_TIM_DisableDMAReq(Def)(Max) |
|
HAL_TIM_Stop_DMA |
0 |
86 |
218 |
LL_TIM_DisableCounter(Def)(Max), LL_TIM_DisableDMAReq(Def)(Max), TIM_Abort_DMA(Def)(Max), TIM_DMARequestToDMAIndex(Def)(Max) |
|
HAL_TIM_Stop_IT |
34 |
34 |
64 |
LL_TIM_DisableCounter(Min)(Def)(Max), LL_TIM_DisableIT(Min)(Def)(Max) |
|
HAL_TIM_SystemBreakCallback |
2 |
2 |
2 |
None |
|
HAL_TIM_TRGI_COM_DIR_IDX_IRQHandler |
86 |
92 |
108 |
LL_TIM_ClearFlag_COM(Min)(Def)(Max), LL_TIM_ClearFlag_DIR(Min)(Def)(Max), LL_TIM_ClearFlag_IDX(Min)(Def)(Max), LL_TIM_ClearFlag_TRIG(Min)(Def)(Max) |
|
HAL_TIM_TransitionErrorCallback |
2 |
2 |
2 |
None |
|
HAL_TIM_TriggerCallback |
2 |
2 |
2 |
None |
|
HAL_TIM_TriggerHalfCpltCallback |
0 |
2 |
2 |
None |
|
HAL_TIM_UPD_IRQHandler |
30 |
30 |
46 |
LL_TIM_ClearFlag_UPDATE(Min)(Def)(Max), LL_TIM_IsEnabledIT_UPDATE(Min)(Def)(Max) |
|
HAL_TIM_UpdateCallback |
2 |
2 |
2 |
None |
|
HAL_TIM_UpdateHalfCpltCallback |
0 |
2 |
2 |
None |
Static TIM APIs ¶
|
API |
Min Code Size (Bytes) |
Default Code Size (Bytes) |
Max Code Size (Bytes) |
Called functions |
|---|---|---|---|---|
|
LPTIM_Abort_DMA |
0 |
74 |
90 |
None |
|
LPTIM_CcDisable |
178 |
178 |
178 |
None |
|
LPTIM_ConvertHALToLLExttrig |
90 |
90 |
90 |
None |
|
LPTIM_ConvertHALToLLIcx |
124 |
124 |
124 |
None |
|
LPTIM_ConvertLLToHALExttrig |
88 |
88 |
88 |
None |
|
LPTIM_ConvertLLToHALIcx |
124 |
124 |
124 |
None |
|
LPTIM_DMACaptureCpltCallback |
0 |
28 |
28 |
None |
|
LPTIM_DMACaptureHalfcpltCallback |
0 |
28 |
28 |
None |
|
LPTIM_DMAChannelStopCallback |
0 |
28 |
28 |
None |
|
LPTIM_DMAErrorCallback |
0 |
14 |
14 |
None |
|
LPTIM_DMAStopCallback |
0 |
14 |
14 |
None |
|
LPTIM_DMAUpdateCpltCallback |
0 |
14 |
14 |
None |
|
LPTIM_DMAUpdateHalfcpltCallback |
0 |
14 |
14 |
None |
|
LPTIM_GetCCxDmaHandler |
0 |
16 |
16 |
None |
|
LPTIM_GetClockSource |
56 |
56 |
56 |
None |
|
LPTIM_IC_StartChannel_DMA_Opt |
0 |
220 |
282 |
None |
|
LPTIM_IC_StopChannel_DMA |
0 |
62 |
62 |
None |
|
LPTIM_OC_SetPulse |
130 |
130 |
130 |
None |
|
LPTIM_Start |
60 |
60 |
60 |
None |
|
LPTIM_Start_DMA_Opt |
0 |
146 |
192 |
None |
|
LPTIM_WaitFlag |
62 |
62 |
62 |
None |
|
TIM_Abort_DMA |
0 |
90 |
106 |
HAL_DMA_Abort(Def)(Max), HAL_DMA_Abort_IT(Def)(Max) |
|
TIM_Config_DMA |
0 |
42 |
100 |
LL_TIM_EnableDMAReq(Def)(Max) |
|
TIM_DMACaptureCpltCallback |
0 |
28 |
28 |
TIM_GetCCxDMAHandler(Def)(Max) |
|
TIM_DMACaptureHalfCpltCallback |
0 |
28 |
28 |
TIM_GetCCxDMAHandler(Def)(Max) |
|
TIM_DMAChannelStopCallback |
0 |
28 |
28 |
TIM_GetCCxDMAHandler(Def)(Max) |
|
TIM_DMACommutationCpltCallback |
0 |
16 |
16 |
None |
|
TIM_DMACommutationHalfCpltCallback |
0 |
16 |
16 |
None |
|
TIM_DMACompareMatchCpltCallback |
0 |
30 |
30 |
TIM_GetCCxDMAHandler(Def)(Max) |
|
TIM_DMACompareMatchHalfCpltCallback |
0 |
30 |
30 |
TIM_GetCCxDMAHandler(Def)(Max) |
|
TIM_DMAErrorCallback |
0 |
14 |
14 |
None |
|
TIM_DMARequestToDMAIndex |
0 |
36 |
36 |
None |
|
TIM_DMAStopCallback |
0 |
14 |
14 |
None |
|
TIM_DMATriggerCpltCallback |
0 |
14 |
14 |
None |
|
TIM_DMATriggerHalfCpltCallback |
0 |
14 |
14 |
None |
|
TIM_DMAUpdateCpltCallback |
0 |
14 |
14 |
None |
|
TIM_DMAUpdateHalfCpltCallback |
0 |
14 |
14 |
None |
|
TIM_GetCCxDMAHandler |
0 |
38 |
38 |
None |
|
TIM_GetClockSource |
30 |
30 |
30 |
LL_TIM_GetClockSource(Min)(Def)(Max), LL_TIM_GetTriggerInput(Min)(Def)(Max) |
|
TIM_IC_StartChannel_DMA_Opt |
0 |
196 |
196 |
HAL_DMA_StartPeriphXfer_IT_Opt(Def)(Max), LL_TIM_CC_EnableChannel(Def)(Max), TIM_Config_DMA(Def)(Max), __aeabi_memclr4(Def)(Max) |
|
TIM_OC_StartChannel_DMA_Opt |
0 |
248 |
248 |
HAL_DMA_StartPeriphXfer_IT_Opt(Def)(Max), LL_TIM_CC_EnableChannel(Def)(Max), LL_TIM_EnableAllOutputs(Def)(Max), TIM_Config_DMA(Def)(Max), __aeabi_memclr4(Def)(Max) |
|
TIM_SetClockSource |
122 |
122 |
720 |
LL_TIM_SetClockSource(Min)(Def)(Max), LL_TIM_SetTriggerInput(Min)(Def)(Max) |
|
TIM_SetRemap |
30 |
30 |
30 |
LL_TIM_IC_SetSource(Min)(Def)(Max) |
|
TIM_Start_DMA_Opt |
0 |
276 |
276 |
HAL_DMA_StartPeriphXfer_IT_Opt(Def)(Max), LL_TIM_CC_IsEnabledPreload(Def)(Max), LL_TIM_EnableCounter(Def)(Max), LL_TIM_GetSlaveMode(Def)(Max), TIM_Config_DMA(Def)(Max), __iar_unaligned_memcpy4(Def)(Max) |
|
TIM_Start_DMA_Opt::dma_configurations |
0 |
48 |
48 |
None |
|
TIM_Start_IT_Opt |
92 |
92 |
92 |
LL_TIM_EnableCounter(Min)(Def)(Max), LL_TIM_EnableIT(Min)(Def)(Max), LL_TIM_GetSlaveMode(Min)(Def)(Max) |
|
TIM_StopChannel_DMA |
0 |
84 |
84 |
LL_TIM_DisableDMAReq(Def)(Max), TIM_Abort_DMA(Def)(Max) |