HAL CRS Overview

Introducing CRS

group CRS_Introduction

The clock recovery system (CRS) is an advanced digital controller acting on the internal fine-grained trimmable RC oscillator HSI144. The CRS provides a means to evaluate the oscillator output frequency based on comparison with a selectable synchronization signal. The oscillator trimming can be automatically adjusted based on the measured frequency error value, while still allowing manual trimming when required. The CRS is ideally suited to provide a precise clock to the USB peripheral. In such a case, the synchronization signal can be derived from the start-of-frame (SOF) packet signaling on the USB bus, which is sent by a USB host at 1 ms intervals. The synchronization signal can also be derived from the LSE oscillator output, or it can be generated by user software.

Main features

The main features of CRS are described below:

  • Selectable synchronization source with programmable prescaler and polarity:

    • LSE oscillator output

    • USB SOF packet reception

  • Possibility to generate synchronization pulses by software

  • Automatic oscillator trimming capability with no need for CPU action

  • Manual control option for faster start-up convergence

  • 16-bit frequency error counter with automatic error value capture and reload

  • Programmable limit for automatic frequency error value evaluation and status reporting

  • Maskable interrupts/events:

    • Expected synchronization (ESYNC)

    • Synchronization OK (SYNCOK)

    • Synchronization warning (SYNCWARN)

    • Synchronization or trimming error (ERR)

Module and files

The following diagram illustrates the CRS module and its associated files.

Module and files diagram

Component diagram

The following diagram illustrates the software components involved in the CRS module. It shows the interactions between the user application, HAL drivers, low-level drivers, and the hardware components.

@startuml <style> componentDiagram { arrow { FontSize 8 } } </style> title CRS Software Component Diagram package "HAL" { [HAL_SERVICE] [HAL_CRS] } package "Low Layer" { [LL_CRS] [CMSIS] [CRS Interrupt Service Routine] } package "HW" { [STM32_HW] } [Appli] --> [HAL_CRS] : HAL CRS APIs [Appli] <-- [HAL_CRS] : HAL CRS callbacks [HAL_CRS] --> [LL_CRS] : LL CRS APIs [HAL_CRS] -l-> [HAL_SERVICE] : HAL_GetTick [HAL_CRS] <-- [CRS Interrupt Service Routine] [LL_CRS] --> [CMSIS]:CRS registers definition [STM32_HW] -u--> [CRS Interrupt Service Routine]: CRSx IRQ [STM32_HW] <-u-- [LL_CRS] : CRS registers R/W @enduml

Configuration table

The following table lists the configuration defines for the HAL CRS module, specifying their locations, default values, and descriptions:

group CRS_Configuration_Table

Configuration inside the CRS driver

Configuration defines

Description

Default value

Note

USE_ASSERT_DBG_PARAM

from Preprocessor env

NONE

Enable parameter checks for HAL

USE_ASSERT_DBG_STATE

from Preprocessor env

NONE

Enable state checks for HAL

USE_HAL_CHECK_PARAM

from hal_conf.h

0U

When set, parameters are checked at runtime

USE_HAL_CRS_MODULE

from hal_conf.h

1U

Enable the HAL CRS module

USE_HAL_CRS_CLK_ENABLE_MODEL

from hal_conf.h

HAL_CLK_ENABLE_NO

Enable peripheral clock gating

USE_HAL_CRS_GET_LAST_ERRORS

from hal_conf.h

0U

Enable retrieval of the last process error

USE_HAL_CRS_REGISTER_CALLBACKS

from hal_conf.h

0U

Allow the user to define custom callbacks

USE_HAL_CRS_USER_DATA

from hal_conf.h

0U

When set, user data is defined in the handle