HAL HASH Overview

Introducing HASH

group HASH_Introduction

The HASH hardware abstraction layer provides a set of APIs to configure and control the HASH peripheral on STM32 microcontrollers.

HMAC is suitable for applications requiring message authentication.

The HASH processor computes FIPS (Federal Information Processing Standards) approved digests of length of 160, 224, 256 bits, for messages of any length less than 264 bits (for SHA-1, SHA-224 and SHA-256) or less than 2128 bits (for SHA-384, SHA-512).

Module and files

The following diagram illustrates the HASH module and its associated files.

Module and files diagram

Component diagram

The following diagram illustrates the software components involved in the HASH module. It shows the interactions between the user application, HAL drivers, low-level drivers, and the hardware components.

@startuml

!$use_ppp_core = 0
!$use_ppp_ll = 0
!$use_ppp_hal = 1

!$use_api_itf = 1
!$use_hal_itf = 1
!$use_ll_itf = 0
!$use_core_itf = 1

!$use_ppp_isr = 1

!$use_hal_service = 0
!$use_hal_rcc = 1
!$use_hal_dma = 1

!$use_ll_rcc = 0

!$use_kernel_clock = 0

!$core = "XXX" + "_CORE"
!$ppp = "HASH"
!$hal_api_itf = "HAL " + $ppp + " API"
!$appli_itf = "User Callback"
!$ppp_name = "HAL_"+$ppp
!$ppp_ISR = $ppp+" ISR"
!$ll_ppp = "LL_"+$ppp

!$hal_dma_itf = "HAL_DMA_StartPeriphXfer_IT_Opt()\nHAL_DMA_Abort_IT"
!if ($use_kernel_clock == 1)
!$hal_rcc_itf = "\t\t\tHAL_RCC_"+$ppp+"_GetClockFreq()\n\t\t\tHAL_RCC_"+$ppp+"_EnableClock()"
!else
!$hal_rcc_itf = "\t\t\tHAL_RCC_"+$ppp+"_EnableClock()"
!endif

!$hal_ppp_itf = "Transfer complete\nError callback\nAbort callback"
!$hal_generic_itf = "HAL_GetTick()"
!$ll_ppp_itf = "LL " + $ppp +" API"
!$ppp_xIRQ = $ppp+"x_IRQ"

<style>
componentDiagram {
   arrow {
      FontSize 8
   }
}
</style>

title $ppp Software Component Diagram

Package "Application Layer" #DarkMagenta {

component [Appli]
interface "$appli_itf" as APPLI_Interface
[Appli] -r- APPLI_Interface
}

package "HAL" #DarkOrange {
[$ppp_name]
!if ($use_hal_dma == 1)
interface "$hal_ppp_itf" as HAL_PPP_Interface
[$ppp_name] -d- HAL_PPP_Interface
!endif
interface "$hal_api_itf" as HAL_PPP_APPLI_Interface
[$ppp_name] -u- HAL_PPP_APPLI_Interface

!if ($use_hal_service == 1)
  [HAL_SERVICE]
  interface "$hal_generic_itf" as HAL_Service_Interface
  [HAL_SERVICE] -r- HAL_Service_Interface
  [$ppp_name] -l-( HAL_Service_Interface
!endif

!if ($use_hal_dma == 1)
  [HAL_DMA]
  interface "$hal_dma_itf" as HAL_DMA_Interface
  [HAL_DMA] -u- HAL_DMA_Interface
  [HAL_DMA] -u-( HAL_PPP_Interface
  [$ppp_name] --( HAL_DMA_Interface
!endif
!if ($use_hal_rcc == 1)
  [HAL_RCC]
  interface "$hal_rcc_itf" as HAL_RCC_Interface
  [HAL_RCC] -l- HAL_RCC_Interface
  [$ppp_name] -r-( HAL_RCC_Interface
!endif
}

[Appli] -d-( HAL_PPP_APPLI_Interface
[$ppp_name] -u-( APPLI_Interface
!if ($use_ppp_core ==1)
Package "Core Layer" #Lavender{
[$core]
interface "core API" as Core_api_itf
[$core] -u- Core_api_itf
}
[$ppp_name] -d-( Core_api_itf
!endif
package "Low Layer" #Technology {
[CMSIS-Devices]
!if ($use_ppp_ll == 1)
[$ll_ppp]
interface "$ll_ppp_itf" as LL_PPP_Interface
[$ll_ppp] -u- LL_PPP_Interface
!endif

!if ($use_ppp_isr == 1)
interface "$ppp_ISR" as PPP_ISR
[$ppp_ISR] -U- PPP_ISR
[$ppp_ISR]
!endif


!if ($use_ll_rcc == 1)
  [LL_RCC]
  interface "LL RCC API" as LL_RCC_API
  [LL_RCC] -u- LL_RCC_API
  [HAL_RCC] -d-(LL_RCC_API
!endif

!if ($use_hal_dma == 1)
  [DMA ISR]
  interface "DMA ISR" as DMA_ISR
  [DMA ISR] -u- DMA_ISR
!endif
}

package "HW" #LightCyan {
[STM32_HW]
!if ($use_ppp_isr == 1)
interface "$ppp_xIRQ" as PPPx_IRQ
[STM32_HW] -u- PPPx_IRQ
!endif
!if ($use_hal_dma == 1)
interface "DMAx_IRQ_Ch" as DMA_IRQ_CH
[STM32_HW] -u- DMA_IRQ_CH
[DMA ISR] -d-( DMA_IRQ_CH
[HAL_DMA] --( DMA_ISR
!endif
}
!if ($use_ppp_ll == 1)
[$ppp_name] -d-( LL_PPP_Interface
[$ll_ppp] .r.> [CMSIS-Devices]: $ppp register def
[STM32_HW] <.u. [$ll_ppp] : $ppp registers R/W
!else
!if ($use_ppp_core == 1)
[$core] .l.> [CMSIS-Devices]: $ppp register def
[STM32_HW] <.u. [$core] : $ppp registers R/W
!else
[$ppp_name] .d.> [CMSIS-Devices]: $ppp register def
[STM32_HW] <.l. [$ppp_name] : $ppp registers R/W
!endif
!endif
!if ($use_ppp_isr == 1)
[$ppp_ISR] -d-( PPPx_IRQ
[$ppp_name] -d-( PPP_ISR
!endif
!if ($use_ll_rcc == 1)
[STM32_HW] <.u. [LL_RCC] : RCC registers R/W
!endif
@enduml

Configuration table

The following table lists the configuration defines for the HAL HASH module, specifying their locations, default values, and descriptions:

group HASH_Configuration_Table

Configuration inside the HASH driver

Config defines

Description

Default value

Note

PRODUCT

from IDE

NONE

STM32C5XX

USE_ASSERT_DBG_PARAM

from the IDE

NONE

Allows you to use assert parameter checks.

USE_ASSERT_DBG_STATE

from the IDE

NONE

Allows you to use assert state checks.

USE_HAL_HASH_MODULE

from hal_conf.h

1

Enable the HAL HASH module

USE_HAL_CHECK_PARAM

from hal_conf.h

0

Allows you to use runtime parameter checks.

USE_HAL_HASH_REGISTER_CALLBACKS

from hal_conf.h

0

Allows to provide specific callback functions.

USE_HAL_HASH_GET_LAST_ERRORS

from hal_conf.h

0

Allows you to get last error codes.

USE_HAL_HASH_USER_DATA

from hal_conf.h

0

Allows to enable/disable user data.

USE_HAL_HASH_CLK_ENABLE_MODEL

from hal_conf.h

HAL_CLK_ENABLE_NO

Allows to enable the clock model for the HASH.

USE_HAL_HASH_DMA

from hal_conf.h

1

Allows to enable the HASH DMA module service.

USE_HAL_SECURE_CHECK_PARAM

from hal_conf.h

0

Allows to use the runtime check for sensitive APIs.

USE_HAL_CHECK_PROCESS_STATE

from hal_conf.h

0

Allows to use the load and store exclusive