Reference Manual to LL API cross reference

The following table provides the mapping between the registers and bits, as they appear inside product reference manual, and the functions provided by the Low Layer interface.

This table gives the correlation for ADC registers

STM32C562xx STM32C5A3xx STM32C542xx

Register	Bit	Function
CALFACT	CALFACT_D	LL_ADC_GetCalibrationFactor() LL_ADC_SetCalibrationFactor()
CALFACT	CALFACT_S	LL_ADC_GetCalibrationFactor() LL_ADC_SetCalibrationFactor()
CCR	TSEN	LL_ADC_GetCommonPathInternalCh() LL_ADC_SetCommonPathInternalCh() LL_ADC_SetCommonPathInternalChAdd() LL_ADC_SetCommonPathInternalChRem()
CCR	VBATEN	LL_ADC_GetCommonPathInternalCh() LL_ADC_SetCommonPathInternalCh() LL_ADC_SetCommonPathInternalChAdd() LL_ADC_SetCommonPathInternalChRem()
CCR	VREFEN	LL_ADC_GetCommonPathInternalCh() LL_ADC_SetCommonPathInternalCh() LL_ADC_SetCommonPathInternalChAdd() LL_ADC_SetCommonPathInternalChRem()
CDR	RDATA_MST	LL_ADC_DMA_GetRegAddr()
CDR	RDATA_SLV	LL_ADC_DMA_GetRegAddr()
CDR2	RDATA_ALT	LL_ADC_DMA_GetRegAddr()
CFGR1	AUTDLY	LL_ADC_GetLowPowerMode() LL_ADC_SetLowPowerMode()
CFGR1	DISCEN	LL_ADC_REG_GetSequencerDiscont() LL_ADC_REG_SetSequencerDiscont()
CFGR1	DISCNUM	LL_ADC_REG_GetSequencerDiscont() LL_ADC_REG_SetSequencerDiscont()
CFGR1	EXTEN	LL_ADC_REG_GetTriggerEdge() LL_ADC_REG_GetTriggerSource() LL_ADC_REG_IsTriggerSourceSWStart() LL_ADC_REG_SetTriggerEdge() LL_ADC_REG_SetTriggerSource()
CFGR1	EXTSEL	LL_ADC_REG_GetTriggerSource() LL_ADC_REG_SetTriggerSource()
CFGR1	RES	LL_ADC_GetResolution() LL_ADC_SetResolution()
CFGR2	BULB	LL_ADC_GetSamplingMode() LL_ADC_SetSamplingMode()
CFGR2	GCOMP	LL_ADC_GetGainCompensation() LL_ADC_SetGainCompensation()
CFGR2	LSHIFT	LL_ADC_GetLeftBitShift() LL_ADC_SetLeftBitShift()
CFGR2	SMPTRIG	LL_ADC_GetSamplingMode() LL_ADC_SetSamplingMode()
CFGR2	SWTRIG	LL_ADC_REG_StartSamplingPhase() LL_ADC_REG_StopSamplingPhase()
DR	RDATA	LL_ADC_DMA_GetRegAddr()
GCOMP	GCOMPCOEFF	LL_ADC_GetGainCompensation() LL_ADC_SetGainCompensation()
SQR1	LEN	LL_ADC_REG_GetSequencerLength() LL_ADC_REG_SetSequencerLength()
SQR1	SQ1	LL_ADC_REG_SetSequencerRanks()
SQR1	SQ2	LL_ADC_REG_SetSequencerRanks()
SQR1	SQ3	LL_ADC_REG_SetSequencerRanks()
SQR1	SQ4	LL_ADC_REG_SetSequencerRanks()
SQR2	SQ5	LL_ADC_REG_SetSequencerRanks()
SQR2	SQ6	LL_ADC_REG_SetSequencerRanks()
SQR2	SQ7	LL_ADC_REG_SetSequencerRanks()
SQR2	SQ8	LL_ADC_REG_SetSequencerRanks()
SQR2	SQ9	LL_ADC_REG_SetSequencerRanks()
SQR3	SQ10	LL_ADC_REG_SetSequencerRanks()
SQR3	SQ11	LL_ADC_REG_SetSequencerRanks()
SQR3	SQ12	LL_ADC_REG_SetSequencerRanks()
SQR3	SQ13	LL_ADC_REG_SetSequencerRanks()
SQR3	SQ14	LL_ADC_REG_SetSequencerRanks()
SQR4	SQ15	LL_ADC_REG_SetSequencerRanks()
SQR4	SQ16	LL_ADC_REG_SetSequencerRanks()