HAL AES Overview

Introducing AES

group AES_Introduction

The AES hardware abstraction layer provides a set of APIs to configure and control the AES (and SAES) peripheral on STM32 microcontrollers.

The AES coprocessor (AES/SAES) encrypts or decrypts data, using an algorithm and implementation fully compliant with the Advanced Encryption Standard (AES/SAES) defined in Federal Information Processing Standards (FIPS) publication 197. It incorporates protection against side-channel attacks (SCA), including differential power analysis (DPA), and is certified to SESIP and PSA security assurance level 3.

The peripheral supports CTR, GCM, GMAC, CCM, ECB, and CBC chaining modes for key sizes of 128 or 256 bits, as well as special modes such as hardware secret key encryption/decryption (Wrapped-key mode) and key sharing with the faster CRYP peripheral (Shared-key mode).

Module and files

The following diagram illustrates the AES module and its associated files.

Module and files diagram

Component diagram

The following diagram illustrates the software components involved in the AES module. It shows the interactions between the user application, HAL drivers, low-level drivers, and the hardware components.


@startuml
<style>
componentDiagram {
   arrow {
      FontSize 8
   }
}
</style>

title AES Software Component Diagram

package "HAL" {
    [HAL_SERVICE]
    [HAL_AES]
    [HAL_DMA]
}

package "Low Layer" {
    [CMSIS]
    [AES Interrupt routine service]
    [DMA Interrupt routine service]
}

package "HW" {
    [STM32_HW]
}

[Appli] --> [HAL_AES] : HAL AES API
[Appli] <-- [HAL_AES] : AES callback
[HAL_AES] -r-> [HAL_DMA] : Call DMA API
[HAL_AES] -l-> [HAL_SERVICE] : HAL_GetTick
[HAL_AES] <-- [AES Interrupt routine service]
[HAL_AES] <-r- [HAL_DMA]:Transfer complete\nError
[HAL_AES] --> [CMSIS]:AES register def
[HAL_AES] <--> [STM32_HW]:AES registers R/W
[HAL_DMA] <-d- [DMA Interrupt routine service]
[STM32_HW] -u--> [AES Interrupt routine service]: AESx Irq
[STM32_HW] -u--> [DMA Interrupt routine service] : DMA Channel Irq
@enduml

Configuration table

The following table lists the configuration defines for the HAL AES module, specifying their locations, default values, and descriptions:

group AES_Configuration_Table

Configuration inside the AES driver

Config defines

Description

Default value

Note

PRODUCT

from IDE

None

Ex:STM32C5xx

USE_HAL_AES_MODULE

from hal_conf.h

1

Enable the HAL AES module

USE_HAL_AES_CLK_ENABLE_MODEL

from hal_conf.h

HAL_CLK_ENABLE_NO

Enable the HAL_AES_CLK

USE_ASSERT_DBG_PARAM

from IDE

None

Enable the parameters asserts

USE_ASSERT_DBG_STATE

from IDE

None

Enable the state asserts

USE_HAL_CHECK_PARAM

from hal_conf.h

0

Parameters runtime check

USE_HAL_SECURE_CHECK_PARAM

from hal_conf.h

0

Parameters runtime check for sensitive APIs

USE_HAL_CHECK_PROCESS_STATE

from hal_conf.h

0

Allows to use the load and store exclusive.

USE_HAL_AES_DMA

from hal_conf.h

1

Allows to use DMA mode

USE_HAL_AES_ECB_CBC_ALGO

from hal_conf.h

1

Allows to use ECB and CBC algorithms

USE_HAL_AES_CTR_ALGO

from hal_conf.h

1

Allows to use CTR algorithm

USE_HAL_AES_GCM_GMAC_ALGO

from hal_conf.h

1

Allows to use GCM and GMAC algorithms

USE_HAL_AES_CCM_ALGO

from hal_conf.h

1

Allows to use CCM algorithm

USE_HAL_AES_SUSPEND_RESUME

from hal_conf.h

1

Allows to use Suspend features

USE_HAL_AES_REGISTER_CALLBACKS

from hal_conf h

0

Allows to use register callbacks

USE_HAL_AES_GET_LAST_ERRORS

from hal_conf.h

0

Allows to use error code mechanism

USE_HAL_AES_USER_DATA

from hal_conf.h

0

Allows to use user data