HAL RCC How to Use

group RCC_How_To_Use

This file provides firmware functions to manage the following functionalities of the Reset and Clock Control (RCC) peripheral:

  • Configuration and reset functions

  • Oscillators and Peripherals Control functions

  • Bus configuration functions

Main APIs are not allowed to perform any other actions than their main objective (for instance, it is not allowed to disable a PSI or an oscillator inside an enable function).

For performance reasons, few functionalities are not supported by the HAL driver but these functionalities are covered by the LL driver (for instance, interrupt management).

If the system clock is dynamically changed during runtime by the application or example code, it must call HAL_UpdateCoreClock() (a HAL generic driver function) at the end of the change to update SystemCoreClock and the systick (used by CMSIS) accordingly. The driver updates the SystemCoreClock variable and systick only in the HAL_RCC_Reset() and HAL_RCC_ResetSystemClock() functions.

RCC specific features

After exiting from standby or reset, the device is running from High Speed Internal Divided by 3 (HSIDIV3) oscillator (by default to 48MHz).

  • There is no prescaler on High speed (AHBs) and Low speed (APBs) buses: all peripherals mapped on these buses are running at sysclk frequency.

  • The clock for all peripherals is switched off, except the SRAM and FLASH.

Once the device started from reset, the application can:

  • Configure the clock source to be used to drive the System clock (if the application needs higher frequency/performance)

  • Configure the System clock frequency and Flash settings

  • Configure the AHB and APB buses prescalers

  • Enable the clock for the peripheral(s) to be used

  • Configure the clock source(s) for peripherals whose clocks receive an independent kernel clocks.

  • Configure peripherals supporting the low power mode (These peripherals are able to generate a kernel clock request and a AHB/APB bus clock request when they need, in order to operate and update their status register even in Stop mode).

  • Get the clock frequency of peripherals whose clocks receive independent kernel clocks.